configure: MinGW respect --bindir argument
[qemu/ar7.git] / accel / tcg / cpu-exec.c
blobe0df9b6a1dd944f949e819cbd703e68cd173bb31
1 /*
2 * emulator main execution loop
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qemu/qemu-print.h"
23 #include "cpu.h"
24 #include "trace.h"
25 #include "disas/disas.h"
26 #include "exec/exec-all.h"
27 #include "tcg/tcg.h"
28 #include "qemu/atomic.h"
29 #include "qemu/compiler.h"
30 #include "sysemu/qtest.h"
31 #include "qemu/timer.h"
32 #include "qemu/rcu.h"
33 #include "exec/tb-hash.h"
34 #include "exec/tb-lookup.h"
35 #include "exec/log.h"
36 #include "qemu/main-loop.h"
37 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
38 #include "hw/i386/apic.h"
39 #endif
40 #include "sysemu/cpus.h"
41 #include "exec/cpu-all.h"
42 #include "sysemu/cpu-timers.h"
43 #include "sysemu/replay.h"
45 /* -icount align implementation. */
47 typedef struct SyncClocks {
48 int64_t diff_clk;
49 int64_t last_cpu_icount;
50 int64_t realtime_clock;
51 } SyncClocks;
53 #if !defined(CONFIG_USER_ONLY)
54 /* Allow the guest to have a max 3ms advance.
55 * The difference between the 2 clocks could therefore
56 * oscillate around 0.
58 #define VM_CLOCK_ADVANCE 3000000
59 #define THRESHOLD_REDUCE 1.5
60 #define MAX_DELAY_PRINT_RATE 2000000000LL
61 #define MAX_NB_PRINTS 100
63 static int64_t max_delay;
64 static int64_t max_advance;
66 static void align_clocks(SyncClocks *sc, CPUState *cpu)
68 int64_t cpu_icount;
70 if (!icount_align_option) {
71 return;
74 cpu_icount = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low;
75 sc->diff_clk += icount_to_ns(sc->last_cpu_icount - cpu_icount);
76 sc->last_cpu_icount = cpu_icount;
78 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
79 #ifndef _WIN32
80 struct timespec sleep_delay, rem_delay;
81 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
82 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
83 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
84 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
85 } else {
86 sc->diff_clk = 0;
88 #else
89 Sleep(sc->diff_clk / SCALE_MS);
90 sc->diff_clk = 0;
91 #endif
95 static void print_delay(const SyncClocks *sc)
97 static float threshold_delay;
98 static int64_t last_realtime_clock;
99 static int nb_prints;
101 if (icount_align_option &&
102 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
103 nb_prints < MAX_NB_PRINTS) {
104 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
105 (-sc->diff_clk / (float)1000000000LL <
106 (threshold_delay - THRESHOLD_REDUCE))) {
107 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
108 qemu_printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
109 threshold_delay - 1,
110 threshold_delay);
111 nb_prints++;
112 last_realtime_clock = sc->realtime_clock;
117 static void init_delay_params(SyncClocks *sc, CPUState *cpu)
119 if (!icount_align_option) {
120 return;
122 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
123 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
124 sc->last_cpu_icount
125 = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low;
126 if (sc->diff_clk < max_delay) {
127 max_delay = sc->diff_clk;
129 if (sc->diff_clk > max_advance) {
130 max_advance = sc->diff_clk;
133 /* Print every 2s max if the guest is late. We limit the number
134 of printed messages to NB_PRINT_MAX(currently 100) */
135 print_delay(sc);
137 #else
138 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
142 static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
145 #endif /* CONFIG USER ONLY */
147 /* Execute a TB, and fix up the CPU state afterwards if necessary */
149 * Disable CFI checks.
150 * TCG creates binary blobs at runtime, with the transformed code.
151 * A TB is a blob of binary code, created at runtime and called with an
152 * indirect function call. Since such function did not exist at compile time,
153 * the CFI runtime has no way to verify its signature and would fail.
154 * TCG is not considered a security-sensitive part of QEMU so this does not
155 * affect the impact of CFI in environment with high security requirements
157 static inline TranslationBlock * QEMU_DISABLE_CFI
158 cpu_tb_exec(CPUState *cpu, TranslationBlock *itb, int *tb_exit)
160 CPUArchState *env = cpu->env_ptr;
161 uintptr_t ret;
162 TranslationBlock *last_tb;
163 const void *tb_ptr = itb->tc.ptr;
165 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
166 "Trace %d: %p ["
167 TARGET_FMT_lx "/" TARGET_FMT_lx "/%#x] %s\n",
168 cpu->cpu_index, itb->tc.ptr,
169 itb->cs_base, itb->pc, itb->flags,
170 lookup_symbol(itb->pc));
172 #if defined(DEBUG_DISAS)
173 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)
174 && qemu_log_in_addr_range(itb->pc)) {
175 FILE *logfile = qemu_log_lock();
176 int flags = 0;
177 if (qemu_loglevel_mask(CPU_LOG_TB_FPU)) {
178 flags |= CPU_DUMP_FPU;
180 #if defined(TARGET_I386)
181 flags |= CPU_DUMP_CCOP;
182 #endif
183 log_cpu_state(cpu, flags);
184 qemu_log_unlock(logfile);
186 #endif /* DEBUG_DISAS */
188 ret = tcg_qemu_tb_exec(env, tb_ptr);
189 cpu->can_do_io = 1;
191 * TODO: Delay swapping back to the read-write region of the TB
192 * until we actually need to modify the TB. The read-only copy,
193 * coming from the rx region, shares the same host TLB entry as
194 * the code that executed the exit_tb opcode that arrived here.
195 * If we insist on touching both the RX and the RW pages, we
196 * double the host TLB pressure.
198 last_tb = tcg_splitwx_to_rw((void *)(ret & ~TB_EXIT_MASK));
199 *tb_exit = ret & TB_EXIT_MASK;
201 trace_exec_tb_exit(last_tb, *tb_exit);
203 if (*tb_exit > TB_EXIT_IDX1) {
204 /* We didn't start executing this TB (eg because the instruction
205 * counter hit zero); we must restore the guest PC to the address
206 * of the start of the TB.
208 CPUClass *cc = CPU_GET_CLASS(cpu);
209 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
210 "Stopped execution of TB chain before %p ["
211 TARGET_FMT_lx "] %s\n",
212 last_tb->tc.ptr, last_tb->pc,
213 lookup_symbol(last_tb->pc));
214 if (cc->synchronize_from_tb) {
215 cc->synchronize_from_tb(cpu, last_tb);
216 } else {
217 assert(cc->set_pc);
218 cc->set_pc(cpu, last_tb->pc);
221 return last_tb;
224 #ifndef CONFIG_USER_ONLY
225 /* Execute the code without caching the generated code. An interpreter
226 could be used if available. */
227 static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
228 TranslationBlock *orig_tb, bool ignore_icount)
230 TranslationBlock *tb;
231 uint32_t cflags = curr_cflags() | CF_NOCACHE;
232 int tb_exit;
234 if (ignore_icount) {
235 cflags &= ~CF_USE_ICOUNT;
238 /* Should never happen.
239 We only end up here when an existing TB is too long. */
240 cflags |= MIN(max_cycles, CF_COUNT_MASK);
242 mmap_lock();
243 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base,
244 orig_tb->flags, cflags);
245 tb->orig_tb = orig_tb;
246 mmap_unlock();
248 /* execute the generated code */
249 trace_exec_tb_nocache(tb, tb->pc);
250 cpu_tb_exec(cpu, tb, &tb_exit);
252 mmap_lock();
253 tb_phys_invalidate(tb, -1);
254 mmap_unlock();
255 tcg_tb_remove(tb);
257 #endif
259 static void cpu_exec_enter(CPUState *cpu)
261 CPUClass *cc = CPU_GET_CLASS(cpu);
263 if (cc->cpu_exec_enter) {
264 cc->cpu_exec_enter(cpu);
268 static void cpu_exec_exit(CPUState *cpu)
270 CPUClass *cc = CPU_GET_CLASS(cpu);
272 if (cc->cpu_exec_exit) {
273 cc->cpu_exec_exit(cpu);
277 void cpu_exec_step_atomic(CPUState *cpu)
279 TranslationBlock *tb;
280 target_ulong cs_base, pc;
281 uint32_t flags;
282 uint32_t cflags = 1;
283 uint32_t cf_mask = cflags & CF_HASH_MASK;
284 int tb_exit;
286 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
287 start_exclusive();
289 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
290 if (tb == NULL) {
291 mmap_lock();
292 tb = tb_gen_code(cpu, pc, cs_base, flags, cflags);
293 mmap_unlock();
296 /* Since we got here, we know that parallel_cpus must be true. */
297 parallel_cpus = false;
298 cpu_exec_enter(cpu);
299 /* execute the generated code */
300 trace_exec_tb(tb, pc);
301 cpu_tb_exec(cpu, tb, &tb_exit);
302 cpu_exec_exit(cpu);
303 } else {
305 * The mmap_lock is dropped by tb_gen_code if it runs out of
306 * memory.
308 #ifndef CONFIG_SOFTMMU
309 tcg_debug_assert(!have_mmap_lock());
310 #endif
311 if (qemu_mutex_iothread_locked()) {
312 qemu_mutex_unlock_iothread();
314 assert_no_pages_locked();
315 qemu_plugin_disable_mem_helpers(cpu);
320 * As we start the exclusive region before codegen we must still
321 * be in the region if we longjump out of either the codegen or
322 * the execution.
324 g_assert(cpu_in_exclusive_context(cpu));
325 parallel_cpus = true;
326 end_exclusive();
329 struct tb_desc {
330 target_ulong pc;
331 target_ulong cs_base;
332 CPUArchState *env;
333 tb_page_addr_t phys_page1;
334 uint32_t flags;
335 uint32_t cf_mask;
336 uint32_t trace_vcpu_dstate;
339 static bool tb_lookup_cmp(const void *p, const void *d)
341 const TranslationBlock *tb = p;
342 const struct tb_desc *desc = d;
344 if (tb->pc == desc->pc &&
345 tb->page_addr[0] == desc->phys_page1 &&
346 tb->cs_base == desc->cs_base &&
347 tb->flags == desc->flags &&
348 tb->trace_vcpu_dstate == desc->trace_vcpu_dstate &&
349 (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == desc->cf_mask) {
350 /* check next page if needed */
351 if (tb->page_addr[1] == -1) {
352 return true;
353 } else {
354 tb_page_addr_t phys_page2;
355 target_ulong virt_page2;
357 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
358 phys_page2 = get_page_addr_code(desc->env, virt_page2);
359 if (tb->page_addr[1] == phys_page2) {
360 return true;
364 return false;
367 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
368 target_ulong cs_base, uint32_t flags,
369 uint32_t cf_mask)
371 tb_page_addr_t phys_pc;
372 struct tb_desc desc;
373 uint32_t h;
375 desc.env = (CPUArchState *)cpu->env_ptr;
376 desc.cs_base = cs_base;
377 desc.flags = flags;
378 desc.cf_mask = cf_mask;
379 desc.trace_vcpu_dstate = *cpu->trace_dstate;
380 desc.pc = pc;
381 phys_pc = get_page_addr_code(desc.env, pc);
382 if (phys_pc == -1) {
383 return NULL;
385 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
386 h = tb_hash_func(phys_pc, pc, flags, cf_mask, *cpu->trace_dstate);
387 return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp);
390 void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr)
392 if (TCG_TARGET_HAS_direct_jump) {
393 uintptr_t offset = tb->jmp_target_arg[n];
394 uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr;
395 uintptr_t jmp_rx = tc_ptr + offset;
396 uintptr_t jmp_rw = jmp_rx - tcg_splitwx_diff;
397 tb_target_set_jmp_target(tc_ptr, jmp_rx, jmp_rw, addr);
398 } else {
399 tb->jmp_target_arg[n] = addr;
403 static inline void tb_add_jump(TranslationBlock *tb, int n,
404 TranslationBlock *tb_next)
406 uintptr_t old;
408 assert(n < ARRAY_SIZE(tb->jmp_list_next));
409 qemu_spin_lock(&tb_next->jmp_lock);
411 /* make sure the destination TB is valid */
412 if (tb_next->cflags & CF_INVALID) {
413 goto out_unlock_next;
415 /* Atomically claim the jump destination slot only if it was NULL */
416 old = qatomic_cmpxchg(&tb->jmp_dest[n], (uintptr_t)NULL,
417 (uintptr_t)tb_next);
418 if (old) {
419 goto out_unlock_next;
422 /* patch the native jump address */
423 tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc.ptr);
425 /* add in TB jmp list */
426 tb->jmp_list_next[n] = tb_next->jmp_list_head;
427 tb_next->jmp_list_head = (uintptr_t)tb | n;
429 qemu_spin_unlock(&tb_next->jmp_lock);
431 qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc,
432 "Linking TBs %p [" TARGET_FMT_lx
433 "] index %d -> %p [" TARGET_FMT_lx "]\n",
434 tb->tc.ptr, tb->pc, n,
435 tb_next->tc.ptr, tb_next->pc);
436 return;
438 out_unlock_next:
439 qemu_spin_unlock(&tb_next->jmp_lock);
440 return;
443 static inline TranslationBlock *tb_find(CPUState *cpu,
444 TranslationBlock *last_tb,
445 int tb_exit, uint32_t cf_mask)
447 TranslationBlock *tb;
448 target_ulong cs_base, pc;
449 uint32_t flags;
451 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
452 if (tb == NULL) {
453 mmap_lock();
454 tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask);
455 mmap_unlock();
456 /* We add the TB in the virtual pc hash table for the fast lookup */
457 qatomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
459 #ifndef CONFIG_USER_ONLY
460 /* We don't take care of direct jumps when address mapping changes in
461 * system emulation. So it's not safe to make a direct jump to a TB
462 * spanning two pages because the mapping for the second page can change.
464 if (tb->page_addr[1] != -1) {
465 last_tb = NULL;
467 #endif
468 /* See if we can patch the calling TB. */
469 if (last_tb) {
470 tb_add_jump(last_tb, tb_exit, tb);
472 return tb;
475 static inline bool cpu_handle_halt(CPUState *cpu)
477 if (cpu->halted) {
478 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
479 if (cpu->interrupt_request & CPU_INTERRUPT_POLL) {
480 X86CPU *x86_cpu = X86_CPU(cpu);
481 qemu_mutex_lock_iothread();
482 apic_poll_irq(x86_cpu->apic_state);
483 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
484 qemu_mutex_unlock_iothread();
486 #endif
487 if (!cpu_has_work(cpu)) {
488 return true;
491 cpu->halted = 0;
494 return false;
497 static inline void cpu_handle_debug_exception(CPUState *cpu)
499 CPUClass *cc = CPU_GET_CLASS(cpu);
500 CPUWatchpoint *wp;
502 if (!cpu->watchpoint_hit) {
503 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
504 wp->flags &= ~BP_WATCHPOINT_HIT;
508 if (cc->debug_excp_handler) {
509 cc->debug_excp_handler(cpu);
513 static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
515 if (cpu->exception_index < 0) {
516 #ifndef CONFIG_USER_ONLY
517 if (replay_has_exception()
518 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0) {
519 /* try to cause an exception pending in the log */
520 cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0, curr_cflags()), true);
522 #endif
523 if (cpu->exception_index < 0) {
524 return false;
528 if (cpu->exception_index >= EXCP_INTERRUPT) {
529 /* exit request from the cpu execution loop */
530 *ret = cpu->exception_index;
531 if (*ret == EXCP_DEBUG) {
532 cpu_handle_debug_exception(cpu);
534 cpu->exception_index = -1;
535 return true;
536 } else {
537 #if defined(CONFIG_USER_ONLY)
538 /* if user mode only, we simulate a fake exception
539 which will be handled outside the cpu execution
540 loop */
541 #if defined(TARGET_I386)
542 CPUClass *cc = CPU_GET_CLASS(cpu);
543 cc->do_interrupt(cpu);
544 #endif
545 *ret = cpu->exception_index;
546 cpu->exception_index = -1;
547 return true;
548 #else
549 if (replay_exception()) {
550 CPUClass *cc = CPU_GET_CLASS(cpu);
551 qemu_mutex_lock_iothread();
552 cc->do_interrupt(cpu);
553 qemu_mutex_unlock_iothread();
554 cpu->exception_index = -1;
556 if (unlikely(cpu->singlestep_enabled)) {
558 * After processing the exception, ensure an EXCP_DEBUG is
559 * raised when single-stepping so that GDB doesn't miss the
560 * next instruction.
562 *ret = EXCP_DEBUG;
563 cpu_handle_debug_exception(cpu);
564 return true;
566 } else if (!replay_has_interrupt()) {
567 /* give a chance to iothread in replay mode */
568 *ret = EXCP_INTERRUPT;
569 return true;
571 #endif
574 return false;
578 * CPU_INTERRUPT_POLL is a virtual event which gets converted into a
579 * "real" interrupt event later. It does not need to be recorded for
580 * replay purposes.
582 static inline bool need_replay_interrupt(int interrupt_request)
584 #if defined(TARGET_I386)
585 return !(interrupt_request & CPU_INTERRUPT_POLL);
586 #else
587 return true;
588 #endif
591 static inline bool cpu_handle_interrupt(CPUState *cpu,
592 TranslationBlock **last_tb)
594 CPUClass *cc = CPU_GET_CLASS(cpu);
596 /* Clear the interrupt flag now since we're processing
597 * cpu->interrupt_request and cpu->exit_request.
598 * Ensure zeroing happens before reading cpu->exit_request or
599 * cpu->interrupt_request (see also smp_wmb in cpu_exit())
601 qatomic_mb_set(&cpu_neg(cpu)->icount_decr.u16.high, 0);
603 if (unlikely(qatomic_read(&cpu->interrupt_request))) {
604 int interrupt_request;
605 qemu_mutex_lock_iothread();
606 interrupt_request = cpu->interrupt_request;
607 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
608 /* Mask out external interrupts for this step. */
609 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
611 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
612 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
613 cpu->exception_index = EXCP_DEBUG;
614 qemu_mutex_unlock_iothread();
615 return true;
617 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
618 /* Do nothing */
619 } else if (interrupt_request & CPU_INTERRUPT_HALT) {
620 replay_interrupt();
621 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
622 cpu->halted = 1;
623 cpu->exception_index = EXCP_HLT;
624 qemu_mutex_unlock_iothread();
625 return true;
627 #if defined(TARGET_I386)
628 else if (interrupt_request & CPU_INTERRUPT_INIT) {
629 X86CPU *x86_cpu = X86_CPU(cpu);
630 CPUArchState *env = &x86_cpu->env;
631 replay_interrupt();
632 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
633 do_cpu_init(x86_cpu);
634 cpu->exception_index = EXCP_HALTED;
635 qemu_mutex_unlock_iothread();
636 return true;
638 #else
639 else if (interrupt_request & CPU_INTERRUPT_RESET) {
640 replay_interrupt();
641 cpu_reset(cpu);
642 qemu_mutex_unlock_iothread();
643 return true;
645 #endif
646 /* The target hook has 3 exit conditions:
647 False when the interrupt isn't processed,
648 True when it is, and we should restart on a new TB,
649 and via longjmp via cpu_loop_exit. */
650 else {
651 if (cc->cpu_exec_interrupt &&
652 cc->cpu_exec_interrupt(cpu, interrupt_request)) {
653 if (need_replay_interrupt(interrupt_request)) {
654 replay_interrupt();
657 * After processing the interrupt, ensure an EXCP_DEBUG is
658 * raised when single-stepping so that GDB doesn't miss the
659 * next instruction.
661 cpu->exception_index =
662 (cpu->singlestep_enabled ? EXCP_DEBUG : -1);
663 *last_tb = NULL;
665 /* The target hook may have updated the 'cpu->interrupt_request';
666 * reload the 'interrupt_request' value */
667 interrupt_request = cpu->interrupt_request;
669 if (interrupt_request & CPU_INTERRUPT_EXITTB) {
670 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
671 /* ensure that no TB jump will be modified as
672 the program flow was changed */
673 *last_tb = NULL;
676 /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */
677 qemu_mutex_unlock_iothread();
680 /* Finally, check if we need to exit to the main loop. */
681 if (unlikely(qatomic_read(&cpu->exit_request))
682 || (icount_enabled()
683 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0)) {
684 qatomic_set(&cpu->exit_request, 0);
685 if (cpu->exception_index == -1) {
686 cpu->exception_index = EXCP_INTERRUPT;
688 return true;
691 return false;
694 static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
695 TranslationBlock **last_tb, int *tb_exit)
697 int32_t insns_left;
699 trace_exec_tb(tb, tb->pc);
700 tb = cpu_tb_exec(cpu, tb, tb_exit);
701 if (*tb_exit != TB_EXIT_REQUESTED) {
702 *last_tb = tb;
703 return;
706 *last_tb = NULL;
707 insns_left = qatomic_read(&cpu_neg(cpu)->icount_decr.u32);
708 if (insns_left < 0) {
709 /* Something asked us to stop executing chained TBs; just
710 * continue round the main loop. Whatever requested the exit
711 * will also have set something else (eg exit_request or
712 * interrupt_request) which will be handled by
713 * cpu_handle_interrupt. cpu_handle_interrupt will also
714 * clear cpu->icount_decr.u16.high.
716 return;
719 /* Instruction counter expired. */
720 assert(icount_enabled());
721 #ifndef CONFIG_USER_ONLY
722 /* Ensure global icount has gone forward */
723 icount_update(cpu);
724 /* Refill decrementer and continue execution. */
725 insns_left = MIN(0xffff, cpu->icount_budget);
726 cpu_neg(cpu)->icount_decr.u16.low = insns_left;
727 cpu->icount_extra = cpu->icount_budget - insns_left;
728 if (!cpu->icount_extra && insns_left < tb->icount) {
729 /* Execute any remaining instructions, then let the main loop
730 * handle the next event.
732 if (insns_left > 0) {
733 cpu_exec_nocache(cpu, insns_left, tb, false);
736 #endif
739 /* main execution loop */
741 int cpu_exec(CPUState *cpu)
743 CPUClass *cc = CPU_GET_CLASS(cpu);
744 int ret;
745 SyncClocks sc = { 0 };
747 /* replay_interrupt may need current_cpu */
748 current_cpu = cpu;
750 if (cpu_handle_halt(cpu)) {
751 return EXCP_HALTED;
754 rcu_read_lock();
756 cpu_exec_enter(cpu);
758 /* Calculate difference between guest clock and host clock.
759 * This delay includes the delay of the last cycle, so
760 * what we have to do is sleep until it is 0. As for the
761 * advance/delay we gain here, we try to fix it next time.
763 init_delay_params(&sc, cpu);
765 /* prepare setjmp context for exception handling */
766 if (sigsetjmp(cpu->jmp_env, 0) != 0) {
767 #if defined(__clang__)
768 /* Some compilers wrongly smash all local variables after
769 * siglongjmp. There were bug reports for gcc 4.5.0 and clang.
770 * Reload essential local variables here for those compilers.
771 * Newer versions of gcc would complain about this code (-Wclobbered). */
772 cpu = current_cpu;
773 cc = CPU_GET_CLASS(cpu);
774 #else /* buggy compiler */
775 /* Assert that the compiler does not smash local variables. */
776 g_assert(cpu == current_cpu);
777 g_assert(cc == CPU_GET_CLASS(cpu));
778 #endif /* buggy compiler */
779 #ifndef CONFIG_SOFTMMU
780 tcg_debug_assert(!have_mmap_lock());
781 #endif
782 if (qemu_mutex_iothread_locked()) {
783 qemu_mutex_unlock_iothread();
785 qemu_plugin_disable_mem_helpers(cpu);
787 assert_no_pages_locked();
790 /* if an exception is pending, we execute it here */
791 while (!cpu_handle_exception(cpu, &ret)) {
792 TranslationBlock *last_tb = NULL;
793 int tb_exit = 0;
795 while (!cpu_handle_interrupt(cpu, &last_tb)) {
796 uint32_t cflags = cpu->cflags_next_tb;
797 TranslationBlock *tb;
799 /* When requested, use an exact setting for cflags for the next
800 execution. This is used for icount, precise smc, and stop-
801 after-access watchpoints. Since this request should never
802 have CF_INVALID set, -1 is a convenient invalid value that
803 does not require tcg headers for cpu_common_reset. */
804 if (cflags == -1) {
805 cflags = curr_cflags();
806 } else {
807 cpu->cflags_next_tb = -1;
810 tb = tb_find(cpu, last_tb, tb_exit, cflags);
811 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit);
812 /* Try to align the host and virtual clocks
813 if the guest is in advance */
814 align_clocks(&sc, cpu);
818 cpu_exec_exit(cpu);
819 rcu_read_unlock();
821 return ret;
824 #ifndef CONFIG_USER_ONLY
826 void dump_drift_info(void)
828 if (!icount_enabled()) {
829 return;
832 qemu_printf("Host - Guest clock %"PRIi64" ms\n",
833 (cpu_get_clock() - icount_get()) / SCALE_MS);
834 if (icount_align_option) {
835 qemu_printf("Max guest delay %"PRIi64" ms\n",
836 -max_delay / SCALE_MS);
837 qemu_printf("Max guest advance %"PRIi64" ms\n",
838 max_advance / SCALE_MS);
839 } else {
840 qemu_printf("Max guest delay NA\n");
841 qemu_printf("Max guest advance NA\n");
845 #endif /* !CONFIG_USER_ONLY */