hw/display/ati_int.h

   1 /*
   2  * QEMU ATI SVGA emulation
   3  *
   4  * Copyright (c) 2019 BALATON Zoltan
   5  *
   6  * This work is licensed under the GNU GPL license version 2 or later.
   7  */
   8
   9 #ifndef ATI_INT_H
  10 #define ATI_INT_H
  11
  12 #include "qemu/timer.h"
  13 #include "hw/pci/pci.h"
  14 #include "hw/i2c/bitbang_i2c.h"
  15 #include "vga_int.h"
  16 #include "qom/object.h"
  17
  18 /*#define DEBUG_ATI*/
  19
  20 #ifdef DEBUG_ATI
  21 #define DPRINTF(fmt, ...) printf("%s: " fmt, __func__, ## __VA_ARGS__)
  22 #else
  23 #define DPRINTF(fmt, ...) do {} while (0)
  24 #endif
  25
  26 #define PCI_VENDOR_ID_ATI 0x1002
  27 /* Rage128 Pro GL */
  28 #define PCI_DEVICE_ID_ATI_RAGE128_PF 0x5046
  29 /* Radeon RV100 (VE) */
  30 #define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159
  31
  32 #define TYPE_ATI_VGA "ati-vga"
  33 typedef struct ATIVGAState ATIVGAState;
  34 DECLARE_INSTANCE_CHECKER(ATIVGAState, ATI_VGA,
  35                          TYPE_ATI_VGA)
  36
  37 typedef struct ATIVGARegs {
  38     uint32_t mm_index;
  39     uint32_t bios_scratch[8];
  40     uint32_t gen_int_cntl;
  41     uint32_t gen_int_status;
  42     uint32_t crtc_gen_cntl;
  43     uint32_t crtc_ext_cntl;
  44     uint32_t dac_cntl;
  45     uint32_t gpio_vga_ddc;
  46     uint32_t gpio_dvi_ddc;
  47     uint32_t gpio_monid;
  48     uint32_t config_cntl;
  49     uint32_t crtc_h_total_disp;
  50     uint32_t crtc_h_sync_strt_wid;
  51     uint32_t crtc_v_total_disp;
  52     uint32_t crtc_v_sync_strt_wid;
  53     uint32_t crtc_offset;
  54     uint32_t crtc_offset_cntl;
  55     uint32_t crtc_pitch;
  56     uint32_t cur_offset;
  57     uint32_t cur_hv_pos;
  58     uint32_t cur_hv_offs;
  59     uint32_t cur_color0;
  60     uint32_t cur_color1;
  61     uint32_t dst_offset;
  62     uint32_t dst_pitch;
  63     uint32_t dst_tile;
  64     uint32_t dst_width;
  65     uint32_t dst_height;
  66     uint32_t src_offset;
  67     uint32_t src_pitch;
  68     uint32_t src_tile;
  69     uint32_t src_x;
  70     uint32_t src_y;
  71     uint32_t dst_x;
  72     uint32_t dst_y;
  73     uint32_t dp_gui_master_cntl;
  74     uint32_t dp_brush_bkgd_clr;
  75     uint32_t dp_brush_frgd_clr;
  76     uint32_t dp_src_frgd_clr;
  77     uint32_t dp_src_bkgd_clr;
  78     uint32_t dp_cntl;
  79     uint32_t dp_datatype;
  80     uint32_t dp_mix;
  81     uint32_t dp_write_mask;
  82     uint32_t default_offset;
  83     uint32_t default_pitch;
  84     uint32_t default_tile;
  85     uint32_t default_sc_bottom_right;
  86 } ATIVGARegs;
  87
  88 struct ATIVGAState {
  89     PCIDevice dev;
  90     VGACommonState vga;
  91     char *model;
  92     uint16_t dev_id;
  93     uint8_t mode;
  94     bool cursor_guest_mode;
  95     uint16_t cursor_size;
  96     uint32_t cursor_offset;
  97     QEMUCursor *cursor;
  98     QEMUTimer vblank_timer;
  99     bitbang_i2c_interface bbi2c;
 100     MemoryRegion io;
 101     MemoryRegion mm;
 102     ATIVGARegs regs;
 103 };
 104
 105 const char *ati_reg_name(int num);
 106
 107 void ati_2d_blt(ATIVGAState *s);
 108
 109 #endif /* ATI_INT_H */