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hw/arm/virt: fix pl031 addr typo
[qemu/ar7.git] / memory.c
blob64d7176193d829d9289c466bf4bd82b560b0c40a
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qapi/visitor.h"
20 #include "qemu/bitops.h"
21 #include "qom/object.h"
22 #include "trace.h"
23 #include <assert.h>
24
25 #include "exec/memory-internal.h"
26 #include "exec/ram_addr.h"
27 #include "sysemu/sysemu.h"
28
29 //#define DEBUG_UNASSIGNED
30
31 static unsigned memory_region_transaction_depth;
32 static bool memory_region_update_pending;
33 static bool ioeventfd_update_pending;
34 static bool global_dirty_log = false;
35
36 /* flat_view_mutex is taken around reading as->current_map; the critical
37 * section is extremely short, so I'm using a single mutex for every AS.
38 * We could also RCU for the read-side.
39 *
40 * The BQL is taken around transaction commits, hence both locks are taken
41 * while writing to as->current_map (with the BQL taken outside).
42 */
43 static QemuMutex flat_view_mutex;
44
45 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
47
48 static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
51 static void memory_init(void)
52 {
53 qemu_mutex_init(&flat_view_mutex);
54 }
55
56 typedef struct AddrRange AddrRange;
57
58 /*
59 * Note using signed integers limits us to physical addresses at most
60 * 63 bits wide. They are needed for negative offsetting in aliases
61 * (large MemoryRegion::alias_offset).
62 */
63 struct AddrRange {
64 Int128 start;
65 Int128 size;
66 };
67
68 static AddrRange addrrange_make(Int128 start, Int128 size)
69 {
70 return (AddrRange) { start, size };
71 }
72
73 static bool addrrange_equal(AddrRange r1, AddrRange r2)
74 {
75 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
76 }
77
78 static Int128 addrrange_end(AddrRange r)
79 {
80 return int128_add(r.start, r.size);
81 }
82
83 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
84 {
85 int128_addto(&range.start, delta);
86 return range;
87 }
88
89 static bool addrrange_contains(AddrRange range, Int128 addr)
90 {
91 return int128_ge(addr, range.start)
92 && int128_lt(addr, addrrange_end(range));
93 }
94
95 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
96 {
97 return addrrange_contains(r1, r2.start)
98 || addrrange_contains(r2, r1.start);
99 }
100
101 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
102 {
103 Int128 start = int128_max(r1.start, r2.start);
104 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
105 return addrrange_make(start, int128_sub(end, start));
106 }
107
108 enum ListenerDirection { Forward, Reverse };
109
110 static bool memory_listener_match(MemoryListener *listener,
111 MemoryRegionSection *section)
112 {
113 return !listener->address_space_filter
114 || listener->address_space_filter == section->address_space;
115 }
116
117 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
118 do { \
119 MemoryListener *_listener; \
120 \
121 switch (_direction) { \
122 case Forward: \
123 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
124 if (_listener->_callback) { \
125 _listener->_callback(_listener, ##_args); \
126 } \
127 } \
128 break; \
129 case Reverse: \
130 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
131 memory_listeners, link) { \
132 if (_listener->_callback) { \
133 _listener->_callback(_listener, ##_args); \
134 } \
135 } \
136 break; \
137 default: \
138 abort(); \
139 } \
140 } while (0)
141
142 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
143 do { \
144 MemoryListener *_listener; \
145 \
146 switch (_direction) { \
147 case Forward: \
148 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
149 if (_listener->_callback \
150 && memory_listener_match(_listener, _section)) { \
151 _listener->_callback(_listener, _section, ##_args); \
152 } \
153 } \
154 break; \
155 case Reverse: \
156 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
157 memory_listeners, link) { \
158 if (_listener->_callback \
159 && memory_listener_match(_listener, _section)) { \
160 _listener->_callback(_listener, _section, ##_args); \
161 } \
162 } \
163 break; \
164 default: \
165 abort(); \
166 } \
167 } while (0)
168
169 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
170 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
171 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
172 .mr = (fr)->mr, \
173 .address_space = (as), \
174 .offset_within_region = (fr)->offset_in_region, \
175 .size = (fr)->addr.size, \
176 .offset_within_address_space = int128_get64((fr)->addr.start), \
177 .readonly = (fr)->readonly, \
178 }))
179
180 struct CoalescedMemoryRange {
181 AddrRange addr;
182 QTAILQ_ENTRY(CoalescedMemoryRange) link;
183 };
184
185 struct MemoryRegionIoeventfd {
186 AddrRange addr;
187 bool match_data;
188 uint64_t data;
189 EventNotifier *e;
190 };
191
192 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
193 MemoryRegionIoeventfd b)
194 {
195 if (int128_lt(a.addr.start, b.addr.start)) {
196 return true;
197 } else if (int128_gt(a.addr.start, b.addr.start)) {
198 return false;
199 } else if (int128_lt(a.addr.size, b.addr.size)) {
200 return true;
201 } else if (int128_gt(a.addr.size, b.addr.size)) {
202 return false;
203 } else if (a.match_data < b.match_data) {
204 return true;
205 } else if (a.match_data > b.match_data) {
206 return false;
207 } else if (a.match_data) {
208 if (a.data < b.data) {
209 return true;
210 } else if (a.data > b.data) {
211 return false;
212 }
213 }
214 if (a.e < b.e) {
215 return true;
216 } else if (a.e > b.e) {
217 return false;
218 }
219 return false;
220 }
221
222 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
223 MemoryRegionIoeventfd b)
224 {
225 return !memory_region_ioeventfd_before(a, b)
226 && !memory_region_ioeventfd_before(b, a);
227 }
228
229 typedef struct FlatRange FlatRange;
230 typedef struct FlatView FlatView;
231
232 /* Range of memory in the global map. Addresses are absolute. */
233 struct FlatRange {
234 MemoryRegion *mr;
235 hwaddr offset_in_region;
236 AddrRange addr;
237 uint8_t dirty_log_mask;
238 bool romd_mode;
239 bool readonly;
240 };
241
242 /* Flattened global view of current active memory hierarchy. Kept in sorted
243 * order.
244 */
245 struct FlatView {
246 unsigned ref;
247 FlatRange *ranges;
248 unsigned nr;
249 unsigned nr_allocated;
250 };
251
252 typedef struct AddressSpaceOps AddressSpaceOps;
253
254 #define FOR_EACH_FLAT_RANGE(var, view) \
255 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
256
257 static bool flatrange_equal(FlatRange *a, FlatRange *b)
258 {
259 return a->mr == b->mr
260 && addrrange_equal(a->addr, b->addr)
261 && a->offset_in_region == b->offset_in_region
262 && a->romd_mode == b->romd_mode
263 && a->readonly == b->readonly;
264 }
265
266 static void flatview_init(FlatView *view)
267 {
268 view->ref = 1;
269 view->ranges = NULL;
270 view->nr = 0;
271 view->nr_allocated = 0;
272 }
273
274 /* Insert a range into a given position. Caller is responsible for maintaining
275 * sorting order.
276 */
277 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
278 {
279 if (view->nr == view->nr_allocated) {
280 view->nr_allocated = MAX(2 * view->nr, 10);
281 view->ranges = g_realloc(view->ranges,
282 view->nr_allocated * sizeof(*view->ranges));
283 }
284 memmove(view->ranges + pos + 1, view->ranges + pos,
285 (view->nr - pos) * sizeof(FlatRange));
286 view->ranges[pos] = *range;
287 memory_region_ref(range->mr);
288 ++view->nr;
289 }
290
291 static void flatview_destroy(FlatView *view)
292 {
293 int i;
294
295 for (i = 0; i < view->nr; i++) {
296 memory_region_unref(view->ranges[i].mr);
297 }
298 g_free(view->ranges);
299 g_free(view);
300 }
301
302 static void flatview_ref(FlatView *view)
303 {
304 atomic_inc(&view->ref);
305 }
306
307 static void flatview_unref(FlatView *view)
308 {
309 if (atomic_fetch_dec(&view->ref) == 1) {
310 flatview_destroy(view);
311 }
312 }
313
314 static bool can_merge(FlatRange *r1, FlatRange *r2)
315 {
316 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
317 && r1->mr == r2->mr
318 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
319 r1->addr.size),
320 int128_make64(r2->offset_in_region))
321 && r1->dirty_log_mask == r2->dirty_log_mask
322 && r1->romd_mode == r2->romd_mode
323 && r1->readonly == r2->readonly;
324 }
325
326 /* Attempt to simplify a view by merging adjacent ranges */
327 static void flatview_simplify(FlatView *view)
328 {
329 unsigned i, j;
330
331 i = 0;
332 while (i < view->nr) {
333 j = i + 1;
334 while (j < view->nr
335 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
336 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
337 ++j;
338 }
339 ++i;
340 memmove(&view->ranges[i], &view->ranges[j],
341 (view->nr - j) * sizeof(view->ranges[j]));
342 view->nr -= j - i;
343 }
344 }
345
346 static bool memory_region_big_endian(MemoryRegion *mr)
347 {
348 #ifdef TARGET_WORDS_BIGENDIAN
349 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
350 #else
351 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
352 #endif
353 }
354
355 static bool memory_region_wrong_endianness(MemoryRegion *mr)
356 {
357 #ifdef TARGET_WORDS_BIGENDIAN
358 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
359 #else
360 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
361 #endif
362 }
363
364 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
365 {
366 if (memory_region_wrong_endianness(mr)) {
367 switch (size) {
368 case 1:
369 break;
370 case 2:
371 *data = bswap16(*data);
372 break;
373 case 4:
374 *data = bswap32(*data);
375 break;
376 case 8:
377 *data = bswap64(*data);
378 break;
379 default:
380 abort();
381 }
382 }
383 }
384
385 static void memory_region_oldmmio_read_accessor(MemoryRegion *mr,
386 hwaddr addr,
387 uint64_t *value,
388 unsigned size,
389 unsigned shift,
390 uint64_t mask)
391 {
392 uint64_t tmp;
393
394 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
395 trace_memory_region_ops_read(mr, addr, tmp, size);
396 *value |= (tmp & mask) << shift;
397 }
398
399 static void memory_region_read_accessor(MemoryRegion *mr,
400 hwaddr addr,
401 uint64_t *value,
402 unsigned size,
403 unsigned shift,
404 uint64_t mask)
405 {
406 uint64_t tmp;
407
408 if (mr->flush_coalesced_mmio) {
409 qemu_flush_coalesced_mmio_buffer();
410 }
411 tmp = mr->ops->read(mr->opaque, addr, size);
412 trace_memory_region_ops_read(mr, addr, tmp, size);
413 *value |= (tmp & mask) << shift;
414 }
415
416 static void memory_region_oldmmio_write_accessor(MemoryRegion *mr,
417 hwaddr addr,
418 uint64_t *value,
419 unsigned size,
420 unsigned shift,
421 uint64_t mask)
422 {
423 uint64_t tmp;
424
425 tmp = (*value >> shift) & mask;
426 trace_memory_region_ops_write(mr, addr, tmp, size);
427 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
428 }
429
430 static void memory_region_write_accessor(MemoryRegion *mr,
431 hwaddr addr,
432 uint64_t *value,
433 unsigned size,
434 unsigned shift,
435 uint64_t mask)
436 {
437 uint64_t tmp;
438
439 if (mr->flush_coalesced_mmio) {
440 qemu_flush_coalesced_mmio_buffer();
441 }
442 tmp = (*value >> shift) & mask;
443 trace_memory_region_ops_write(mr, addr, tmp, size);
444 mr->ops->write(mr->opaque, addr, tmp, size);
445 }
446
447 static void access_with_adjusted_size(hwaddr addr,
448 uint64_t *value,
449 unsigned size,
450 unsigned access_size_min,
451 unsigned access_size_max,
452 void (*access)(MemoryRegion *mr,
453 hwaddr addr,
454 uint64_t *value,
455 unsigned size,
456 unsigned shift,
457 uint64_t mask),
458 MemoryRegion *mr)
459 {
460 uint64_t access_mask;
461 unsigned access_size;
462 unsigned i;
463
464 if (!access_size_min) {
465 access_size_min = 1;
466 }
467 if (!access_size_max) {
468 access_size_max = 4;
469 }
470
471 /* FIXME: support unaligned access? */
472 access_size = MAX(MIN(size, access_size_max), access_size_min);
473 access_mask = -1ULL >> (64 - access_size * 8);
474 if (memory_region_big_endian(mr)) {
475 for (i = 0; i < size; i += access_size) {
476 access(mr, addr + i, value, access_size,
477 (size - access_size - i) * 8, access_mask);
478 }
479 } else {
480 for (i = 0; i < size; i += access_size) {
481 access(mr, addr + i, value, access_size, i * 8, access_mask);
482 }
483 }
484 }
485
486 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
487 {
488 AddressSpace *as;
489
490 while (mr->container) {
491 mr = mr->container;
492 }
493 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
494 if (mr == as->root) {
495 return as;
496 }
497 }
498 return NULL;
499 }
500
501 /* Render a memory region into the global view. Ranges in @view obscure
502 * ranges in @mr.
503 */
504 static void render_memory_region(FlatView *view,
505 MemoryRegion *mr,
506 Int128 base,
507 AddrRange clip,
508 bool readonly)
509 {
510 MemoryRegion *subregion;
511 unsigned i;
512 hwaddr offset_in_region;
513 Int128 remain;
514 Int128 now;
515 FlatRange fr;
516 AddrRange tmp;
517
518 if (!mr->enabled) {
519 return;
520 }
521
522 int128_addto(&base, int128_make64(mr->addr));
523 readonly |= mr->readonly;
524
525 tmp = addrrange_make(base, mr->size);
526
527 if (!addrrange_intersects(tmp, clip)) {
528 return;
529 }
530
531 clip = addrrange_intersection(tmp, clip);
532
533 if (mr->alias) {
534 int128_subfrom(&base, int128_make64(mr->alias->addr));
535 int128_subfrom(&base, int128_make64(mr->alias_offset));
536 render_memory_region(view, mr->alias, base, clip, readonly);
537 return;
538 }
539
540 /* Render subregions in priority order. */
541 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
542 render_memory_region(view, subregion, base, clip, readonly);
543 }
544
545 if (!mr->terminates) {
546 return;
547 }
548
549 offset_in_region = int128_get64(int128_sub(clip.start, base));
550 base = clip.start;
551 remain = clip.size;
552
553 fr.mr = mr;
554 fr.dirty_log_mask = mr->dirty_log_mask;
555 fr.romd_mode = mr->romd_mode;
556 fr.readonly = readonly;
557
558 /* Render the region itself into any gaps left by the current view. */
559 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
560 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
561 continue;
562 }
563 if (int128_lt(base, view->ranges[i].addr.start)) {
564 now = int128_min(remain,
565 int128_sub(view->ranges[i].addr.start, base));
566 fr.offset_in_region = offset_in_region;
567 fr.addr = addrrange_make(base, now);
568 flatview_insert(view, i, &fr);
569 ++i;
570 int128_addto(&base, now);
571 offset_in_region += int128_get64(now);
572 int128_subfrom(&remain, now);
573 }
574 now = int128_sub(int128_min(int128_add(base, remain),
575 addrrange_end(view->ranges[i].addr)),
576 base);
577 int128_addto(&base, now);
578 offset_in_region += int128_get64(now);
579 int128_subfrom(&remain, now);
580 }
581 if (int128_nz(remain)) {
582 fr.offset_in_region = offset_in_region;
583 fr.addr = addrrange_make(base, remain);
584 flatview_insert(view, i, &fr);
585 }
586 }
587
588 /* Render a memory topology into a list of disjoint absolute ranges. */
589 static FlatView *generate_memory_topology(MemoryRegion *mr)
590 {
591 FlatView *view;
592
593 view = g_new(FlatView, 1);
594 flatview_init(view);
595
596 if (mr) {
597 render_memory_region(view, mr, int128_zero(),
598 addrrange_make(int128_zero(), int128_2_64()), false);
599 }
600 flatview_simplify(view);
601
602 return view;
603 }
604
605 static void address_space_add_del_ioeventfds(AddressSpace *as,
606 MemoryRegionIoeventfd *fds_new,
607 unsigned fds_new_nb,
608 MemoryRegionIoeventfd *fds_old,
609 unsigned fds_old_nb)
610 {
611 unsigned iold, inew;
612 MemoryRegionIoeventfd *fd;
613 MemoryRegionSection section;
614
615 /* Generate a symmetric difference of the old and new fd sets, adding
616 * and deleting as necessary.
617 */
618
619 iold = inew = 0;
620 while (iold < fds_old_nb || inew < fds_new_nb) {
621 if (iold < fds_old_nb
622 && (inew == fds_new_nb
623 || memory_region_ioeventfd_before(fds_old[iold],
624 fds_new[inew]))) {
625 fd = &fds_old[iold];
626 section = (MemoryRegionSection) {
627 .address_space = as,
628 .offset_within_address_space = int128_get64(fd->addr.start),
629 .size = fd->addr.size,
630 };
631 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
632 fd->match_data, fd->data, fd->e);
633 ++iold;
634 } else if (inew < fds_new_nb
635 && (iold == fds_old_nb
636 || memory_region_ioeventfd_before(fds_new[inew],
637 fds_old[iold]))) {
638 fd = &fds_new[inew];
639 section = (MemoryRegionSection) {
640 .address_space = as,
641 .offset_within_address_space = int128_get64(fd->addr.start),
642 .size = fd->addr.size,
643 };
644 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
645 fd->match_data, fd->data, fd->e);
646 ++inew;
647 } else {
648 ++iold;
649 ++inew;
650 }
651 }
652 }
653
654 static FlatView *address_space_get_flatview(AddressSpace *as)
655 {
656 FlatView *view;
657
658 qemu_mutex_lock(&flat_view_mutex);
659 view = as->current_map;
660 flatview_ref(view);
661 qemu_mutex_unlock(&flat_view_mutex);
662 return view;
663 }
664
665 static void address_space_update_ioeventfds(AddressSpace *as)
666 {
667 FlatView *view;
668 FlatRange *fr;
669 unsigned ioeventfd_nb = 0;
670 MemoryRegionIoeventfd *ioeventfds = NULL;
671 AddrRange tmp;
672 unsigned i;
673
674 view = address_space_get_flatview(as);
675 FOR_EACH_FLAT_RANGE(fr, view) {
676 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
677 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
678 int128_sub(fr->addr.start,
679 int128_make64(fr->offset_in_region)));
680 if (addrrange_intersects(fr->addr, tmp)) {
681 ++ioeventfd_nb;
682 ioeventfds = g_realloc(ioeventfds,
683 ioeventfd_nb * sizeof(*ioeventfds));
684 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
685 ioeventfds[ioeventfd_nb-1].addr = tmp;
686 }
687 }
688 }
689
690 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
691 as->ioeventfds, as->ioeventfd_nb);
692
693 g_free(as->ioeventfds);
694 as->ioeventfds = ioeventfds;
695 as->ioeventfd_nb = ioeventfd_nb;
696 flatview_unref(view);
697 }
698
699 static void address_space_update_topology_pass(AddressSpace *as,
700 const FlatView *old_view,
701 const FlatView *new_view,
702 bool adding)
703 {
704 unsigned iold, inew;
705 FlatRange *frold, *frnew;
706
707 /* Generate a symmetric difference of the old and new memory maps.
708 * Kill ranges in the old map, and instantiate ranges in the new map.
709 */
710 iold = inew = 0;
711 while (iold < old_view->nr || inew < new_view->nr) {
712 if (iold < old_view->nr) {
713 frold = &old_view->ranges[iold];
714 } else {
715 frold = NULL;
716 }
717 if (inew < new_view->nr) {
718 frnew = &new_view->ranges[inew];
719 } else {
720 frnew = NULL;
721 }
722
723 if (frold
724 && (!frnew
725 || int128_lt(frold->addr.start, frnew->addr.start)
726 || (int128_eq(frold->addr.start, frnew->addr.start)
727 && !flatrange_equal(frold, frnew)))) {
728 /* In old but not in new, or in both but attributes changed. */
729
730 if (!adding) {
731 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
732 }
733
734 ++iold;
735 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
736 /* In both and unchanged (except logging may have changed) */
737
738 if (adding) {
739 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
740 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
741 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
742 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
743 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
744 }
745 }
746
747 ++iold;
748 ++inew;
749 } else {
750 /* In new */
751
752 if (adding) {
753 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
754 }
755
756 ++inew;
757 }
758 }
759 }
760
761
762 static void address_space_update_topology(AddressSpace *as)
763 {
764 FlatView *old_view = address_space_get_flatview(as);
765 FlatView *new_view = generate_memory_topology(as->root);
766
767 address_space_update_topology_pass(as, old_view, new_view, false);
768 address_space_update_topology_pass(as, old_view, new_view, true);
769
770 qemu_mutex_lock(&flat_view_mutex);
771 flatview_unref(as->current_map);
772 as->current_map = new_view;
773 qemu_mutex_unlock(&flat_view_mutex);
774
775 /* Note that all the old MemoryRegions are still alive up to this
776 * point. This relieves most MemoryListeners from the need to
777 * ref/unref the MemoryRegions they get---unless they use them
778 * outside the iothread mutex, in which case precise reference
779 * counting is necessary.
780 */
781 flatview_unref(old_view);
782
783 address_space_update_ioeventfds(as);
784 }
785
786 void memory_region_transaction_begin(void)
787 {
788 qemu_flush_coalesced_mmio_buffer();
789 ++memory_region_transaction_depth;
790 }
791
792 static void memory_region_clear_pending(void)
793 {
794 memory_region_update_pending = false;
795 ioeventfd_update_pending = false;
796 }
797
798 void memory_region_transaction_commit(void)
799 {
800 AddressSpace *as;
801
802 assert(memory_region_transaction_depth);
803 --memory_region_transaction_depth;
804 if (!memory_region_transaction_depth) {
805 if (memory_region_update_pending) {
806 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
807
808 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
809 address_space_update_topology(as);
810 }
811
812 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
813 } else if (ioeventfd_update_pending) {
814 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
815 address_space_update_ioeventfds(as);
816 }
817 }
818 memory_region_clear_pending();
819 }
820 }
821
822 static void memory_region_destructor_none(MemoryRegion *mr)
823 {
824 }
825
826 static void memory_region_destructor_ram(MemoryRegion *mr)
827 {
828 qemu_ram_free(mr->ram_addr);
829 }
830
831 static void memory_region_destructor_alias(MemoryRegion *mr)
832 {
833 memory_region_unref(mr->alias);
834 }
835
836 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
837 {
838 qemu_ram_free_from_ptr(mr->ram_addr);
839 }
840
841 static void memory_region_destructor_rom_device(MemoryRegion *mr)
842 {
843 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
844 }
845
846 static bool memory_region_need_escape(char c)
847 {
848 return c == '/' || c == '[' || c == '\\' || c == ']';
849 }
850
851 static char *memory_region_escape_name(const char *name)
852 {
853 const char *p;
854 char *escaped, *q;
855 uint8_t c;
856 size_t bytes = 0;
857
858 for (p = name; *p; p++) {
859 bytes += memory_region_need_escape(*p) ? 4 : 1;
860 }
861 if (bytes == p - name) {
862 return g_memdup(name, bytes + 1);
863 }
864
865 escaped = g_malloc(bytes + 1);
866 for (p = name, q = escaped; *p; p++) {
867 c = *p;
868 if (unlikely(memory_region_need_escape(c))) {
869 *q++ = '\\';
870 *q++ = 'x';
871 *q++ = "0123456789abcdef"[c >> 4];
872 c = "0123456789abcdef"[c & 15];
873 }
874 *q++ = c;
875 }
876 *q = 0;
877 return escaped;
878 }
879
880 static void object_property_add_child_array(Object *owner,
881 const char *name,
882 Object *child)
883 {
884 int i;
885 char *base_name = memory_region_escape_name(name);
886
887 for (i = 0; ; i++) {
888 char *full_name = g_strdup_printf("%s[%d]", base_name, i);
889 Error *local_err = NULL;
890
891 object_property_add_child(owner, full_name, child, &local_err);
892 g_free(full_name);
893 if (!local_err) {
894 break;
895 }
896
897 error_free(local_err);
898 }
899
900 g_free(base_name);
901 }
902
903
904 void memory_region_init(MemoryRegion *mr,
905 Object *owner,
906 const char *name,
907 uint64_t size)
908 {
909 if (!owner) {
910 owner = qdev_get_machine();
911 }
912
913 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
914 mr->size = int128_make64(size);
915 if (size == UINT64_MAX) {
916 mr->size = int128_2_64();
917 }
918 mr->name = g_strdup(name);
919
920 if (name) {
921 object_property_add_child_array(owner, name, OBJECT(mr));
922 object_unref(OBJECT(mr));
923 }
924 }
925
926 static void memory_region_get_addr(Object *obj, Visitor *v, void *opaque,
927 const char *name, Error **errp)
928 {
929 MemoryRegion *mr = MEMORY_REGION(obj);
930 uint64_t value = mr->addr;
931
932 visit_type_uint64(v, &value, name, errp);
933 }
934
935 static void memory_region_get_container(Object *obj, Visitor *v, void *opaque,
936 const char *name, Error **errp)
937 {
938 MemoryRegion *mr = MEMORY_REGION(obj);
939 gchar *path = (gchar *)"";
940
941 if (mr->container) {
942 path = object_get_canonical_path(OBJECT(mr->container));
943 }
944 visit_type_str(v, &path, name, errp);
945 if (mr->container) {
946 g_free(path);
947 }
948 }
949
950 static Object *memory_region_resolve_container(Object *obj, void *opaque,
951 const char *part)
952 {
953 MemoryRegion *mr = MEMORY_REGION(obj);
954
955 return OBJECT(mr->container);
956 }
957
958 static void memory_region_get_priority(Object *obj, Visitor *v, void *opaque,
959 const char *name, Error **errp)
960 {
961 MemoryRegion *mr = MEMORY_REGION(obj);
962 int32_t value = mr->priority;
963
964 visit_type_int32(v, &value, name, errp);
965 }
966
967 static bool memory_region_get_may_overlap(Object *obj, Error **errp)
968 {
969 MemoryRegion *mr = MEMORY_REGION(obj);
970
971 return mr->may_overlap;
972 }
973
974 static void memory_region_get_size(Object *obj, Visitor *v, void *opaque,
975 const char *name, Error **errp)
976 {
977 MemoryRegion *mr = MEMORY_REGION(obj);
978 uint64_t value = memory_region_size(mr);
979
980 visit_type_uint64(v, &value, name, errp);
981 }
982
983 static void memory_region_initfn(Object *obj)
984 {
985 MemoryRegion *mr = MEMORY_REGION(obj);
986 ObjectProperty *op;
987
988 mr->ops = &unassigned_mem_ops;
989 mr->enabled = true;
990 mr->romd_mode = true;
991 mr->destructor = memory_region_destructor_none;
992 QTAILQ_INIT(&mr->subregions);
993 QTAILQ_INIT(&mr->coalesced);
994
995 op = object_property_add(OBJECT(mr), "container",
996 "link<" TYPE_MEMORY_REGION ">",
997 memory_region_get_container,
998 NULL, /* memory_region_set_container */
999 NULL, NULL, &error_abort);
1000 op->resolve = memory_region_resolve_container;
1001
1002 object_property_add(OBJECT(mr), "addr", "uint64",
1003 memory_region_get_addr,
1004 NULL, /* memory_region_set_addr */
1005 NULL, NULL, &error_abort);
1006 object_property_add(OBJECT(mr), "priority", "uint32",
1007 memory_region_get_priority,
1008 NULL, /* memory_region_set_priority */
1009 NULL, NULL, &error_abort);
1010 object_property_add_bool(OBJECT(mr), "may-overlap",
1011 memory_region_get_may_overlap,
1012 NULL, /* memory_region_set_may_overlap */
1013 &error_abort);
1014 object_property_add(OBJECT(mr), "size", "uint64",
1015 memory_region_get_size,
1016 NULL, /* memory_region_set_size, */
1017 NULL, NULL, &error_abort);
1018 }
1019
1020 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1021 unsigned size)
1022 {
1023 #ifdef DEBUG_UNASSIGNED
1024 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1025 #endif
1026 if (current_cpu != NULL) {
1027 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1028 }
1029 return 0;
1030 }
1031
1032 static void unassigned_mem_write(void *opaque, hwaddr addr,
1033 uint64_t val, unsigned size)
1034 {
1035 #ifdef DEBUG_UNASSIGNED
1036 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1037 #endif
1038 if (current_cpu != NULL) {
1039 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1040 }
1041 }
1042
1043 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1044 unsigned size, bool is_write)
1045 {
1046 return false;
1047 }
1048
1049 const MemoryRegionOps unassigned_mem_ops = {
1050 .valid.accepts = unassigned_mem_accepts,
1051 .endianness = DEVICE_NATIVE_ENDIAN,
1052 };
1053
1054 bool memory_region_access_valid(MemoryRegion *mr,
1055 hwaddr addr,
1056 unsigned size,
1057 bool is_write)
1058 {
1059 int access_size_min, access_size_max;
1060 int access_size, i;
1061
1062 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1063 return false;
1064 }
1065
1066 if (!mr->ops->valid.accepts) {
1067 return true;
1068 }
1069
1070 access_size_min = mr->ops->valid.min_access_size;
1071 if (!mr->ops->valid.min_access_size) {
1072 access_size_min = 1;
1073 }
1074
1075 access_size_max = mr->ops->valid.max_access_size;
1076 if (!mr->ops->valid.max_access_size) {
1077 access_size_max = 4;
1078 }
1079
1080 access_size = MAX(MIN(size, access_size_max), access_size_min);
1081 for (i = 0; i < size; i += access_size) {
1082 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1083 is_write)) {
1084 return false;
1085 }
1086 }
1087
1088 return true;
1089 }
1090
1091 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
1092 hwaddr addr,
1093 unsigned size)
1094 {
1095 uint64_t data = 0;
1096
1097 if (mr->ops->read) {
1098 access_with_adjusted_size(addr, &data, size,
1099 mr->ops->impl.min_access_size,
1100 mr->ops->impl.max_access_size,
1101 memory_region_read_accessor, mr);
1102 } else {
1103 access_with_adjusted_size(addr, &data, size, 1, 4,
1104 memory_region_oldmmio_read_accessor, mr);
1105 }
1106
1107 return data;
1108 }
1109
1110 static bool memory_region_dispatch_read(MemoryRegion *mr,
1111 hwaddr addr,
1112 uint64_t *pval,
1113 unsigned size)
1114 {
1115 if (!memory_region_access_valid(mr, addr, size, false)) {
1116 *pval = unassigned_mem_read(mr, addr, size);
1117 return true;
1118 }
1119
1120 *pval = memory_region_dispatch_read1(mr, addr, size);
1121 adjust_endianness(mr, pval, size);
1122 return false;
1123 }
1124
1125 static bool memory_region_dispatch_write(MemoryRegion *mr,
1126 hwaddr addr,
1127 uint64_t data,
1128 unsigned size)
1129 {
1130 if (!memory_region_access_valid(mr, addr, size, true)) {
1131 unassigned_mem_write(mr, addr, data, size);
1132 return true;
1133 }
1134
1135 adjust_endianness(mr, &data, size);
1136
1137 if (mr->ops->write) {
1138 access_with_adjusted_size(addr, &data, size,
1139 mr->ops->impl.min_access_size,
1140 mr->ops->impl.max_access_size,
1141 memory_region_write_accessor, mr);
1142 } else {
1143 access_with_adjusted_size(addr, &data, size, 1, 4,
1144 memory_region_oldmmio_write_accessor, mr);
1145 }
1146 return false;
1147 }
1148
1149 void memory_region_init_io(MemoryRegion *mr,
1150 Object *owner,
1151 const MemoryRegionOps *ops,
1152 void *opaque,
1153 const char *name,
1154 uint64_t size)
1155 {
1156 memory_region_init(mr, owner, name, size);
1157 mr->ops = ops;
1158 mr->opaque = opaque;
1159 mr->terminates = true;
1160 mr->ram_addr = ~(ram_addr_t)0;
1161 }
1162
1163 void memory_region_init_ram(MemoryRegion *mr,
1164 Object *owner,
1165 const char *name,
1166 uint64_t size)
1167 {
1168 memory_region_init(mr, owner, name, size);
1169 mr->ram = true;
1170 mr->terminates = true;
1171 mr->destructor = memory_region_destructor_ram;
1172 mr->ram_addr = qemu_ram_alloc(size, mr);
1173 }
1174
1175 #ifdef __linux__
1176 void memory_region_init_ram_from_file(MemoryRegion *mr,
1177 struct Object *owner,
1178 const char *name,
1179 uint64_t size,
1180 bool share,
1181 const char *path,
1182 Error **errp)
1183 {
1184 memory_region_init(mr, owner, name, size);
1185 mr->ram = true;
1186 mr->terminates = true;
1187 mr->destructor = memory_region_destructor_ram;
1188 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1189 }
1190 #endif
1191
1192 void memory_region_init_ram_ptr(MemoryRegion *mr,
1193 Object *owner,
1194 const char *name,
1195 uint64_t size,
1196 void *ptr)
1197 {
1198 memory_region_init(mr, owner, name, size);
1199 mr->ram = true;
1200 mr->terminates = true;
1201 mr->destructor = memory_region_destructor_ram_from_ptr;
1202 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
1203 }
1204
1205 void memory_region_init_alias(MemoryRegion *mr,
1206 Object *owner,
1207 const char *name,
1208 MemoryRegion *orig,
1209 hwaddr offset,
1210 uint64_t size)
1211 {
1212 memory_region_init(mr, owner, name, size);
1213 memory_region_ref(orig);
1214 mr->destructor = memory_region_destructor_alias;
1215 mr->alias = orig;
1216 mr->alias_offset = offset;
1217 }
1218
1219 void memory_region_init_rom_device(MemoryRegion *mr,
1220 Object *owner,
1221 const MemoryRegionOps *ops,
1222 void *opaque,
1223 const char *name,
1224 uint64_t size)
1225 {
1226 memory_region_init(mr, owner, name, size);
1227 mr->ops = ops;
1228 mr->opaque = opaque;
1229 mr->terminates = true;
1230 mr->rom_device = true;
1231 mr->destructor = memory_region_destructor_rom_device;
1232 mr->ram_addr = qemu_ram_alloc(size, mr);
1233 }
1234
1235 void memory_region_init_iommu(MemoryRegion *mr,
1236 Object *owner,
1237 const MemoryRegionIOMMUOps *ops,
1238 const char *name,
1239 uint64_t size)
1240 {
1241 memory_region_init(mr, owner, name, size);
1242 mr->iommu_ops = ops,
1243 mr->terminates = true; /* then re-forwards */
1244 notifier_list_init(&mr->iommu_notify);
1245 }
1246
1247 void memory_region_init_reservation(MemoryRegion *mr,
1248 Object *owner,
1249 const char *name,
1250 uint64_t size)
1251 {
1252 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1253 }
1254
1255 static void memory_region_finalize(Object *obj)
1256 {
1257 MemoryRegion *mr = MEMORY_REGION(obj);
1258
1259 assert(QTAILQ_EMPTY(&mr->subregions));
1260 assert(memory_region_transaction_depth == 0);
1261 mr->destructor(mr);
1262 memory_region_clear_coalescing(mr);
1263 g_free((char *)mr->name);
1264 g_free(mr->ioeventfds);
1265 }
1266
1267 void memory_region_destroy(MemoryRegion *mr)
1268 {
1269 object_unparent(OBJECT(mr));
1270 }
1271
1272
1273 Object *memory_region_owner(MemoryRegion *mr)
1274 {
1275 Object *obj = OBJECT(mr);
1276 return obj->parent;
1277 }
1278
1279 void memory_region_ref(MemoryRegion *mr)
1280 {
1281 /* MMIO callbacks most likely will access data that belongs
1282 * to the owner, hence the need to ref/unref the owner whenever
1283 * the memory region is in use.
1284 *
1285 * The memory region is a child of its owner. As long as the
1286 * owner doesn't call unparent itself on the memory region,
1287 * ref-ing the owner will also keep the memory region alive.
1288 * Memory regions without an owner are supposed to never go away,
1289 * but we still ref/unref them for debugging purposes.
1290 */
1291 Object *obj = OBJECT(mr);
1292 if (obj && obj->parent) {
1293 object_ref(obj->parent);
1294 } else {
1295 object_ref(obj);
1296 }
1297 }
1298
1299 void memory_region_unref(MemoryRegion *mr)
1300 {
1301 Object *obj = OBJECT(mr);
1302 if (obj && obj->parent) {
1303 object_unref(obj->parent);
1304 } else {
1305 object_unref(obj);
1306 }
1307 }
1308
1309 uint64_t memory_region_size(MemoryRegion *mr)
1310 {
1311 if (int128_eq(mr->size, int128_2_64())) {
1312 return UINT64_MAX;
1313 }
1314 return int128_get64(mr->size);
1315 }
1316
1317 const char *memory_region_name(MemoryRegion *mr)
1318 {
1319 return mr->name;
1320 }
1321
1322 bool memory_region_is_ram(MemoryRegion *mr)
1323 {
1324 return mr->ram;
1325 }
1326
1327 bool memory_region_is_logging(MemoryRegion *mr)
1328 {
1329 return mr->dirty_log_mask;
1330 }
1331
1332 bool memory_region_is_rom(MemoryRegion *mr)
1333 {
1334 return mr->ram && mr->readonly;
1335 }
1336
1337 bool memory_region_is_iommu(MemoryRegion *mr)
1338 {
1339 return mr->iommu_ops;
1340 }
1341
1342 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1343 {
1344 notifier_list_add(&mr->iommu_notify, n);
1345 }
1346
1347 void memory_region_unregister_iommu_notifier(Notifier *n)
1348 {
1349 notifier_remove(n);
1350 }
1351
1352 void memory_region_notify_iommu(MemoryRegion *mr,
1353 IOMMUTLBEntry entry)
1354 {
1355 assert(memory_region_is_iommu(mr));
1356 notifier_list_notify(&mr->iommu_notify, &entry);
1357 }
1358
1359 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1360 {
1361 uint8_t mask = 1 << client;
1362
1363 memory_region_transaction_begin();
1364 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1365 memory_region_update_pending |= mr->enabled;
1366 memory_region_transaction_commit();
1367 }
1368
1369 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1370 hwaddr size, unsigned client)
1371 {
1372 assert(mr->terminates);
1373 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1374 }
1375
1376 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1377 hwaddr size)
1378 {
1379 assert(mr->terminates);
1380 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size);
1381 }
1382
1383 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1384 hwaddr size, unsigned client)
1385 {
1386 bool ret;
1387 assert(mr->terminates);
1388 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1389 if (ret) {
1390 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
1391 }
1392 return ret;
1393 }
1394
1395
1396 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1397 {
1398 AddressSpace *as;
1399 FlatRange *fr;
1400
1401 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1402 FlatView *view = address_space_get_flatview(as);
1403 FOR_EACH_FLAT_RANGE(fr, view) {
1404 if (fr->mr == mr) {
1405 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1406 }
1407 }
1408 flatview_unref(view);
1409 }
1410 }
1411
1412 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1413 {
1414 if (mr->readonly != readonly) {
1415 memory_region_transaction_begin();
1416 mr->readonly = readonly;
1417 memory_region_update_pending |= mr->enabled;
1418 memory_region_transaction_commit();
1419 }
1420 }
1421
1422 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1423 {
1424 if (mr->romd_mode != romd_mode) {
1425 memory_region_transaction_begin();
1426 mr->romd_mode = romd_mode;
1427 memory_region_update_pending |= mr->enabled;
1428 memory_region_transaction_commit();
1429 }
1430 }
1431
1432 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1433 hwaddr size, unsigned client)
1434 {
1435 assert(mr->terminates);
1436 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
1437 }
1438
1439 int memory_region_get_fd(MemoryRegion *mr)
1440 {
1441 if (mr->alias) {
1442 return memory_region_get_fd(mr->alias);
1443 }
1444
1445 assert(mr->terminates);
1446
1447 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1448 }
1449
1450 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1451 {
1452 if (mr->alias) {
1453 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1454 }
1455
1456 assert(mr->terminates);
1457
1458 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1459 }
1460
1461 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1462 {
1463 FlatView *view;
1464 FlatRange *fr;
1465 CoalescedMemoryRange *cmr;
1466 AddrRange tmp;
1467 MemoryRegionSection section;
1468
1469 view = address_space_get_flatview(as);
1470 FOR_EACH_FLAT_RANGE(fr, view) {
1471 if (fr->mr == mr) {
1472 section = (MemoryRegionSection) {
1473 .address_space = as,
1474 .offset_within_address_space = int128_get64(fr->addr.start),
1475 .size = fr->addr.size,
1476 };
1477
1478 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1479 int128_get64(fr->addr.start),
1480 int128_get64(fr->addr.size));
1481 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1482 tmp = addrrange_shift(cmr->addr,
1483 int128_sub(fr->addr.start,
1484 int128_make64(fr->offset_in_region)));
1485 if (!addrrange_intersects(tmp, fr->addr)) {
1486 continue;
1487 }
1488 tmp = addrrange_intersection(tmp, fr->addr);
1489 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1490 int128_get64(tmp.start),
1491 int128_get64(tmp.size));
1492 }
1493 }
1494 }
1495 flatview_unref(view);
1496 }
1497
1498 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1499 {
1500 AddressSpace *as;
1501
1502 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1503 memory_region_update_coalesced_range_as(mr, as);
1504 }
1505 }
1506
1507 void memory_region_set_coalescing(MemoryRegion *mr)
1508 {
1509 memory_region_clear_coalescing(mr);
1510 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1511 }
1512
1513 void memory_region_add_coalescing(MemoryRegion *mr,
1514 hwaddr offset,
1515 uint64_t size)
1516 {
1517 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1518
1519 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1520 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1521 memory_region_update_coalesced_range(mr);
1522 memory_region_set_flush_coalesced(mr);
1523 }
1524
1525 void memory_region_clear_coalescing(MemoryRegion *mr)
1526 {
1527 CoalescedMemoryRange *cmr;
1528 bool updated = false;
1529
1530 qemu_flush_coalesced_mmio_buffer();
1531 mr->flush_coalesced_mmio = false;
1532
1533 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1534 cmr = QTAILQ_FIRST(&mr->coalesced);
1535 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1536 g_free(cmr);
1537 updated = true;
1538 }
1539
1540 if (updated) {
1541 memory_region_update_coalesced_range(mr);
1542 }
1543 }
1544
1545 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1546 {
1547 mr->flush_coalesced_mmio = true;
1548 }
1549
1550 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1551 {
1552 qemu_flush_coalesced_mmio_buffer();
1553 if (QTAILQ_EMPTY(&mr->coalesced)) {
1554 mr->flush_coalesced_mmio = false;
1555 }
1556 }
1557
1558 void memory_region_add_eventfd(MemoryRegion *mr,
1559 hwaddr addr,
1560 unsigned size,
1561 bool match_data,
1562 uint64_t data,
1563 EventNotifier *e)
1564 {
1565 MemoryRegionIoeventfd mrfd = {
1566 .addr.start = int128_make64(addr),
1567 .addr.size = int128_make64(size),
1568 .match_data = match_data,
1569 .data = data,
1570 .e = e,
1571 };
1572 unsigned i;
1573
1574 adjust_endianness(mr, &mrfd.data, size);
1575 memory_region_transaction_begin();
1576 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1577 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1578 break;
1579 }
1580 }
1581 ++mr->ioeventfd_nb;
1582 mr->ioeventfds = g_realloc(mr->ioeventfds,
1583 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1584 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1585 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1586 mr->ioeventfds[i] = mrfd;
1587 ioeventfd_update_pending |= mr->enabled;
1588 memory_region_transaction_commit();
1589 }
1590
1591 void memory_region_del_eventfd(MemoryRegion *mr,
1592 hwaddr addr,
1593 unsigned size,
1594 bool match_data,
1595 uint64_t data,
1596 EventNotifier *e)
1597 {
1598 MemoryRegionIoeventfd mrfd = {
1599 .addr.start = int128_make64(addr),
1600 .addr.size = int128_make64(size),
1601 .match_data = match_data,
1602 .data = data,
1603 .e = e,
1604 };
1605 unsigned i;
1606
1607 adjust_endianness(mr, &mrfd.data, size);
1608 memory_region_transaction_begin();
1609 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1610 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1611 break;
1612 }
1613 }
1614 assert(i != mr->ioeventfd_nb);
1615 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1616 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1617 --mr->ioeventfd_nb;
1618 mr->ioeventfds = g_realloc(mr->ioeventfds,
1619 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1620 ioeventfd_update_pending |= mr->enabled;
1621 memory_region_transaction_commit();
1622 }
1623
1624 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1625 {
1626 hwaddr offset = subregion->addr;
1627 MemoryRegion *mr = subregion->container;
1628 MemoryRegion *other;
1629
1630 memory_region_transaction_begin();
1631
1632 memory_region_ref(subregion);
1633 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1634 if (subregion->may_overlap || other->may_overlap) {
1635 continue;
1636 }
1637 if (int128_ge(int128_make64(offset),
1638 int128_add(int128_make64(other->addr), other->size))
1639 || int128_le(int128_add(int128_make64(offset), subregion->size),
1640 int128_make64(other->addr))) {
1641 continue;
1642 }
1643 #if 0
1644 printf("warning: subregion collision %llx/%llx (%s) "
1645 "vs %llx/%llx (%s)\n",
1646 (unsigned long long)offset,
1647 (unsigned long long)int128_get64(subregion->size),
1648 subregion->name,
1649 (unsigned long long)other->addr,
1650 (unsigned long long)int128_get64(other->size),
1651 other->name);
1652 #endif
1653 }
1654 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1655 if (subregion->priority >= other->priority) {
1656 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1657 goto done;
1658 }
1659 }
1660 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1661 done:
1662 memory_region_update_pending |= mr->enabled && subregion->enabled;
1663 memory_region_transaction_commit();
1664 }
1665
1666 static void memory_region_add_subregion_common(MemoryRegion *mr,
1667 hwaddr offset,
1668 MemoryRegion *subregion)
1669 {
1670 assert(!subregion->container);
1671 subregion->container = mr;
1672 subregion->addr = offset;
1673 memory_region_update_container_subregions(subregion);
1674 }
1675
1676 void memory_region_add_subregion(MemoryRegion *mr,
1677 hwaddr offset,
1678 MemoryRegion *subregion)
1679 {
1680 subregion->may_overlap = false;
1681 subregion->priority = 0;
1682 memory_region_add_subregion_common(mr, offset, subregion);
1683 }
1684
1685 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1686 hwaddr offset,
1687 MemoryRegion *subregion,
1688 int priority)
1689 {
1690 subregion->may_overlap = true;
1691 subregion->priority = priority;
1692 memory_region_add_subregion_common(mr, offset, subregion);
1693 }
1694
1695 void memory_region_del_subregion(MemoryRegion *mr,
1696 MemoryRegion *subregion)
1697 {
1698 memory_region_transaction_begin();
1699 assert(subregion->container == mr);
1700 subregion->container = NULL;
1701 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1702 memory_region_unref(subregion);
1703 memory_region_update_pending |= mr->enabled && subregion->enabled;
1704 memory_region_transaction_commit();
1705 }
1706
1707 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1708 {
1709 if (enabled == mr->enabled) {
1710 return;
1711 }
1712 memory_region_transaction_begin();
1713 mr->enabled = enabled;
1714 memory_region_update_pending = true;
1715 memory_region_transaction_commit();
1716 }
1717
1718 static void memory_region_readd_subregion(MemoryRegion *mr)
1719 {
1720 MemoryRegion *container = mr->container;
1721
1722 if (container) {
1723 memory_region_transaction_begin();
1724 memory_region_ref(mr);
1725 memory_region_del_subregion(container, mr);
1726 mr->container = container;
1727 memory_region_update_container_subregions(mr);
1728 memory_region_unref(mr);
1729 memory_region_transaction_commit();
1730 }
1731 }
1732
1733 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1734 {
1735 if (addr != mr->addr) {
1736 mr->addr = addr;
1737 memory_region_readd_subregion(mr);
1738 }
1739 }
1740
1741 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1742 {
1743 assert(mr->alias);
1744
1745 if (offset == mr->alias_offset) {
1746 return;
1747 }
1748
1749 memory_region_transaction_begin();
1750 mr->alias_offset = offset;
1751 memory_region_update_pending |= mr->enabled;
1752 memory_region_transaction_commit();
1753 }
1754
1755 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1756 {
1757 return mr->ram_addr;
1758 }
1759
1760 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1761 {
1762 const AddrRange *addr = addr_;
1763 const FlatRange *fr = fr_;
1764
1765 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1766 return -1;
1767 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1768 return 1;
1769 }
1770 return 0;
1771 }
1772
1773 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1774 {
1775 return bsearch(&addr, view->ranges, view->nr,
1776 sizeof(FlatRange), cmp_flatrange_addr);
1777 }
1778
1779 bool memory_region_present(MemoryRegion *container, hwaddr addr)
1780 {
1781 MemoryRegion *mr = memory_region_find(container, addr, 1).mr;
1782 if (!mr || (mr == container)) {
1783 return false;
1784 }
1785 memory_region_unref(mr);
1786 return true;
1787 }
1788
1789 bool memory_region_is_mapped(MemoryRegion *mr)
1790 {
1791 return mr->container ? true : false;
1792 }
1793
1794 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1795 hwaddr addr, uint64_t size)
1796 {
1797 MemoryRegionSection ret = { .mr = NULL };
1798 MemoryRegion *root;
1799 AddressSpace *as;
1800 AddrRange range;
1801 FlatView *view;
1802 FlatRange *fr;
1803
1804 addr += mr->addr;
1805 for (root = mr; root->container; ) {
1806 root = root->container;
1807 addr += root->addr;
1808 }
1809
1810 as = memory_region_to_address_space(root);
1811 if (!as) {
1812 return ret;
1813 }
1814 range = addrrange_make(int128_make64(addr), int128_make64(size));
1815
1816 view = address_space_get_flatview(as);
1817 fr = flatview_lookup(view, range);
1818 if (!fr) {
1819 flatview_unref(view);
1820 return ret;
1821 }
1822
1823 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1824 --fr;
1825 }
1826
1827 ret.mr = fr->mr;
1828 ret.address_space = as;
1829 range = addrrange_intersection(range, fr->addr);
1830 ret.offset_within_region = fr->offset_in_region;
1831 ret.offset_within_region += int128_get64(int128_sub(range.start,
1832 fr->addr.start));
1833 ret.size = range.size;
1834 ret.offset_within_address_space = int128_get64(range.start);
1835 ret.readonly = fr->readonly;
1836 memory_region_ref(ret.mr);
1837
1838 flatview_unref(view);
1839 return ret;
1840 }
1841
1842 void address_space_sync_dirty_bitmap(AddressSpace *as)
1843 {
1844 FlatView *view;
1845 FlatRange *fr;
1846
1847 view = address_space_get_flatview(as);
1848 FOR_EACH_FLAT_RANGE(fr, view) {
1849 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1850 }
1851 flatview_unref(view);
1852 }
1853
1854 void memory_global_dirty_log_start(void)
1855 {
1856 global_dirty_log = true;
1857 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1858 }
1859
1860 void memory_global_dirty_log_stop(void)
1861 {
1862 global_dirty_log = false;
1863 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1864 }
1865
1866 static void listener_add_address_space(MemoryListener *listener,
1867 AddressSpace *as)
1868 {
1869 FlatView *view;
1870 FlatRange *fr;
1871
1872 if (listener->address_space_filter
1873 && listener->address_space_filter != as) {
1874 return;
1875 }
1876
1877 if (global_dirty_log) {
1878 if (listener->log_global_start) {
1879 listener->log_global_start(listener);
1880 }
1881 }
1882
1883 view = address_space_get_flatview(as);
1884 FOR_EACH_FLAT_RANGE(fr, view) {
1885 MemoryRegionSection section = {
1886 .mr = fr->mr,
1887 .address_space = as,
1888 .offset_within_region = fr->offset_in_region,
1889 .size = fr->addr.size,
1890 .offset_within_address_space = int128_get64(fr->addr.start),
1891 .readonly = fr->readonly,
1892 };
1893 if (listener->region_add) {
1894 listener->region_add(listener, &section);
1895 }
1896 }
1897 flatview_unref(view);
1898 }
1899
1900 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1901 {
1902 MemoryListener *other = NULL;
1903 AddressSpace *as;
1904
1905 listener->address_space_filter = filter;
1906 if (QTAILQ_EMPTY(&memory_listeners)
1907 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1908 memory_listeners)->priority) {
1909 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1910 } else {
1911 QTAILQ_FOREACH(other, &memory_listeners, link) {
1912 if (listener->priority < other->priority) {
1913 break;
1914 }
1915 }
1916 QTAILQ_INSERT_BEFORE(other, listener, link);
1917 }
1918
1919 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1920 listener_add_address_space(listener, as);
1921 }
1922 }
1923
1924 void memory_listener_unregister(MemoryListener *listener)
1925 {
1926 QTAILQ_REMOVE(&memory_listeners, listener, link);
1927 }
1928
1929 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1930 {
1931 if (QTAILQ_EMPTY(&address_spaces)) {
1932 memory_init();
1933 }
1934
1935 memory_region_transaction_begin();
1936 as->root = root;
1937 as->current_map = g_new(FlatView, 1);
1938 flatview_init(as->current_map);
1939 as->ioeventfd_nb = 0;
1940 as->ioeventfds = NULL;
1941 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1942 as->name = g_strdup(name ? name : "anonymous");
1943 address_space_init_dispatch(as);
1944 memory_region_update_pending |= root->enabled;
1945 memory_region_transaction_commit();
1946 }
1947
1948 void address_space_destroy(AddressSpace *as)
1949 {
1950 MemoryListener *listener;
1951
1952 /* Flush out anything from MemoryListeners listening in on this */
1953 memory_region_transaction_begin();
1954 as->root = NULL;
1955 memory_region_transaction_commit();
1956 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1957 address_space_destroy_dispatch(as);
1958
1959 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1960 assert(listener->address_space_filter != as);
1961 }
1962
1963 flatview_unref(as->current_map);
1964 g_free(as->name);
1965 g_free(as->ioeventfds);
1966 }
1967
1968 bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
1969 {
1970 return memory_region_dispatch_read(mr, addr, pval, size);
1971 }
1972
1973 bool io_mem_write(MemoryRegion *mr, hwaddr addr,
1974 uint64_t val, unsigned size)
1975 {
1976 return memory_region_dispatch_write(mr, addr, val, size);
1977 }
1978
1979 typedef struct MemoryRegionList MemoryRegionList;
1980
1981 struct MemoryRegionList {
1982 const MemoryRegion *mr;
1983 bool printed;
1984 QTAILQ_ENTRY(MemoryRegionList) queue;
1985 };
1986
1987 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1988
1989 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1990 const MemoryRegion *mr, unsigned int level,
1991 hwaddr base,
1992 MemoryRegionListHead *alias_print_queue)
1993 {
1994 MemoryRegionList *new_ml, *ml, *next_ml;
1995 MemoryRegionListHead submr_print_queue;
1996 const MemoryRegion *submr;
1997 unsigned int i;
1998
1999 if (!mr || !mr->enabled) {
2000 return;
2001 }
2002
2003 for (i = 0; i < level; i++) {
2004 mon_printf(f, " ");
2005 }
2006
2007 if (mr->alias) {
2008 MemoryRegionList *ml;
2009 bool found = false;
2010
2011 /* check if the alias is already in the queue */
2012 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2013 if (ml->mr == mr->alias && !ml->printed) {
2014 found = true;
2015 }
2016 }
2017
2018 if (!found) {
2019 ml = g_new(MemoryRegionList, 1);
2020 ml->mr = mr->alias;
2021 ml->printed = false;
2022 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2023 }
2024 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2025 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2026 "-" TARGET_FMT_plx "\n",
2027 base + mr->addr,
2028 base + mr->addr
2029 + (int128_nz(mr->size) ?
2030 (hwaddr)int128_get64(int128_sub(mr->size,
2031 int128_one())) : 0),
2032 mr->priority,
2033 mr->romd_mode ? 'R' : '-',
2034 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2035 : '-',
2036 mr->name,
2037 mr->alias->name,
2038 mr->alias_offset,
2039 mr->alias_offset
2040 + (int128_nz(mr->size) ?
2041 (hwaddr)int128_get64(int128_sub(mr->size,
2042 int128_one())) : 0));
2043 } else {
2044 mon_printf(f,
2045 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
2046 base + mr->addr,
2047 base + mr->addr
2048 + (int128_nz(mr->size) ?
2049 (hwaddr)int128_get64(int128_sub(mr->size,
2050 int128_one())) : 0),
2051 mr->priority,
2052 mr->romd_mode ? 'R' : '-',
2053 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2054 : '-',
2055 mr->name);
2056 }
2057
2058 QTAILQ_INIT(&submr_print_queue);
2059
2060 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2061 new_ml = g_new(MemoryRegionList, 1);
2062 new_ml->mr = submr;
2063 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2064 if (new_ml->mr->addr < ml->mr->addr ||
2065 (new_ml->mr->addr == ml->mr->addr &&
2066 new_ml->mr->priority > ml->mr->priority)) {
2067 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2068 new_ml = NULL;
2069 break;
2070 }
2071 }
2072 if (new_ml) {
2073 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2074 }
2075 }
2076
2077 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2078 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2079 alias_print_queue);
2080 }
2081
2082 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2083 g_free(ml);
2084 }
2085 }
2086
2087 void mtree_info(fprintf_function mon_printf, void *f)
2088 {
2089 MemoryRegionListHead ml_head;
2090 MemoryRegionList *ml, *ml2;
2091 AddressSpace *as;
2092
2093 QTAILQ_INIT(&ml_head);
2094
2095 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2096 mon_printf(f, "%s\n", as->name);
2097 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
2098 }
2099
2100 mon_printf(f, "aliases\n");
2101 /* print aliased regions */
2102 QTAILQ_FOREACH(ml, &ml_head, queue) {
2103 if (!ml->printed) {
2104 mon_printf(f, "%s\n", ml->mr->name);
2105 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
2106 }
2107 }
2108
2109 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2110 g_free(ml);
2111 }
2112 }
2113
2114 static const TypeInfo memory_region_info = {
2115 .parent = TYPE_OBJECT,
2116 .name = TYPE_MEMORY_REGION,
2117 .instance_size = sizeof(MemoryRegion),
2118 .instance_init = memory_region_initfn,
2119 .instance_finalize = memory_region_finalize,
2120 };
2121
2122 static void memory_register_types(void)
2123 {
2124 type_register_static(&memory_region_info);
2125 }
2126
2127 type_init(memory_register_types)
AR7 emulation for QEMU