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Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
[qemu/ar7.git] / hw / mips / mips_fulong2e.c
blob5dbaa3bfccd0f360b2185c6ea4f8c446e8e374b6
1 /*
2 * QEMU fulong 2e mini pc support
3 *
4 * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
5 * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
6 * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
7 * This code is licensed under the GNU GPL v2.
8 *
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
11 */
12
13 /*
14 * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
15 * http://www.linux-mips.org/wiki/Fulong
16 *
17 * Loongson 2e user manual:
18 * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
19 */
20
21 #include "qemu/osdep.h"
22 #include "qemu-common.h"
23 #include "qemu/units.h"
24 #include "qapi/error.h"
25 #include "cpu.h"
26 #include "hw/hw.h"
27 #include "hw/i386/pc.h"
28 #include "hw/dma/i8257.h"
29 #include "hw/isa/superio.h"
30 #include "net/net.h"
31 #include "hw/boards.h"
32 #include "hw/i2c/smbus_eeprom.h"
33 #include "hw/block/flash.h"
34 #include "hw/mips/mips.h"
35 #include "hw/mips/cpudevs.h"
36 #include "hw/pci/pci.h"
37 #include "audio/audio.h"
38 #include "qemu/log.h"
39 #include "hw/loader.h"
40 #include "hw/ide.h"
41 #include "elf.h"
42 #include "hw/isa/vt82c686.h"
43 #include "hw/timer/mc146818rtc.h"
44 #include "hw/timer/i8254.h"
45 #include "exec/address-spaces.h"
46 #include "sysemu/qtest.h"
47 #include "qemu/error-report.h"
48
49 #define DEBUG_FULONG2E_INIT
50
51 #define ENVP_ADDR 0x80002000l
52 #define ENVP_NB_ENTRIES 16
53 #define ENVP_ENTRY_SIZE 256
54
55 /* fulong 2e has a 512k flash: Winbond W39L040AP70Z */
56 #define BIOS_SIZE (512 * KiB)
57 #define MAX_IDE_BUS 2
58
59 /*
60 * PMON is not part of qemu and released with BSD license, anyone
61 * who want to build a pmon binary please first git-clone the source
62 * from the git repository at:
63 * http://www.loongson.cn/support/git/pmon
64 * Then follow the "Compile Guide" available at:
65 * http://dev.lemote.com/code/pmon
66 *
67 * Notes:
68 * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
69 * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
70 * in the "Compile Guide".
71 */
72 #define FULONG_BIOSNAME "pmon_fulong2e.bin"
73
74 /* PCI SLOT in fulong 2e */
75 #define FULONG2E_VIA_SLOT 5
76 #define FULONG2E_ATI_SLOT 6
77 #define FULONG2E_RTL8139_SLOT 7
78
79 static struct _loaderparams {
80 int ram_size;
81 const char *kernel_filename;
82 const char *kernel_cmdline;
83 const char *initrd_filename;
84 } loaderparams;
85
86 static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index,
87 const char *string, ...)
88 {
89 va_list ap;
90 int32_t table_addr;
91
92 if (index >= ENVP_NB_ENTRIES)
93 return;
94
95 if (string == NULL) {
96 prom_buf[index] = 0;
97 return;
98 }
99
100 table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
101 prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
102
103 va_start(ap, string);
104 vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
105 va_end(ap);
106 }
107
108 static int64_t load_kernel (CPUMIPSState *env)
109 {
110 int64_t kernel_entry, kernel_low, kernel_high, initrd_size;
111 int index = 0;
112 long kernel_size;
113 ram_addr_t initrd_offset;
114 uint32_t *prom_buf;
115 long prom_size;
116
117 kernel_size = load_elf(loaderparams.kernel_filename, NULL,
118 cpu_mips_kseg0_to_phys, NULL,
119 (uint64_t *)&kernel_entry,
120 (uint64_t *)&kernel_low, (uint64_t *)&kernel_high,
121 0, EM_MIPS, 1, 0);
122 if (kernel_size < 0) {
123 error_report("could not load kernel '%s': %s",
124 loaderparams.kernel_filename,
125 load_elf_strerror(kernel_size));
126 exit(1);
127 }
128
129 /* load initrd */
130 initrd_size = 0;
131 initrd_offset = 0;
132 if (loaderparams.initrd_filename) {
133 initrd_size = get_image_size (loaderparams.initrd_filename);
134 if (initrd_size > 0) {
135 initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
136 if (initrd_offset + initrd_size > ram_size) {
137 error_report("memory too small for initial ram disk '%s'",
138 loaderparams.initrd_filename);
139 exit(1);
140 }
141 initrd_size = load_image_targphys(loaderparams.initrd_filename,
142 initrd_offset, ram_size - initrd_offset);
143 }
144 if (initrd_size == (target_ulong) -1) {
145 error_report("could not load initial ram disk '%s'",
146 loaderparams.initrd_filename);
147 exit(1);
148 }
149 }
150
151 /* Setup prom parameters. */
152 prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
153 prom_buf = g_malloc(prom_size);
154
155 prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
156 if (initrd_size > 0) {
157 prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",
158 cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,
159 loaderparams.kernel_cmdline);
160 } else {
161 prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
162 }
163
164 /* Setup minimum environment variables */
165 prom_set(prom_buf, index++, "busclock=33000000");
166 prom_set(prom_buf, index++, "cpuclock=100000000");
167 prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
168 prom_set(prom_buf, index++, "modetty0=38400n8r");
169 prom_set(prom_buf, index++, NULL);
170
171 rom_add_blob_fixed("prom", prom_buf, prom_size,
172 cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
173
174 g_free(prom_buf);
175 return kernel_entry;
176 }
177
178 static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_addr)
179 {
180 uint32_t *p;
181
182 /* Small bootloader */
183 p = (uint32_t *) base;
184
185 stl_p(p++, 0x0bf00010); /* j 0x1fc00040 */
186 stl_p(p++, 0x00000000); /* nop */
187
188 /* Second part of the bootloader */
189 p = (uint32_t *) (base + 0x040);
190
191 stl_p(p++, 0x3c040000); /* lui a0, 0 */
192 stl_p(p++, 0x34840002); /* ori a0, a0, 2 */
193 stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff)); /* lui a1, high(ENVP_ADDR) */
194 stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff)); /* ori a1, a0, low(ENVP_ADDR) */
195 stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
196 stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff)); /* ori a2, a2, low(ENVP_ADDR + 8) */
197 stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16)); /* lui a3, high(env->ram_size) */
198 stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff)); /* ori a3, a3, low(env->ram_size) */
199 stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff)); /* lui ra, high(kernel_addr) */;
200 stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff)); /* ori ra, ra, low(kernel_addr) */
201 stl_p(p++, 0x03e00008); /* jr ra */
202 stl_p(p++, 0x00000000); /* nop */
203 }
204
205
206 static void main_cpu_reset(void *opaque)
207 {
208 MIPSCPU *cpu = opaque;
209 CPUMIPSState *env = &cpu->env;
210
211 cpu_reset(CPU(cpu));
212 /* TODO: 2E reset stuff */
213 if (loaderparams.kernel_filename) {
214 env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
215 }
216 }
217
218 static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc,
219 I2CBus **i2c_bus, ISABus **p_isa_bus)
220 {
221 qemu_irq *i8259;
222 ISABus *isa_bus;
223 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
224
225 isa_bus = vt82c686b_isa_init(pci_bus, PCI_DEVFN(slot, 0));
226 if (!isa_bus) {
227 fprintf(stderr, "vt82c686b_init error\n");
228 exit(1);
229 }
230 *p_isa_bus = isa_bus;
231 /* Interrupt controller */
232 /* The 8259 -> IP5 */
233 i8259 = i8259_init(isa_bus, intc);
234 isa_bus_irqs(isa_bus, i8259);
235 /* init other devices */
236 i8254_pit_init(isa_bus, 0x40, 0, NULL);
237 i8257_dma_init(isa_bus, 0);
238 /* Super I/O */
239 isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO);
240
241 ide_drive_get(hd, ARRAY_SIZE(hd));
242 via_ide_init(pci_bus, hd, PCI_DEVFN(slot, 1));
243
244 pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci");
245 pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci");
246
247 *i2c_bus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(slot, 4), 0xeee1, NULL);
248
249 /* Audio support */
250 vt82c686b_ac97_init(pci_bus, PCI_DEVFN(slot, 5));
251 vt82c686b_mc97_init(pci_bus, PCI_DEVFN(slot, 6));
252 }
253
254 /* Network support */
255 static void network_init (PCIBus *pci_bus)
256 {
257 int i;
258
259 for(i = 0; i < nb_nics; i++) {
260 NICInfo *nd = &nd_table[i];
261 const char *default_devaddr = NULL;
262
263 if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
264 /* The fulong board has a RTL8139 card using PCI SLOT 7 */
265 default_devaddr = "07";
266 }
267
268 pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr);
269 }
270 }
271
272 static void mips_fulong2e_init(MachineState *machine)
273 {
274 const char *kernel_filename = machine->kernel_filename;
275 const char *kernel_cmdline = machine->kernel_cmdline;
276 const char *initrd_filename = machine->initrd_filename;
277 char *filename;
278 MemoryRegion *address_space_mem = get_system_memory();
279 MemoryRegion *ram = g_new(MemoryRegion, 1);
280 MemoryRegion *bios = g_new(MemoryRegion, 1);
281 ram_addr_t ram_size = machine->ram_size;
282 long bios_size;
283 uint8_t *spd_data;
284 Error *err = NULL;
285 int64_t kernel_entry;
286 PCIBus *pci_bus;
287 ISABus *isa_bus;
288 I2CBus *smbus;
289 MIPSCPU *cpu;
290 CPUMIPSState *env;
291 DeviceState *dev;
292
293 /* init CPUs */
294 cpu = MIPS_CPU(cpu_create(machine->cpu_type));
295 env = &cpu->env;
296
297 qemu_register_reset(main_cpu_reset, cpu);
298
299 /* TODO: support more than 256M RAM as highmem */
300 ram_size = 256 * MiB;
301
302 /* allocate RAM */
303 memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size);
304 memory_region_init_ram(bios, NULL, "fulong2e.bios", BIOS_SIZE,
305 &error_fatal);
306 memory_region_set_readonly(bios, true);
307
308 memory_region_add_subregion(address_space_mem, 0, ram);
309 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
310
311 /* We do not support flash operation, just loading pmon.bin as raw BIOS.
312 * Please use -L to set the BIOS path and -bios to set bios name. */
313
314 if (kernel_filename) {
315 loaderparams.ram_size = ram_size;
316 loaderparams.kernel_filename = kernel_filename;
317 loaderparams.kernel_cmdline = kernel_cmdline;
318 loaderparams.initrd_filename = initrd_filename;
319 kernel_entry = load_kernel (env);
320 write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
321 } else {
322 if (bios_name == NULL) {
323 bios_name = FULONG_BIOSNAME;
324 }
325 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
326 if (filename) {
327 bios_size = load_image_targphys(filename, 0x1fc00000LL,
328 BIOS_SIZE);
329 g_free(filename);
330 } else {
331 bios_size = -1;
332 }
333
334 if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
335 !kernel_filename && !qtest_enabled()) {
336 error_report("Could not load MIPS bios '%s'", bios_name);
337 exit(1);
338 }
339 }
340
341 /* Init internal devices */
342 cpu_mips_irq_init_cpu(cpu);
343 cpu_mips_clock_init(cpu);
344
345 /* North bridge, Bonito --> IP2 */
346 pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
347
348 /* South bridge -> IP5 */
349 vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
350 &smbus, &isa_bus);
351
352 /* GPU */
353 if (vga_interface_type != VGA_NONE) {
354 dev = DEVICE(pci_create(pci_bus, -1, "ati-vga"));
355 qdev_prop_set_uint32(dev, "vgamem_mb", 16);
356 qdev_prop_set_uint16(dev, "x-device-id", 0x5159);
357 qdev_init_nofail(dev);
358 }
359
360 /* Populate SPD eeprom data */
361 spd_data = spd_data_generate(DDR, ram_size, &err);
362 if (err) {
363 warn_report_err(err);
364 }
365 if (spd_data) {
366 smbus_eeprom_init_one(smbus, 0x50, spd_data);
367 }
368
369 mc146818_rtc_init(isa_bus, 2000, NULL);
370
371 /* Network card: RTL8139D */
372 network_init(pci_bus);
373 }
374
375 static void mips_fulong2e_machine_init(MachineClass *mc)
376 {
377 mc->desc = "Fulong 2e mini pc";
378 mc->init = mips_fulong2e_init;
379 mc->block_default_type = IF_IDE;
380 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
381 mc->default_ram_size = 256 * MiB;
382 }
383
384 DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)
AR7 emulation for QEMU