target-arm/translate.h

   1 #ifndef TARGET_ARM_TRANSLATE_H
   2 #define TARGET_ARM_TRANSLATE_H
   3
   4 /* internal defines */
   5 typedef struct DisasContext {
   6     target_ulong pc;
   7     uint32_t insn;
   8     int is_jmp;
   9     /* Nonzero if this instruction has been conditionally skipped.  */
  10     int condjmp;
  11     /* The label that will be jumped to when the instruction is skipped.  */
  12     int condlabel;
  13     /* Thumb-2 conditional execution bits.  */
  14     int condexec_mask;
  15     int condexec_cond;
  16     struct TranslationBlock *tb;
  17     int singlestep_enabled;
  18     int thumb;
  19     int bswap_code;
  20 #if !defined(CONFIG_USER_ONLY)
  21     int user;
  22 #endif
  23     int vfp_enabled;
  24     int vec_len;
  25     int vec_stride;
  26     int aarch64;
  27     int current_pl;
  28     GHashTable *cp_regs;
  29     uint64_t features; /* CPU features bits */
  30 #define TMP_A64_MAX 16
  31     int tmp_a64_count;
  32     TCGv_i64 tmp_a64[TMP_A64_MAX];
  33 } DisasContext;
  34
  35 extern TCGv_ptr cpu_env;
  36
  37 static inline int arm_dc_feature(DisasContext *dc, int feature)
  38 {
  39     return (dc->features & (1ULL << feature)) != 0;
  40 }
  41
  42 /* target-specific extra values for is_jmp */
  43 /* These instructions trap after executing, so the A32/T32 decoder must
  44  * defer them until after the conditional execution state has been updated.
  45  * WFI also needs special handling when single-stepping.
  46  */
  47 #define DISAS_WFI 4
  48 #define DISAS_SWI 5
  49 /* For instructions which unconditionally cause an exception we can skip
  50  * emitting unreachable code at the end of the TB in the A64 decoder
  51  */
  52 #define DISAS_EXC 6
  53 /* WFE */
  54 #define DISAS_WFE 7
  55
  56 #ifdef TARGET_AARCH64
  57 void a64_translate_init(void);
  58 void gen_intermediate_code_internal_a64(ARMCPU *cpu,
  59                                         TranslationBlock *tb,
  60                                         bool search_pc);
  61 void gen_a64_set_pc_im(uint64_t val);
  62 #else
  63 static inline void a64_translate_init(void)
  64 {
  65 }
  66
  67 static inline void gen_intermediate_code_internal_a64(ARMCPU *cpu,
  68                                                       TranslationBlock *tb,
  69                                                       bool search_pc)
  70 {
  71 }
  72
  73 static inline void gen_a64_set_pc_im(uint64_t val)
  74 {
  75 }
  76 #endif
  77
  78 void arm_gen_test_cc(int cc, int label);
  79
  80 #endif /* TARGET_ARM_TRANSLATE_H */