4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
25 #include "hw/qdev-core.h"
26 #include "disas/bfd.h"
27 #include "exec/hwaddr.h"
28 #include "exec/memattrs.h"
29 #include "qemu/queue.h"
30 #include "qemu/thread.h"
31 #include "qemu/typedefs.h"
33 typedef int (*WriteCoreDumpFunction
)(const void *buf
, size_t size
,
38 * Type wide enough to contain any #target_ulong virtual address.
40 typedef uint64_t vaddr
;
41 #define VADDR_PRId PRId64
42 #define VADDR_PRIu PRIu64
43 #define VADDR_PRIo PRIo64
44 #define VADDR_PRIx PRIx64
45 #define VADDR_PRIX PRIX64
46 #define VADDR_MAX UINT64_MAX
50 * @section_id: QEMU-cpu
52 * @short_description: Base class for all CPUs
55 #define TYPE_CPU "cpu"
57 /* Since this macro is used a lot in hot code paths and in conjunction with
58 * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
61 #define CPU(obj) ((CPUState *)(obj))
63 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
64 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
66 typedef struct CPUState CPUState
;
68 typedef void (*CPUUnassignedAccess
)(CPUState
*cpu
, hwaddr addr
,
69 bool is_write
, bool is_exec
, int opaque
,
72 struct TranslationBlock
;
76 * @class_by_name: Callback to map -cpu command line model name to an
77 * instantiatable CPU type.
78 * @parse_features: Callback to parse command line arguments.
79 * @reset: Callback to reset the #CPUState to its initial state.
80 * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
81 * @has_work: Callback for checking if there is work to do.
82 * @do_interrupt: Callback for interrupt handling.
83 * @do_unassigned_access: Callback for unassigned access handling.
84 * @do_unaligned_access: Callback for unaligned access handling, if
85 * the target defines #ALIGNED_ONLY.
86 * @virtio_is_big_endian: Callback to return %true if a CPU which supports
87 * runtime configurable endianness is currently big-endian. Non-configurable
88 * CPUs can use the default implementation of this method. This method should
89 * not be used by any callers other than the pre-1.0 virtio devices.
90 * @memory_rw_debug: Callback for GDB memory access.
91 * @dump_state: Callback for dumping state.
92 * @dump_statistics: Callback for dumping statistics.
93 * @get_arch_id: Callback for getting architecture-dependent CPU ID.
94 * @get_paging_enabled: Callback for inquiring whether paging is enabled.
95 * @get_memory_mapping: Callback for obtaining the memory mappings.
96 * @set_pc: Callback for setting the Program Counter register.
97 * @synchronize_from_tb: Callback for synchronizing state from a TCG
99 * @handle_mmu_fault: Callback for handling an MMU fault.
100 * @get_phys_page_debug: Callback for obtaining a physical address.
101 * @get_phys_page_attrs_debug: Callback for obtaining a physical address and the
102 * associated memory transaction attributes to use for the access.
103 * CPUs which use memory transaction attributes should implement this
104 * instead of get_phys_page_debug.
105 * @asidx_from_attrs: Callback to return the CPU AddressSpace to use for
106 * a memory access with the specified memory transaction attributes.
107 * @gdb_read_register: Callback for letting GDB read a register.
108 * @gdb_write_register: Callback for letting GDB write a register.
109 * @debug_excp_handler: Callback for handling debug exceptions.
110 * @write_elf64_note: Callback for writing a CPU-specific ELF note to a
111 * 64-bit VM coredump.
112 * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
113 * note to a 32-bit VM coredump.
114 * @write_elf32_note: Callback for writing a CPU-specific ELF note to a
115 * 32-bit VM coredump.
116 * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
117 * note to a 32-bit VM coredump.
118 * @vmsd: State description for migration.
119 * @gdb_num_core_regs: Number of core registers accessible to GDB.
120 * @gdb_core_xml_file: File name for core registers GDB XML description.
121 * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
122 * before the insn which triggers a watchpoint rather than after it.
123 * @gdb_arch_name: Optional callback that returns the architecture name known
124 * to GDB. The caller must free the returned string with g_free.
125 * @cpu_exec_enter: Callback for cpu_exec preparation.
126 * @cpu_exec_exit: Callback for cpu_exec cleanup.
127 * @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec.
128 * @disas_set_info: Setup architecture specific components of disassembly info
130 * Represents a CPU family or model.
132 typedef struct CPUClass
{
134 DeviceClass parent_class
;
137 ObjectClass
*(*class_by_name
)(const char *cpu_model
);
138 void (*parse_features
)(CPUState
*cpu
, char *str
, Error
**errp
);
140 void (*reset
)(CPUState
*cpu
);
141 int reset_dump_flags
;
142 bool (*has_work
)(CPUState
*cpu
);
143 void (*do_interrupt
)(CPUState
*cpu
);
144 CPUUnassignedAccess do_unassigned_access
;
145 void (*do_unaligned_access
)(CPUState
*cpu
, vaddr addr
,
146 int is_write
, int is_user
, uintptr_t retaddr
);
147 bool (*virtio_is_big_endian
)(CPUState
*cpu
);
148 int (*memory_rw_debug
)(CPUState
*cpu
, vaddr addr
,
149 uint8_t *buf
, int len
, bool is_write
);
150 void (*dump_state
)(CPUState
*cpu
, FILE *f
, fprintf_function cpu_fprintf
,
152 void (*dump_statistics
)(CPUState
*cpu
, FILE *f
,
153 fprintf_function cpu_fprintf
, int flags
);
154 int64_t (*get_arch_id
)(CPUState
*cpu
);
155 bool (*get_paging_enabled
)(const CPUState
*cpu
);
156 void (*get_memory_mapping
)(CPUState
*cpu
, MemoryMappingList
*list
,
158 void (*set_pc
)(CPUState
*cpu
, vaddr value
);
159 void (*synchronize_from_tb
)(CPUState
*cpu
, struct TranslationBlock
*tb
);
160 int (*handle_mmu_fault
)(CPUState
*cpu
, vaddr address
, int rw
,
162 hwaddr (*get_phys_page_debug
)(CPUState
*cpu
, vaddr addr
);
163 hwaddr (*get_phys_page_attrs_debug
)(CPUState
*cpu
, vaddr addr
,
165 int (*asidx_from_attrs
)(CPUState
*cpu
, MemTxAttrs attrs
);
166 int (*gdb_read_register
)(CPUState
*cpu
, uint8_t *buf
, int reg
);
167 int (*gdb_write_register
)(CPUState
*cpu
, uint8_t *buf
, int reg
);
168 void (*debug_excp_handler
)(CPUState
*cpu
);
170 int (*write_elf64_note
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
171 int cpuid
, void *opaque
);
172 int (*write_elf64_qemunote
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
174 int (*write_elf32_note
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
175 int cpuid
, void *opaque
);
176 int (*write_elf32_qemunote
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
179 const struct VMStateDescription
*vmsd
;
180 int gdb_num_core_regs
;
181 const char *gdb_core_xml_file
;
182 gchar
* (*gdb_arch_name
)(CPUState
*cpu
);
183 bool gdb_stop_before_watchpoint
;
185 void (*cpu_exec_enter
)(CPUState
*cpu
);
186 void (*cpu_exec_exit
)(CPUState
*cpu
);
187 bool (*cpu_exec_interrupt
)(CPUState
*cpu
, int interrupt_request
);
189 void (*disas_set_info
)(CPUState
*cpu
, disassemble_info
*info
);
192 #ifdef HOST_WORDS_BIGENDIAN
193 typedef struct icount_decr_u16
{
198 typedef struct icount_decr_u16
{
204 typedef struct CPUBreakpoint
{
206 int flags
; /* BP_* */
207 QTAILQ_ENTRY(CPUBreakpoint
) entry
;
210 typedef struct CPUWatchpoint
{
215 int flags
; /* BP_* */
216 QTAILQ_ENTRY(CPUWatchpoint
) entry
;
222 #define TB_JMP_CACHE_BITS 12
223 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
227 * @cpu_index: CPU index (informative).
228 * @nr_cores: Number of cores within this CPU package.
229 * @nr_threads: Number of threads within this CPU.
230 * @numa_node: NUMA node this CPU is belonging to.
231 * @host_tid: Host thread ID.
232 * @running: #true if CPU is currently running (usermode).
233 * @created: Indicates whether the CPU thread has been successfully created.
234 * @interrupt_request: Indicates a pending interrupt request.
235 * @halted: Nonzero if the CPU is in suspended state.
236 * @stop: Indicates a pending stop request.
237 * @stopped: Indicates the CPU has been artificially stopped.
238 * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
239 * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
240 * CPU and return to its top level loop.
241 * @singlestep_enabled: Flags for single-stepping.
242 * @icount_extra: Instructions until next timer event.
243 * @icount_decr: Number of cycles left, with interrupt flag in high bit.
244 * This allows a single read-compare-cbranch-write sequence to test
245 * for both decrementer underflow and exceptions.
246 * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
247 * requires that IO only be performed on the last instruction of a TB
248 * so that interrupts take effect immediately.
249 * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
250 * AddressSpaces this CPU has)
251 * @num_ases: number of CPUAddressSpaces in @cpu_ases
252 * @as: Pointer to the first AddressSpace, for the convenience of targets which
253 * only have a single AddressSpace
254 * @env_ptr: Pointer to subclass-specific CPUArchState field.
255 * @current_tb: Currently executing TB.
256 * @gdb_regs: Additional GDB registers.
257 * @gdb_num_regs: Number of total registers accessible to GDB.
258 * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
259 * @next_cpu: Next CPU sharing TB cache.
260 * @opaque: User data.
261 * @mem_io_pc: Host Program Counter at which the memory was accessed.
262 * @mem_io_vaddr: Target virtual address at which the memory was accessed.
263 * @kvm_fd: vCPU file descriptor for KVM.
264 * @work_mutex: Lock to prevent multiple access to queued_work_*.
265 * @queued_work_first: First asynchronous work pending.
267 * State of one CPU core or thread.
271 DeviceState parent_obj
;
278 struct QemuThread
*thread
;
285 struct QemuCond
*halt_cond
;
292 uint32_t interrupt_request
;
293 int singlestep_enabled
;
294 int64_t icount_extra
;
297 QemuMutex work_mutex
;
298 struct qemu_work_item
*queued_work_first
, *queued_work_last
;
300 CPUAddressSpace
*cpu_ases
;
303 MemoryRegion
*memory
;
305 void *env_ptr
; /* CPUArchState */
306 struct TranslationBlock
*current_tb
;
307 struct TranslationBlock
*tb_jmp_cache
[TB_JMP_CACHE_SIZE
];
308 struct GDBRegisterState
*gdb_regs
;
311 QTAILQ_ENTRY(CPUState
) node
;
313 /* ice debug support */
314 QTAILQ_HEAD(breakpoints_head
, CPUBreakpoint
) breakpoints
;
316 QTAILQ_HEAD(watchpoints_head
, CPUWatchpoint
) watchpoints
;
317 CPUWatchpoint
*watchpoint_hit
;
321 /* In order to avoid passing too many arguments to the MMIO helpers,
322 * we store some rarely used information in the CPU context.
329 struct KVMState
*kvm_state
;
330 struct kvm_run
*kvm_run
;
332 /* TODO Move common fields from CPUArchState here. */
333 int cpu_index
; /* used by alpha TCG */
334 uint32_t halted
; /* used by alpha, cris, ppc TCG */
340 int32_t exception_index
; /* used by m68k TCG */
342 /* Used to keep track of an outstanding cpu throttle thread for migration
345 bool throttle_thread_scheduled
;
347 /* Note that this is accessed at the start of every TB via a negative
348 offset from AREG0. Leave this field at the end so as to make the
349 (absolute value) offset as small as possible. This reduces code
350 size, especially for hosts without large memory offsets. */
351 uint32_t tcg_exit_req
;
354 QTAILQ_HEAD(CPUTailQ
, CPUState
);
355 extern struct CPUTailQ cpus
;
356 #define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
357 #define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
358 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
359 QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
360 #define CPU_FOREACH_REVERSE(cpu) \
361 QTAILQ_FOREACH_REVERSE(cpu, &cpus, CPUTailQ, node)
362 #define first_cpu QTAILQ_FIRST(&cpus)
364 extern __thread CPUState
*current_cpu
;
367 * cpu_paging_enabled:
368 * @cpu: The CPU whose state is to be inspected.
370 * Returns: %true if paging is enabled, %false otherwise.
372 bool cpu_paging_enabled(const CPUState
*cpu
);
375 * cpu_get_memory_mapping:
376 * @cpu: The CPU whose memory mappings are to be obtained.
377 * @list: Where to write the memory mappings to.
378 * @errp: Pointer for reporting an #Error.
380 void cpu_get_memory_mapping(CPUState
*cpu
, MemoryMappingList
*list
,
384 * cpu_write_elf64_note:
385 * @f: pointer to a function that writes memory to a file
386 * @cpu: The CPU whose memory is to be dumped
387 * @cpuid: ID number of the CPU
388 * @opaque: pointer to the CPUState struct
390 int cpu_write_elf64_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
391 int cpuid
, void *opaque
);
394 * cpu_write_elf64_qemunote:
395 * @f: pointer to a function that writes memory to a file
396 * @cpu: The CPU whose memory is to be dumped
397 * @cpuid: ID number of the CPU
398 * @opaque: pointer to the CPUState struct
400 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
404 * cpu_write_elf32_note:
405 * @f: pointer to a function that writes memory to a file
406 * @cpu: The CPU whose memory is to be dumped
407 * @cpuid: ID number of the CPU
408 * @opaque: pointer to the CPUState struct
410 int cpu_write_elf32_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
411 int cpuid
, void *opaque
);
414 * cpu_write_elf32_qemunote:
415 * @f: pointer to a function that writes memory to a file
416 * @cpu: The CPU whose memory is to be dumped
417 * @cpuid: ID number of the CPU
418 * @opaque: pointer to the CPUState struct
420 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
426 * @CPU_DUMP_FPU: dump FPU register state, not just integer
427 * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
430 CPU_DUMP_CODE
= 0x00010000,
431 CPU_DUMP_FPU
= 0x00020000,
432 CPU_DUMP_CCOP
= 0x00040000,
437 * @cpu: The CPU whose state is to be dumped.
438 * @f: File to dump to.
439 * @cpu_fprintf: Function to dump with.
440 * @flags: Flags what to dump.
444 void cpu_dump_state(CPUState
*cpu
, FILE *f
, fprintf_function cpu_fprintf
,
448 * cpu_dump_statistics:
449 * @cpu: The CPU whose state is to be dumped.
450 * @f: File to dump to.
451 * @cpu_fprintf: Function to dump with.
452 * @flags: Flags what to dump.
454 * Dumps CPU statistics.
456 void cpu_dump_statistics(CPUState
*cpu
, FILE *f
, fprintf_function cpu_fprintf
,
459 #ifndef CONFIG_USER_ONLY
461 * cpu_get_phys_page_attrs_debug:
462 * @cpu: The CPU to obtain the physical page address for.
463 * @addr: The virtual address.
464 * @attrs: Updated on return with the memory transaction attributes to use
467 * Obtains the physical page corresponding to a virtual one, together
468 * with the corresponding memory transaction attributes to use for the access.
469 * Use it only for debugging because no protection checks are done.
471 * Returns: Corresponding physical page address or -1 if no page found.
473 static inline hwaddr
cpu_get_phys_page_attrs_debug(CPUState
*cpu
, vaddr addr
,
476 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
478 if (cc
->get_phys_page_attrs_debug
) {
479 return cc
->get_phys_page_attrs_debug(cpu
, addr
, attrs
);
481 /* Fallback for CPUs which don't implement the _attrs_ hook */
482 *attrs
= MEMTXATTRS_UNSPECIFIED
;
483 return cc
->get_phys_page_debug(cpu
, addr
);
487 * cpu_get_phys_page_debug:
488 * @cpu: The CPU to obtain the physical page address for.
489 * @addr: The virtual address.
491 * Obtains the physical page corresponding to a virtual one.
492 * Use it only for debugging because no protection checks are done.
494 * Returns: Corresponding physical page address or -1 if no page found.
496 static inline hwaddr
cpu_get_phys_page_debug(CPUState
*cpu
, vaddr addr
)
498 MemTxAttrs attrs
= {};
500 return cpu_get_phys_page_attrs_debug(cpu
, addr
, &attrs
);
503 /** cpu_asidx_from_attrs:
505 * @attrs: memory transaction attributes
507 * Returns the address space index specifying the CPU AddressSpace
508 * to use for a memory access with the given transaction attributes.
510 static inline int cpu_asidx_from_attrs(CPUState
*cpu
, MemTxAttrs attrs
)
512 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
514 if (cc
->asidx_from_attrs
) {
515 return cc
->asidx_from_attrs(cpu
, attrs
);
523 * @cpu: The CPU whose state is to be reset.
525 void cpu_reset(CPUState
*cpu
);
529 * @typename: The CPU base type.
530 * @cpu_model: The model string without any parameters.
532 * Looks up a CPU #ObjectClass matching name @cpu_model.
534 * Returns: A #CPUClass or %NULL if not matching class is found.
536 ObjectClass
*cpu_class_by_name(const char *typename
, const char *cpu_model
);
540 * @typename: The CPU base type.
541 * @cpu_model: The model string including optional parameters.
543 * Instantiates a CPU, processes optional parameters and realizes the CPU.
545 * Returns: A #CPUState or %NULL if an error occurred.
547 CPUState
*cpu_generic_init(const char *typename
, const char *cpu_model
);
551 * @cpu: The vCPU to check.
553 * Checks whether the CPU has work to do.
555 * Returns: %true if the CPU has work, %false otherwise.
557 static inline bool cpu_has_work(CPUState
*cpu
)
559 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
561 g_assert(cc
->has_work
);
562 return cc
->has_work(cpu
);
567 * @cpu: The vCPU to check against.
569 * Checks whether the caller is executing on the vCPU thread.
571 * Returns: %true if called from @cpu's thread, %false otherwise.
573 bool qemu_cpu_is_self(CPUState
*cpu
);
577 * @cpu: The vCPU to kick.
579 * Kicks @cpu's thread.
581 void qemu_cpu_kick(CPUState
*cpu
);
585 * @cpu: The CPU to check.
587 * Checks whether the CPU is stopped.
589 * Returns: %true if run state is not running or if artificially stopped;
592 bool cpu_is_stopped(CPUState
*cpu
);
596 * @cpu: The vCPU to run on.
597 * @func: The function to be executed.
598 * @data: Data to pass to the function.
600 * Schedules the function @func for execution on the vCPU @cpu.
602 void run_on_cpu(CPUState
*cpu
, void (*func
)(void *data
), void *data
);
606 * @cpu: The vCPU to run on.
607 * @func: The function to be executed.
608 * @data: Data to pass to the function.
610 * Schedules the function @func for execution on the vCPU @cpu asynchronously.
612 void async_run_on_cpu(CPUState
*cpu
, void (*func
)(void *data
), void *data
);
616 * @index: The CPUState@cpu_index value of the CPU to obtain.
618 * Gets a CPU matching @index.
620 * Returns: The CPU or %NULL if there is no matching CPU.
622 CPUState
*qemu_get_cpu(int index
);
626 * @id: Guest-exposed CPU ID to lookup.
628 * Search for CPU with specified ID.
630 * Returns: %true - CPU is found, %false - CPU isn't found.
632 bool cpu_exists(int64_t id
);
636 * @new_throttle_pct: Percent of sleep time. Valid range is 1 to 99.
638 * Throttles all vcpus by forcing them to sleep for the given percentage of
639 * time. A throttle_percentage of 25 corresponds to a 75% duty cycle roughly.
640 * (example: 10ms sleep for every 30ms awake).
642 * cpu_throttle_set can be called as needed to adjust new_throttle_pct.
643 * Once the throttling starts, it will remain in effect until cpu_throttle_stop
646 void cpu_throttle_set(int new_throttle_pct
);
651 * Stops the vcpu throttling started by cpu_throttle_set.
653 void cpu_throttle_stop(void);
656 * cpu_throttle_active:
658 * Returns: %true if the vcpus are currently being throttled, %false otherwise.
660 bool cpu_throttle_active(void);
663 * cpu_throttle_get_percentage:
665 * Returns the vcpu throttle percentage. See cpu_throttle_set for details.
667 * Returns: The throttle percentage in range 1 to 99.
669 int cpu_throttle_get_percentage(void);
671 #ifndef CONFIG_USER_ONLY
673 typedef void (*CPUInterruptHandler
)(CPUState
*, int);
675 extern CPUInterruptHandler cpu_interrupt_handler
;
679 * @cpu: The CPU to set an interrupt on.
680 * @mask: The interupts to set.
682 * Invokes the interrupt handler.
684 static inline void cpu_interrupt(CPUState
*cpu
, int mask
)
686 cpu_interrupt_handler(cpu
, mask
);
689 #else /* USER_ONLY */
691 void cpu_interrupt(CPUState
*cpu
, int mask
);
693 #endif /* USER_ONLY */
695 #ifdef CONFIG_SOFTMMU
696 static inline void cpu_unassigned_access(CPUState
*cpu
, hwaddr addr
,
697 bool is_write
, bool is_exec
,
698 int opaque
, unsigned size
)
700 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
702 if (cc
->do_unassigned_access
) {
703 cc
->do_unassigned_access(cpu
, addr
, is_write
, is_exec
, opaque
, size
);
707 static inline void cpu_unaligned_access(CPUState
*cpu
, vaddr addr
,
708 int is_write
, int is_user
,
711 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
713 cc
->do_unaligned_access(cpu
, addr
, is_write
, is_user
, retaddr
);
719 * @cpu: The CPU to set the program counter for.
720 * @addr: Program counter value.
722 * Sets the program counter for a CPU.
724 static inline void cpu_set_pc(CPUState
*cpu
, vaddr addr
)
726 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
728 cc
->set_pc(cpu
, addr
);
732 * cpu_reset_interrupt:
733 * @cpu: The CPU to clear the interrupt on.
734 * @mask: The interrupt mask to clear.
736 * Resets interrupts on the vCPU @cpu.
738 void cpu_reset_interrupt(CPUState
*cpu
, int mask
);
742 * @cpu: The CPU to exit.
744 * Requests the CPU @cpu to exit execution.
746 void cpu_exit(CPUState
*cpu
);
750 * @cpu: The CPU to resume.
752 * Resumes CPU, i.e. puts CPU into runnable state.
754 void cpu_resume(CPUState
*cpu
);
758 * @cpu: The vCPU to initialize.
760 * Initializes a vCPU.
762 void qemu_init_vcpu(CPUState
*cpu
);
764 #define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
765 #define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
766 #define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
770 * @cpu: CPU to the flags for.
771 * @enabled: Flags to enable.
773 * Enables or disables single-stepping for @cpu.
775 void cpu_single_step(CPUState
*cpu
, int enabled
);
777 /* Breakpoint/watchpoint flags */
778 #define BP_MEM_READ 0x01
779 #define BP_MEM_WRITE 0x02
780 #define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
781 #define BP_STOP_BEFORE_ACCESS 0x04
782 /* 0x08 currently unused */
785 #define BP_ANY (BP_GDB | BP_CPU)
786 #define BP_WATCHPOINT_HIT_READ 0x40
787 #define BP_WATCHPOINT_HIT_WRITE 0x80
788 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
790 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
791 CPUBreakpoint
**breakpoint
);
792 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
);
793 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
);
794 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
);
796 /* Return true if PC matches an installed breakpoint. */
797 static inline bool cpu_breakpoint_test(CPUState
*cpu
, vaddr pc
, int mask
)
801 if (unlikely(!QTAILQ_EMPTY(&cpu
->breakpoints
))) {
802 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
803 if (bp
->pc
== pc
&& (bp
->flags
& mask
)) {
811 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
812 int flags
, CPUWatchpoint
**watchpoint
);
813 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
814 vaddr len
, int flags
);
815 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
);
816 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
);
818 void QEMU_NORETURN
cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
820 void cpu_exec_exit(CPUState
*cpu
);
822 #ifdef CONFIG_SOFTMMU
823 extern const struct VMStateDescription vmstate_cpu_common
;
825 #define vmstate_cpu_common vmstate_dummy
828 #define VMSTATE_CPU() { \
829 .name = "parent_obj", \
830 .size = sizeof(CPUState), \
831 .vmsd = &vmstate_cpu_common, \
832 .flags = VMS_STRUCT, \