2 * Inter-VM Shared Memory PCI device.
5 * Cam Macdonell <cam@cs.ualberta.ca>
7 * Based On: cirrus_vga.c
8 * Copyright (c) 2004 Fabrice Bellard
9 * Copyright (c) 2004 Makoto Suzuki (suzu)
12 * Copyright (c) 2006 Igor Kovalenko
14 * This code is licensed under the GNU GPL v2.
16 * Contributions after 2012-01-13 are licensed under the terms of the
17 * GNU GPL, version 2 or (at your option) any later version.
19 #include "qemu/osdep.h"
20 #include "qapi/error.h"
21 #include "qemu/cutils.h"
23 #include "hw/pci/pci.h"
24 #include "hw/pci/msi.h"
25 #include "hw/pci/msix.h"
26 #include "sysemu/kvm.h"
27 #include "migration/blocker.h"
28 #include "qemu/error-report.h"
29 #include "qemu/event_notifier.h"
30 #include "qom/object_interfaces.h"
31 #include "chardev/char-fe.h"
32 #include "sysemu/hostmem.h"
33 #include "sysemu/qtest.h"
34 #include "qapi/visitor.h"
36 #include "hw/misc/ivshmem.h"
38 #define PCI_VENDOR_ID_IVSHMEM PCI_VENDOR_ID_REDHAT_QUMRANET
39 #define PCI_DEVICE_ID_IVSHMEM 0x1110
41 #define IVSHMEM_MAX_PEERS UINT16_MAX
42 #define IVSHMEM_IOEVENTFD 0
45 #define IVSHMEM_REG_BAR_SIZE 0x100
47 #define IVSHMEM_DEBUG 0
48 #define IVSHMEM_DPRINTF(fmt, ...) \
50 if (IVSHMEM_DEBUG) { \
51 printf("IVSHMEM: " fmt, ## __VA_ARGS__); \
55 #define TYPE_IVSHMEM_COMMON "ivshmem-common"
56 #define IVSHMEM_COMMON(obj) \
57 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_COMMON)
59 #define TYPE_IVSHMEM_PLAIN "ivshmem-plain"
60 #define IVSHMEM_PLAIN(obj) \
61 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_PLAIN)
63 #define TYPE_IVSHMEM_DOORBELL "ivshmem-doorbell"
64 #define IVSHMEM_DOORBELL(obj) \
65 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_DOORBELL)
67 #define TYPE_IVSHMEM "ivshmem"
68 #define IVSHMEM(obj) \
69 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM)
73 EventNotifier
*eventfds
;
76 typedef struct MSIVector
{
81 typedef struct IVShmemState
{
88 /* exactly one of these two may be set */
89 HostMemoryBackend
*hostmem
; /* with interrupts */
90 CharBackend server_chr
; /* without interrupts */
98 MemoryRegion ivshmem_mmio
; /* BAR 0 (registers) */
99 MemoryRegion
*ivshmem_bar2
; /* BAR 2 (shared memory) */
100 MemoryRegion server_bar2
; /* used with server_chr */
102 /* interrupt support */
104 int nb_peers
; /* space in @peers[] */
106 MSIVector
*msi_vectors
;
107 uint64_t msg_buf
; /* buffer for receiving server messages */
108 int msg_buffered_bytes
; /* #bytes in @msg_buf */
110 /* migration stuff */
112 Error
*migration_blocker
;
119 uint32_t not_legacy_32bit
;
122 /* registers for the Inter-VM shared memory device */
123 enum ivshmem_registers
{
130 static inline uint32_t ivshmem_has_feature(IVShmemState
*ivs
,
131 unsigned int feature
) {
132 return (ivs
->features
& (1 << feature
));
135 static inline bool ivshmem_is_master(IVShmemState
*s
)
137 assert(s
->master
!= ON_OFF_AUTO_AUTO
);
138 return s
->master
== ON_OFF_AUTO_ON
;
141 static void ivshmem_update_irq(IVShmemState
*s
)
143 PCIDevice
*d
= PCI_DEVICE(s
);
144 uint32_t isr
= s
->intrstatus
& s
->intrmask
;
147 * Do nothing unless the device actually uses INTx. Here's how
148 * the device variants signal interrupts, what they put in PCI
150 * Device variant Interrupt Interrupt Pin MSI-X cap.
151 * ivshmem-plain none 0 no
152 * ivshmem-doorbell MSI-X 1 yes(1)
153 * ivshmem,msi=off INTx 1 no
154 * ivshmem,msi=on MSI-X 1(2) yes(1)
155 * (1) if guest enabled MSI-X
156 * (2) the device lies
157 * Leads to the condition for doing nothing:
159 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)
160 || !d
->config
[PCI_INTERRUPT_PIN
]) {
164 /* don't print ISR resets */
166 IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
167 isr
? 1 : 0, s
->intrstatus
, s
->intrmask
);
170 pci_set_irq(d
, isr
!= 0);
173 static void ivshmem_IntrMask_write(IVShmemState
*s
, uint32_t val
)
175 IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val
);
178 ivshmem_update_irq(s
);
181 static uint32_t ivshmem_IntrMask_read(IVShmemState
*s
)
183 uint32_t ret
= s
->intrmask
;
185 IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret
);
189 static void ivshmem_IntrStatus_write(IVShmemState
*s
, uint32_t val
)
191 IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val
);
194 ivshmem_update_irq(s
);
197 static uint32_t ivshmem_IntrStatus_read(IVShmemState
*s
)
199 uint32_t ret
= s
->intrstatus
;
201 /* reading ISR clears all interrupts */
203 ivshmem_update_irq(s
);
207 static void ivshmem_io_write(void *opaque
, hwaddr addr
,
208 uint64_t val
, unsigned size
)
210 IVShmemState
*s
= opaque
;
212 uint16_t dest
= val
>> 16;
213 uint16_t vector
= val
& 0xff;
217 IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx
"\n", addr
);
221 ivshmem_IntrMask_write(s
, val
);
225 ivshmem_IntrStatus_write(s
, val
);
229 /* check that dest VM ID is reasonable */
230 if (dest
>= s
->nb_peers
) {
231 IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest
);
235 /* check doorbell range */
236 if (vector
< s
->peers
[dest
].nb_eventfds
) {
237 IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest
, vector
);
238 event_notifier_set(&s
->peers
[dest
].eventfds
[vector
]);
240 IVSHMEM_DPRINTF("Invalid destination vector %d on VM %d\n",
245 IVSHMEM_DPRINTF("Unhandled write " TARGET_FMT_plx
"\n", addr
);
249 static uint64_t ivshmem_io_read(void *opaque
, hwaddr addr
,
253 IVShmemState
*s
= opaque
;
259 ret
= ivshmem_IntrMask_read(s
);
263 ret
= ivshmem_IntrStatus_read(s
);
271 IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx
"\n", addr
);
278 static const MemoryRegionOps ivshmem_mmio_ops
= {
279 .read
= ivshmem_io_read
,
280 .write
= ivshmem_io_write
,
281 .endianness
= DEVICE_NATIVE_ENDIAN
,
283 .min_access_size
= 4,
284 .max_access_size
= 4,
288 static void ivshmem_vector_notify(void *opaque
)
290 MSIVector
*entry
= opaque
;
291 PCIDevice
*pdev
= entry
->pdev
;
292 IVShmemState
*s
= IVSHMEM_COMMON(pdev
);
293 int vector
= entry
- s
->msi_vectors
;
294 EventNotifier
*n
= &s
->peers
[s
->vm_id
].eventfds
[vector
];
296 if (!event_notifier_test_and_clear(n
)) {
300 IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev
, vector
);
301 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
302 if (msix_enabled(pdev
)) {
303 msix_notify(pdev
, vector
);
306 ivshmem_IntrStatus_write(s
, 1);
310 static int ivshmem_vector_unmask(PCIDevice
*dev
, unsigned vector
,
313 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
314 EventNotifier
*n
= &s
->peers
[s
->vm_id
].eventfds
[vector
];
315 MSIVector
*v
= &s
->msi_vectors
[vector
];
318 IVSHMEM_DPRINTF("vector unmask %p %d\n", dev
, vector
);
320 ret
= kvm_irqchip_update_msi_route(kvm_state
, v
->virq
, msg
, dev
);
324 kvm_irqchip_commit_routes(kvm_state
);
326 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state
, n
, NULL
, v
->virq
);
329 static void ivshmem_vector_mask(PCIDevice
*dev
, unsigned vector
)
331 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
332 EventNotifier
*n
= &s
->peers
[s
->vm_id
].eventfds
[vector
];
335 IVSHMEM_DPRINTF("vector mask %p %d\n", dev
, vector
);
337 ret
= kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state
, n
,
338 s
->msi_vectors
[vector
].virq
);
340 error_report("remove_irqfd_notifier_gsi failed");
344 static void ivshmem_vector_poll(PCIDevice
*dev
,
345 unsigned int vector_start
,
346 unsigned int vector_end
)
348 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
351 IVSHMEM_DPRINTF("vector poll %p %d-%d\n", dev
, vector_start
, vector_end
);
353 vector_end
= MIN(vector_end
, s
->vectors
);
355 for (vector
= vector_start
; vector
< vector_end
; vector
++) {
356 EventNotifier
*notifier
= &s
->peers
[s
->vm_id
].eventfds
[vector
];
358 if (!msix_is_masked(dev
, vector
)) {
362 if (event_notifier_test_and_clear(notifier
)) {
363 msix_set_pending(dev
, vector
);
368 static void watch_vector_notifier(IVShmemState
*s
, EventNotifier
*n
,
371 int eventfd
= event_notifier_get_fd(n
);
373 assert(!s
->msi_vectors
[vector
].pdev
);
374 s
->msi_vectors
[vector
].pdev
= PCI_DEVICE(s
);
376 qemu_set_fd_handler(eventfd
, ivshmem_vector_notify
,
377 NULL
, &s
->msi_vectors
[vector
]);
380 static void ivshmem_add_eventfd(IVShmemState
*s
, int posn
, int i
)
382 memory_region_add_eventfd(&s
->ivshmem_mmio
,
387 &s
->peers
[posn
].eventfds
[i
]);
390 static void ivshmem_del_eventfd(IVShmemState
*s
, int posn
, int i
)
392 memory_region_del_eventfd(&s
->ivshmem_mmio
,
397 &s
->peers
[posn
].eventfds
[i
]);
400 static void close_peer_eventfds(IVShmemState
*s
, int posn
)
404 assert(posn
>= 0 && posn
< s
->nb_peers
);
405 n
= s
->peers
[posn
].nb_eventfds
;
407 if (ivshmem_has_feature(s
, IVSHMEM_IOEVENTFD
)) {
408 memory_region_transaction_begin();
409 for (i
= 0; i
< n
; i
++) {
410 ivshmem_del_eventfd(s
, posn
, i
);
412 memory_region_transaction_commit();
415 for (i
= 0; i
< n
; i
++) {
416 event_notifier_cleanup(&s
->peers
[posn
].eventfds
[i
]);
419 g_free(s
->peers
[posn
].eventfds
);
420 s
->peers
[posn
].nb_eventfds
= 0;
423 static void resize_peers(IVShmemState
*s
, int nb_peers
)
425 int old_nb_peers
= s
->nb_peers
;
428 assert(nb_peers
> old_nb_peers
);
429 IVSHMEM_DPRINTF("bumping storage to %d peers\n", nb_peers
);
431 s
->peers
= g_realloc(s
->peers
, nb_peers
* sizeof(Peer
));
432 s
->nb_peers
= nb_peers
;
434 for (i
= old_nb_peers
; i
< nb_peers
; i
++) {
435 s
->peers
[i
].eventfds
= g_new0(EventNotifier
, s
->vectors
);
436 s
->peers
[i
].nb_eventfds
= 0;
440 static void ivshmem_add_kvm_msi_virq(IVShmemState
*s
, int vector
,
443 PCIDevice
*pdev
= PCI_DEVICE(s
);
446 IVSHMEM_DPRINTF("ivshmem_add_kvm_msi_virq vector:%d\n", vector
);
447 assert(!s
->msi_vectors
[vector
].pdev
);
449 ret
= kvm_irqchip_add_msi_route(kvm_state
, vector
, pdev
);
451 error_setg(errp
, "kvm_irqchip_add_msi_route failed");
455 s
->msi_vectors
[vector
].virq
= ret
;
456 s
->msi_vectors
[vector
].pdev
= pdev
;
459 static void setup_interrupt(IVShmemState
*s
, int vector
, Error
**errp
)
461 EventNotifier
*n
= &s
->peers
[s
->vm_id
].eventfds
[vector
];
462 bool with_irqfd
= kvm_msi_via_irqfd_enabled() &&
463 ivshmem_has_feature(s
, IVSHMEM_MSI
);
464 PCIDevice
*pdev
= PCI_DEVICE(s
);
467 IVSHMEM_DPRINTF("setting up interrupt for vector: %d\n", vector
);
470 IVSHMEM_DPRINTF("with eventfd\n");
471 watch_vector_notifier(s
, n
, vector
);
472 } else if (msix_enabled(pdev
)) {
473 IVSHMEM_DPRINTF("with irqfd\n");
474 ivshmem_add_kvm_msi_virq(s
, vector
, &err
);
476 error_propagate(errp
, err
);
480 if (!msix_is_masked(pdev
, vector
)) {
481 kvm_irqchip_add_irqfd_notifier_gsi(kvm_state
, n
, NULL
,
482 s
->msi_vectors
[vector
].virq
);
483 /* TODO handle error */
486 /* it will be delayed until msix is enabled, in write_config */
487 IVSHMEM_DPRINTF("with irqfd, delayed until msix enabled\n");
491 static void process_msg_shmem(IVShmemState
*s
, int fd
, Error
**errp
)
493 Error
*local_err
= NULL
;
497 if (s
->ivshmem_bar2
) {
498 error_setg(errp
, "server sent unexpected shared memory message");
503 if (fstat(fd
, &buf
) < 0) {
504 error_setg_errno(errp
, errno
,
505 "can't determine size of shared memory sent by server");
513 if (s
->legacy_size
!= SIZE_MAX
) {
514 if (size
< s
->legacy_size
) {
515 error_setg(errp
, "server sent only %zd bytes of shared memory",
516 (size_t)buf
.st_size
);
520 size
= s
->legacy_size
;
523 /* mmap the region and map into the BAR2 */
524 memory_region_init_ram_from_fd(&s
->server_bar2
, OBJECT(s
),
525 "ivshmem.bar2", size
, true, fd
, &local_err
);
527 error_propagate(errp
, local_err
);
531 s
->ivshmem_bar2
= &s
->server_bar2
;
534 static void process_msg_disconnect(IVShmemState
*s
, uint16_t posn
,
537 IVSHMEM_DPRINTF("posn %d has gone away\n", posn
);
538 if (posn
>= s
->nb_peers
|| posn
== s
->vm_id
) {
539 error_setg(errp
, "invalid peer %d", posn
);
542 close_peer_eventfds(s
, posn
);
545 static void process_msg_connect(IVShmemState
*s
, uint16_t posn
, int fd
,
548 Peer
*peer
= &s
->peers
[posn
];
552 * The N-th connect message for this peer comes with the file
553 * descriptor for vector N-1. Count messages to find the vector.
555 if (peer
->nb_eventfds
>= s
->vectors
) {
556 error_setg(errp
, "Too many eventfd received, device has %d vectors",
561 vector
= peer
->nb_eventfds
++;
563 IVSHMEM_DPRINTF("eventfds[%d][%d] = %d\n", posn
, vector
, fd
);
564 event_notifier_init_fd(&peer
->eventfds
[vector
], fd
);
565 fcntl_setfl(fd
, O_NONBLOCK
); /* msix/irqfd poll non block */
567 if (posn
== s
->vm_id
) {
568 setup_interrupt(s
, vector
, errp
);
569 /* TODO do we need to handle the error? */
572 if (ivshmem_has_feature(s
, IVSHMEM_IOEVENTFD
)) {
573 ivshmem_add_eventfd(s
, posn
, vector
);
577 static void process_msg(IVShmemState
*s
, int64_t msg
, int fd
, Error
**errp
)
579 IVSHMEM_DPRINTF("posn is %" PRId64
", fd is %d\n", msg
, fd
);
581 if (msg
< -1 || msg
> IVSHMEM_MAX_PEERS
) {
582 error_setg(errp
, "server sent invalid message %" PRId64
, msg
);
588 process_msg_shmem(s
, fd
, errp
);
592 if (msg
>= s
->nb_peers
) {
593 resize_peers(s
, msg
+ 1);
597 process_msg_connect(s
, msg
, fd
, errp
);
599 process_msg_disconnect(s
, msg
, errp
);
603 static int ivshmem_can_receive(void *opaque
)
605 IVShmemState
*s
= opaque
;
607 assert(s
->msg_buffered_bytes
< sizeof(s
->msg_buf
));
608 return sizeof(s
->msg_buf
) - s
->msg_buffered_bytes
;
611 static void ivshmem_read(void *opaque
, const uint8_t *buf
, int size
)
613 IVShmemState
*s
= opaque
;
618 assert(size
>= 0 && s
->msg_buffered_bytes
+ size
<= sizeof(s
->msg_buf
));
619 memcpy((unsigned char *)&s
->msg_buf
+ s
->msg_buffered_bytes
, buf
, size
);
620 s
->msg_buffered_bytes
+= size
;
621 if (s
->msg_buffered_bytes
< sizeof(s
->msg_buf
)) {
624 msg
= le64_to_cpu(s
->msg_buf
);
625 s
->msg_buffered_bytes
= 0;
627 fd
= qemu_chr_fe_get_msgfd(&s
->server_chr
);
629 process_msg(s
, msg
, fd
, &err
);
631 error_report_err(err
);
635 static int64_t ivshmem_recv_msg(IVShmemState
*s
, int *pfd
, Error
**errp
)
642 ret
= qemu_chr_fe_read_all(&s
->server_chr
, (uint8_t *)&msg
+ n
,
648 error_setg_errno(errp
, -ret
, "read from server failed");
652 } while (n
< sizeof(msg
));
654 *pfd
= qemu_chr_fe_get_msgfd(&s
->server_chr
);
655 return le64_to_cpu(msg
);
658 static void ivshmem_recv_setup(IVShmemState
*s
, Error
**errp
)
664 msg
= ivshmem_recv_msg(s
, &fd
, &err
);
666 error_propagate(errp
, err
);
669 if (msg
!= IVSHMEM_PROTOCOL_VERSION
) {
670 error_setg(errp
, "server sent version %" PRId64
", expecting %d",
671 msg
, IVSHMEM_PROTOCOL_VERSION
);
675 error_setg(errp
, "server sent invalid version message");
680 * ivshmem-server sends the remaining initial messages in a fixed
681 * order, but the device has always accepted them in any order.
682 * Stay as compatible as practical, just in case people use
683 * servers that behave differently.
687 * ivshmem_device_spec.txt has always required the ID message
688 * right here, and ivshmem-server has always complied. However,
689 * older versions of the device accepted it out of order, but
690 * broke when an interrupt setup message arrived before it.
692 msg
= ivshmem_recv_msg(s
, &fd
, &err
);
694 error_propagate(errp
, err
);
697 if (fd
!= -1 || msg
< 0 || msg
> IVSHMEM_MAX_PEERS
) {
698 error_setg(errp
, "server sent invalid ID message");
704 * Receive more messages until we got shared memory.
707 msg
= ivshmem_recv_msg(s
, &fd
, &err
);
709 error_propagate(errp
, err
);
712 process_msg(s
, msg
, fd
, &err
);
714 error_propagate(errp
, err
);
720 * This function must either map the shared memory or fail. The
721 * loop above ensures that: it terminates normally only after it
722 * successfully processed the server's shared memory message.
723 * Assert that actually mapped the shared memory:
725 assert(s
->ivshmem_bar2
);
728 /* Select the MSI-X vectors used by device.
729 * ivshmem maps events to vectors statically, so
730 * we just enable all vectors on init and after reset. */
731 static void ivshmem_msix_vector_use(IVShmemState
*s
)
733 PCIDevice
*d
= PCI_DEVICE(s
);
736 for (i
= 0; i
< s
->vectors
; i
++) {
737 msix_vector_use(d
, i
);
741 static void ivshmem_reset(DeviceState
*d
)
743 IVShmemState
*s
= IVSHMEM_COMMON(d
);
747 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
748 ivshmem_msix_vector_use(s
);
752 static int ivshmem_setup_interrupts(IVShmemState
*s
, Error
**errp
)
754 /* allocate QEMU callback data for receiving interrupts */
755 s
->msi_vectors
= g_malloc0(s
->vectors
* sizeof(MSIVector
));
757 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
758 if (msix_init_exclusive_bar(PCI_DEVICE(s
), s
->vectors
, 1, errp
)) {
762 IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s
->vectors
);
763 ivshmem_msix_vector_use(s
);
769 static void ivshmem_enable_irqfd(IVShmemState
*s
)
771 PCIDevice
*pdev
= PCI_DEVICE(s
);
774 for (i
= 0; i
< s
->peers
[s
->vm_id
].nb_eventfds
; i
++) {
777 ivshmem_add_kvm_msi_virq(s
, i
, &err
);
779 error_report_err(err
);
780 /* TODO do we need to handle the error? */
784 if (msix_set_vector_notifiers(pdev
,
785 ivshmem_vector_unmask
,
787 ivshmem_vector_poll
)) {
788 error_report("ivshmem: msix_set_vector_notifiers failed");
792 static void ivshmem_remove_kvm_msi_virq(IVShmemState
*s
, int vector
)
794 IVSHMEM_DPRINTF("ivshmem_remove_kvm_msi_virq vector:%d\n", vector
);
796 if (s
->msi_vectors
[vector
].pdev
== NULL
) {
800 /* it was cleaned when masked in the frontend. */
801 kvm_irqchip_release_virq(kvm_state
, s
->msi_vectors
[vector
].virq
);
803 s
->msi_vectors
[vector
].pdev
= NULL
;
806 static void ivshmem_disable_irqfd(IVShmemState
*s
)
808 PCIDevice
*pdev
= PCI_DEVICE(s
);
811 for (i
= 0; i
< s
->peers
[s
->vm_id
].nb_eventfds
; i
++) {
812 ivshmem_remove_kvm_msi_virq(s
, i
);
815 msix_unset_vector_notifiers(pdev
);
818 static void ivshmem_write_config(PCIDevice
*pdev
, uint32_t address
,
819 uint32_t val
, int len
)
821 IVShmemState
*s
= IVSHMEM_COMMON(pdev
);
822 int is_enabled
, was_enabled
= msix_enabled(pdev
);
824 pci_default_write_config(pdev
, address
, val
, len
);
825 is_enabled
= msix_enabled(pdev
);
827 if (kvm_msi_via_irqfd_enabled()) {
828 if (!was_enabled
&& is_enabled
) {
829 ivshmem_enable_irqfd(s
);
830 } else if (was_enabled
&& !is_enabled
) {
831 ivshmem_disable_irqfd(s
);
836 static void ivshmem_common_realize(PCIDevice
*dev
, Error
**errp
)
838 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
841 uint8_t attr
= PCI_BASE_ADDRESS_SPACE_MEMORY
|
842 PCI_BASE_ADDRESS_MEM_PREFETCH
;
843 Error
*local_err
= NULL
;
845 /* IRQFD requires MSI */
846 if (ivshmem_has_feature(s
, IVSHMEM_IOEVENTFD
) &&
847 !ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
848 error_setg(errp
, "ioeventfd/irqfd requires MSI");
852 pci_conf
= dev
->config
;
853 pci_conf
[PCI_COMMAND
] = PCI_COMMAND_IO
| PCI_COMMAND_MEMORY
;
855 memory_region_init_io(&s
->ivshmem_mmio
, OBJECT(s
), &ivshmem_mmio_ops
, s
,
856 "ivshmem-mmio", IVSHMEM_REG_BAR_SIZE
);
858 /* region for registers*/
859 pci_register_bar(dev
, 0, PCI_BASE_ADDRESS_SPACE_MEMORY
,
862 if (s
->not_legacy_32bit
) {
863 attr
|= PCI_BASE_ADDRESS_MEM_TYPE_64
;
866 if (s
->hostmem
!= NULL
) {
867 IVSHMEM_DPRINTF("using hostmem\n");
869 s
->ivshmem_bar2
= host_memory_backend_get_memory(s
->hostmem
,
872 Chardev
*chr
= qemu_chr_fe_get_driver(&s
->server_chr
);
875 IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
878 /* we allocate enough space for 16 peers and grow as needed */
882 * Receive setup messages from server synchronously.
883 * Older versions did it asynchronously, but that creates a
884 * number of entertaining race conditions.
886 ivshmem_recv_setup(s
, &err
);
888 error_propagate(errp
, err
);
892 if (s
->master
== ON_OFF_AUTO_ON
&& s
->vm_id
!= 0) {
894 "master must connect to the server before any peers");
898 qemu_chr_fe_set_handlers(&s
->server_chr
, ivshmem_can_receive
,
899 ivshmem_read
, NULL
, NULL
, s
, NULL
, true);
901 if (ivshmem_setup_interrupts(s
, errp
) < 0) {
902 error_prepend(errp
, "Failed to initialize interrupts: ");
907 if (s
->master
== ON_OFF_AUTO_AUTO
) {
908 s
->master
= s
->vm_id
== 0 ? ON_OFF_AUTO_ON
: ON_OFF_AUTO_OFF
;
911 if (!ivshmem_is_master(s
)) {
912 error_setg(&s
->migration_blocker
,
913 "Migration is disabled when using feature 'peer mode' in device 'ivshmem'");
914 migrate_add_blocker(s
->migration_blocker
, &local_err
);
916 error_propagate(errp
, local_err
);
917 error_free(s
->migration_blocker
);
922 vmstate_register_ram(s
->ivshmem_bar2
, DEVICE(s
));
923 pci_register_bar(PCI_DEVICE(s
), 2, attr
, s
->ivshmem_bar2
);
926 static void ivshmem_exit(PCIDevice
*dev
)
928 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
931 if (s
->migration_blocker
) {
932 migrate_del_blocker(s
->migration_blocker
);
933 error_free(s
->migration_blocker
);
936 if (memory_region_is_mapped(s
->ivshmem_bar2
)) {
938 void *addr
= memory_region_get_ram_ptr(s
->ivshmem_bar2
);
941 if (munmap(addr
, memory_region_size(s
->ivshmem_bar2
) == -1)) {
942 error_report("Failed to munmap shared memory %s",
946 fd
= memory_region_get_fd(s
->ivshmem_bar2
);
950 vmstate_unregister_ram(s
->ivshmem_bar2
, DEVICE(dev
));
954 for (i
= 0; i
< s
->nb_peers
; i
++) {
955 close_peer_eventfds(s
, i
);
960 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
961 msix_uninit_exclusive_bar(dev
);
964 g_free(s
->msi_vectors
);
967 static int ivshmem_pre_load(void *opaque
)
969 IVShmemState
*s
= opaque
;
971 if (!ivshmem_is_master(s
)) {
972 error_report("'peer' devices are not migratable");
979 static int ivshmem_post_load(void *opaque
, int version_id
)
981 IVShmemState
*s
= opaque
;
983 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
984 ivshmem_msix_vector_use(s
);
989 static void ivshmem_common_class_init(ObjectClass
*klass
, void *data
)
991 DeviceClass
*dc
= DEVICE_CLASS(klass
);
992 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
994 k
->realize
= ivshmem_common_realize
;
995 k
->exit
= ivshmem_exit
;
996 k
->config_write
= ivshmem_write_config
;
997 k
->vendor_id
= PCI_VENDOR_ID_IVSHMEM
;
998 k
->device_id
= PCI_DEVICE_ID_IVSHMEM
;
999 k
->class_id
= PCI_CLASS_MEMORY_RAM
;
1001 dc
->reset
= ivshmem_reset
;
1002 set_bit(DEVICE_CATEGORY_MISC
, dc
->categories
);
1003 dc
->desc
= "Inter-VM shared memory";
1006 static const TypeInfo ivshmem_common_info
= {
1007 .name
= TYPE_IVSHMEM_COMMON
,
1008 .parent
= TYPE_PCI_DEVICE
,
1009 .instance_size
= sizeof(IVShmemState
),
1011 .class_init
= ivshmem_common_class_init
,
1012 .interfaces
= (InterfaceInfo
[]) {
1013 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
1018 static const VMStateDescription ivshmem_plain_vmsd
= {
1019 .name
= TYPE_IVSHMEM_PLAIN
,
1021 .minimum_version_id
= 0,
1022 .pre_load
= ivshmem_pre_load
,
1023 .post_load
= ivshmem_post_load
,
1024 .fields
= (VMStateField
[]) {
1025 VMSTATE_PCI_DEVICE(parent_obj
, IVShmemState
),
1026 VMSTATE_UINT32(intrstatus
, IVShmemState
),
1027 VMSTATE_UINT32(intrmask
, IVShmemState
),
1028 VMSTATE_END_OF_LIST()
1032 static Property ivshmem_plain_properties
[] = {
1033 DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState
, master
, ON_OFF_AUTO_OFF
),
1034 DEFINE_PROP_LINK("memdev", IVShmemState
, hostmem
, TYPE_MEMORY_BACKEND
,
1035 HostMemoryBackend
*),
1036 DEFINE_PROP_END_OF_LIST(),
1039 static void ivshmem_plain_init(Object
*obj
)
1041 IVShmemState
*s
= IVSHMEM_PLAIN(obj
);
1043 s
->not_legacy_32bit
= 1;
1046 static void ivshmem_plain_realize(PCIDevice
*dev
, Error
**errp
)
1048 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
1051 error_setg(errp
, "You must specify a 'memdev'");
1053 } else if (host_memory_backend_is_mapped(s
->hostmem
)) {
1054 char *path
= object_get_canonical_path_component(OBJECT(s
->hostmem
));
1055 error_setg(errp
, "can't use already busy memdev: %s", path
);
1060 ivshmem_common_realize(dev
, errp
);
1061 host_memory_backend_set_mapped(s
->hostmem
, true);
1064 static void ivshmem_plain_exit(PCIDevice
*pci_dev
)
1066 IVShmemState
*s
= IVSHMEM_COMMON(pci_dev
);
1068 host_memory_backend_set_mapped(s
->hostmem
, false);
1071 static void ivshmem_plain_class_init(ObjectClass
*klass
, void *data
)
1073 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1074 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
1076 k
->realize
= ivshmem_plain_realize
;
1077 k
->exit
= ivshmem_plain_exit
;
1078 dc
->props
= ivshmem_plain_properties
;
1079 dc
->vmsd
= &ivshmem_plain_vmsd
;
1082 static const TypeInfo ivshmem_plain_info
= {
1083 .name
= TYPE_IVSHMEM_PLAIN
,
1084 .parent
= TYPE_IVSHMEM_COMMON
,
1085 .instance_size
= sizeof(IVShmemState
),
1086 .instance_init
= ivshmem_plain_init
,
1087 .class_init
= ivshmem_plain_class_init
,
1090 static const VMStateDescription ivshmem_doorbell_vmsd
= {
1091 .name
= TYPE_IVSHMEM_DOORBELL
,
1093 .minimum_version_id
= 0,
1094 .pre_load
= ivshmem_pre_load
,
1095 .post_load
= ivshmem_post_load
,
1096 .fields
= (VMStateField
[]) {
1097 VMSTATE_PCI_DEVICE(parent_obj
, IVShmemState
),
1098 VMSTATE_MSIX(parent_obj
, IVShmemState
),
1099 VMSTATE_UINT32(intrstatus
, IVShmemState
),
1100 VMSTATE_UINT32(intrmask
, IVShmemState
),
1101 VMSTATE_END_OF_LIST()
1105 static Property ivshmem_doorbell_properties
[] = {
1106 DEFINE_PROP_CHR("chardev", IVShmemState
, server_chr
),
1107 DEFINE_PROP_UINT32("vectors", IVShmemState
, vectors
, 1),
1108 DEFINE_PROP_BIT("ioeventfd", IVShmemState
, features
, IVSHMEM_IOEVENTFD
,
1110 DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState
, master
, ON_OFF_AUTO_OFF
),
1111 DEFINE_PROP_END_OF_LIST(),
1114 static void ivshmem_doorbell_init(Object
*obj
)
1116 IVShmemState
*s
= IVSHMEM_DOORBELL(obj
);
1118 s
->features
|= (1 << IVSHMEM_MSI
);
1119 s
->legacy_size
= SIZE_MAX
; /* whatever the server sends */
1120 s
->not_legacy_32bit
= 1;
1123 static void ivshmem_doorbell_realize(PCIDevice
*dev
, Error
**errp
)
1125 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
1127 if (!qemu_chr_fe_backend_connected(&s
->server_chr
)) {
1128 error_setg(errp
, "You must specify a 'chardev'");
1132 ivshmem_common_realize(dev
, errp
);
1135 static void ivshmem_doorbell_class_init(ObjectClass
*klass
, void *data
)
1137 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1138 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
1140 k
->realize
= ivshmem_doorbell_realize
;
1141 dc
->props
= ivshmem_doorbell_properties
;
1142 dc
->vmsd
= &ivshmem_doorbell_vmsd
;
1145 static const TypeInfo ivshmem_doorbell_info
= {
1146 .name
= TYPE_IVSHMEM_DOORBELL
,
1147 .parent
= TYPE_IVSHMEM_COMMON
,
1148 .instance_size
= sizeof(IVShmemState
),
1149 .instance_init
= ivshmem_doorbell_init
,
1150 .class_init
= ivshmem_doorbell_class_init
,
1153 static int ivshmem_load_old(QEMUFile
*f
, void *opaque
, int version_id
)
1155 IVShmemState
*s
= opaque
;
1156 PCIDevice
*pdev
= PCI_DEVICE(s
);
1159 IVSHMEM_DPRINTF("ivshmem_load_old\n");
1161 if (version_id
!= 0) {
1165 ret
= ivshmem_pre_load(s
);
1170 ret
= pci_device_load(pdev
, f
);
1175 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
1177 ivshmem_msix_vector_use(s
);
1179 s
->intrstatus
= qemu_get_be32(f
);
1180 s
->intrmask
= qemu_get_be32(f
);
1186 static bool test_msix(void *opaque
, int version_id
)
1188 IVShmemState
*s
= opaque
;
1190 return ivshmem_has_feature(s
, IVSHMEM_MSI
);
1193 static bool test_no_msix(void *opaque
, int version_id
)
1195 return !test_msix(opaque
, version_id
);
1198 static const VMStateDescription ivshmem_vmsd
= {
1201 .minimum_version_id
= 1,
1202 .pre_load
= ivshmem_pre_load
,
1203 .post_load
= ivshmem_post_load
,
1204 .fields
= (VMStateField
[]) {
1205 VMSTATE_PCI_DEVICE(parent_obj
, IVShmemState
),
1207 VMSTATE_MSIX_TEST(parent_obj
, IVShmemState
, test_msix
),
1208 VMSTATE_UINT32_TEST(intrstatus
, IVShmemState
, test_no_msix
),
1209 VMSTATE_UINT32_TEST(intrmask
, IVShmemState
, test_no_msix
),
1211 VMSTATE_END_OF_LIST()
1213 .load_state_old
= ivshmem_load_old
,
1214 .minimum_version_id_old
= 0
1217 static Property ivshmem_properties
[] = {
1218 DEFINE_PROP_CHR("chardev", IVShmemState
, server_chr
),
1219 DEFINE_PROP_STRING("size", IVShmemState
, sizearg
),
1220 DEFINE_PROP_UINT32("vectors", IVShmemState
, vectors
, 1),
1221 DEFINE_PROP_BIT("ioeventfd", IVShmemState
, features
, IVSHMEM_IOEVENTFD
,
1223 DEFINE_PROP_BIT("msi", IVShmemState
, features
, IVSHMEM_MSI
, true),
1224 DEFINE_PROP_STRING("shm", IVShmemState
, shmobj
),
1225 DEFINE_PROP_STRING("role", IVShmemState
, role
),
1226 DEFINE_PROP_UINT32("use64", IVShmemState
, not_legacy_32bit
, 1),
1227 DEFINE_PROP_END_OF_LIST(),
1230 static void desugar_shm(IVShmemState
*s
)
1235 obj
= object_new("memory-backend-file");
1236 path
= g_strdup_printf("/dev/shm/%s", s
->shmobj
);
1237 object_property_set_str(obj
, path
, "mem-path", &error_abort
);
1239 object_property_set_int(obj
, s
->legacy_size
, "size", &error_abort
);
1240 object_property_set_bool(obj
, true, "share", &error_abort
);
1241 object_property_add_child(OBJECT(s
), "internal-shm-backend", obj
,
1243 user_creatable_complete(obj
, &error_abort
);
1244 s
->hostmem
= MEMORY_BACKEND(obj
);
1247 static void ivshmem_realize(PCIDevice
*dev
, Error
**errp
)
1249 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
1251 if (!qtest_enabled()) {
1252 error_report("ivshmem is deprecated, please use ivshmem-plain"
1253 " or ivshmem-doorbell instead");
1256 if (qemu_chr_fe_backend_connected(&s
->server_chr
) + !!s
->shmobj
!= 1) {
1257 error_setg(errp
, "You must specify either 'shm' or 'chardev'");
1261 if (s
->sizearg
== NULL
) {
1262 s
->legacy_size
= 4 << 20; /* 4 MB default */
1267 ret
= qemu_strtosz_MiB(s
->sizearg
, NULL
, &size
);
1268 if (ret
< 0 || (size_t)size
!= size
|| !is_power_of_2(size
)) {
1269 error_setg(errp
, "Invalid size %s", s
->sizearg
);
1272 s
->legacy_size
= size
;
1275 /* check that role is reasonable */
1277 if (strncmp(s
->role
, "peer", 5) == 0) {
1278 s
->master
= ON_OFF_AUTO_OFF
;
1279 } else if (strncmp(s
->role
, "master", 7) == 0) {
1280 s
->master
= ON_OFF_AUTO_ON
;
1282 error_setg(errp
, "'role' must be 'peer' or 'master'");
1286 s
->master
= ON_OFF_AUTO_AUTO
;
1294 * Note: we don't use INTx with IVSHMEM_MSI at all, so this is a
1295 * bald-faced lie then. But it's a backwards compatible lie.
1297 pci_config_set_interrupt_pin(dev
->config
, 1);
1299 ivshmem_common_realize(dev
, errp
);
1302 static void ivshmem_class_init(ObjectClass
*klass
, void *data
)
1304 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1305 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
1307 k
->realize
= ivshmem_realize
;
1309 dc
->desc
= "Inter-VM shared memory (legacy)";
1310 dc
->props
= ivshmem_properties
;
1311 dc
->vmsd
= &ivshmem_vmsd
;
1314 static const TypeInfo ivshmem_info
= {
1315 .name
= TYPE_IVSHMEM
,
1316 .parent
= TYPE_IVSHMEM_COMMON
,
1317 .instance_size
= sizeof(IVShmemState
),
1318 .class_init
= ivshmem_class_init
,
1321 static void ivshmem_register_types(void)
1323 type_register_static(&ivshmem_common_info
);
1324 type_register_static(&ivshmem_plain_info
);
1325 type_register_static(&ivshmem_doorbell_info
);
1326 type_register_static(&ivshmem_info
);
1329 type_init(ivshmem_register_types
)