target-arm: Don't define any MMU_MODE*_SUFFIXes
[qemu/ar7.git] / target-m68k / op_helper.c
blob06661f58cacd937b4283d1c5db6f4978b8719b33
1 /*
2 * M68K helper routines
4 * Copyright (c) 2007 CodeSourcery
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "cpu.h"
20 #include "exec/helper-proto.h"
21 #include "exec/cpu_ldst.h"
23 #if defined(CONFIG_USER_ONLY)
25 void m68k_cpu_do_interrupt(CPUState *cs)
27 cs->exception_index = -1;
30 static inline void do_interrupt_m68k_hardirq(CPUM68KState *env)
34 #else
36 extern int semihosting_enabled;
38 /* Try to fill the TLB and return an exception if error. If retaddr is
39 NULL, it means that the function was called in C code (i.e. not
40 from generated code or from helper.c) */
41 void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
42 uintptr_t retaddr)
44 int ret;
46 ret = m68k_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
47 if (unlikely(ret)) {
48 if (retaddr) {
49 /* now we have a real cpu fault */
50 cpu_restore_state(cs, retaddr);
52 cpu_loop_exit(cs);
56 static void do_rte(CPUM68KState *env)
58 uint32_t sp;
59 uint32_t fmt;
61 sp = env->aregs[7];
62 fmt = cpu_ldl_kernel(env, sp);
63 env->pc = cpu_ldl_kernel(env, sp + 4);
64 sp |= (fmt >> 28) & 3;
65 env->sr = fmt & 0xffff;
66 m68k_switch_sp(env);
67 env->aregs[7] = sp + 8;
70 static void do_interrupt_all(CPUM68KState *env, int is_hw)
72 CPUState *cs = CPU(m68k_env_get_cpu(env));
73 uint32_t sp;
74 uint32_t fmt;
75 uint32_t retaddr;
76 uint32_t vector;
78 fmt = 0;
79 retaddr = env->pc;
81 if (!is_hw) {
82 switch (cs->exception_index) {
83 case EXCP_RTE:
84 /* Return from an exception. */
85 do_rte(env);
86 return;
87 case EXCP_HALT_INSN:
88 if (semihosting_enabled
89 && (env->sr & SR_S) != 0
90 && (env->pc & 3) == 0
91 && cpu_lduw_code(env, env->pc - 4) == 0x4e71
92 && cpu_ldl_code(env, env->pc) == 0x4e7bf000) {
93 env->pc += 4;
94 do_m68k_semihosting(env, env->dregs[0]);
95 return;
97 cs->halted = 1;
98 cs->exception_index = EXCP_HLT;
99 cpu_loop_exit(cs);
100 return;
102 if (cs->exception_index >= EXCP_TRAP0
103 && cs->exception_index <= EXCP_TRAP15) {
104 /* Move the PC after the trap instruction. */
105 retaddr += 2;
109 vector = cs->exception_index << 2;
111 sp = env->aregs[7];
113 fmt |= 0x40000000;
114 fmt |= (sp & 3) << 28;
115 fmt |= vector << 16;
116 fmt |= env->sr;
118 env->sr |= SR_S;
119 if (is_hw) {
120 env->sr = (env->sr & ~SR_I) | (env->pending_level << SR_I_SHIFT);
121 env->sr &= ~SR_M;
123 m68k_switch_sp(env);
125 /* ??? This could cause MMU faults. */
126 sp &= ~3;
127 sp -= 4;
128 cpu_stl_kernel(env, sp, retaddr);
129 sp -= 4;
130 cpu_stl_kernel(env, sp, fmt);
131 env->aregs[7] = sp;
132 /* Jump to vector. */
133 env->pc = cpu_ldl_kernel(env, env->vbr + vector);
136 void m68k_cpu_do_interrupt(CPUState *cs)
138 M68kCPU *cpu = M68K_CPU(cs);
139 CPUM68KState *env = &cpu->env;
141 do_interrupt_all(env, 0);
144 static inline void do_interrupt_m68k_hardirq(CPUM68KState *env)
146 do_interrupt_all(env, 1);
148 #endif
150 bool m68k_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
152 M68kCPU *cpu = M68K_CPU(cs);
153 CPUM68KState *env = &cpu->env;
155 if (interrupt_request & CPU_INTERRUPT_HARD
156 && ((env->sr & SR_I) >> SR_I_SHIFT) < env->pending_level) {
157 /* Real hardware gets the interrupt vector via an IACK cycle
158 at this point. Current emulated hardware doesn't rely on
159 this, so we provide/save the vector when the interrupt is
160 first signalled. */
161 cs->exception_index = env->pending_vector;
162 do_interrupt_m68k_hardirq(env);
163 return true;
165 return false;
168 static void raise_exception(CPUM68KState *env, int tt)
170 CPUState *cs = CPU(m68k_env_get_cpu(env));
172 cs->exception_index = tt;
173 cpu_loop_exit(cs);
176 void HELPER(raise_exception)(CPUM68KState *env, uint32_t tt)
178 raise_exception(env, tt);
181 void HELPER(divu)(CPUM68KState *env, uint32_t word)
183 uint32_t num;
184 uint32_t den;
185 uint32_t quot;
186 uint32_t rem;
187 uint32_t flags;
189 num = env->div1;
190 den = env->div2;
191 /* ??? This needs to make sure the throwing location is accurate. */
192 if (den == 0) {
193 raise_exception(env, EXCP_DIV0);
195 quot = num / den;
196 rem = num % den;
197 flags = 0;
198 if (word && quot > 0xffff)
199 flags |= CCF_V;
200 if (quot == 0)
201 flags |= CCF_Z;
202 else if ((int32_t)quot < 0)
203 flags |= CCF_N;
204 env->div1 = quot;
205 env->div2 = rem;
206 env->cc_dest = flags;
209 void HELPER(divs)(CPUM68KState *env, uint32_t word)
211 int32_t num;
212 int32_t den;
213 int32_t quot;
214 int32_t rem;
215 int32_t flags;
217 num = env->div1;
218 den = env->div2;
219 if (den == 0) {
220 raise_exception(env, EXCP_DIV0);
222 quot = num / den;
223 rem = num % den;
224 flags = 0;
225 if (word && quot != (int16_t)quot)
226 flags |= CCF_V;
227 if (quot == 0)
228 flags |= CCF_Z;
229 else if (quot < 0)
230 flags |= CCF_N;
231 env->div1 = quot;
232 env->div2 = rem;
233 env->cc_dest = flags;