hw/s390x/css.c

   1 /*
   2  * Channel subsystem base support.
   3  *
   4  * Copyright 2012 IBM Corp.
   5  * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
   6  *
   7  * This work is licensed under the terms of the GNU GPL, version 2 or (at
   8  * your option) any later version. See the COPYING file in the top-level
   9  * directory.
  10  */
  11
  12 #include <hw/qdev.h>
  13 #include "qemu/bitops.h"
  14 #include "exec/address-spaces.h"
  15 #include "cpu.h"
  16 #include "ioinst.h"
  17 #include "css.h"
  18 #include "trace.h"
  19 #include "hw/s390x/s390_flic.h"
  20
  21 typedef struct CrwContainer {
  22     CRW crw;
  23     QTAILQ_ENTRY(CrwContainer) sibling;
  24 } CrwContainer;
  25
  26 typedef struct ChpInfo {
  27     uint8_t in_use;
  28     uint8_t type;
  29     uint8_t is_virtual;
  30 } ChpInfo;
  31
  32 typedef struct SubchSet {
  33     SubchDev *sch[MAX_SCHID + 1];
  34     unsigned long schids_used[BITS_TO_LONGS(MAX_SCHID + 1)];
  35     unsigned long devnos_used[BITS_TO_LONGS(MAX_SCHID + 1)];
  36 } SubchSet;
  37
  38 typedef struct CssImage {
  39     SubchSet *sch_set[MAX_SSID + 1];
  40     ChpInfo chpids[MAX_CHPID + 1];
  41 } CssImage;
  42
  43 typedef struct IoAdapter {
  44     uint32_t id;
  45     uint8_t type;
  46     uint8_t isc;
  47     QTAILQ_ENTRY(IoAdapter) sibling;
  48 } IoAdapter;
  49
  50 typedef struct ChannelSubSys {
  51     QTAILQ_HEAD(, CrwContainer) pending_crws;
  52     bool do_crw_mchk;
  53     bool crws_lost;
  54     uint8_t max_cssid;
  55     uint8_t max_ssid;
  56     bool chnmon_active;
  57     uint64_t chnmon_area;
  58     CssImage *css[MAX_CSSID + 1];
  59     uint8_t default_cssid;
  60     QTAILQ_HEAD(, IoAdapter) io_adapters;
  61 } ChannelSubSys;
  62
  63 static ChannelSubSys *channel_subsys;
  64
  65 int css_create_css_image(uint8_t cssid, bool default_image)
  66 {
  67     trace_css_new_image(cssid, default_image ? "(default)" : "");
  68     if (cssid > MAX_CSSID) {
  69         return -EINVAL;
  70     }
  71     if (channel_subsys->css[cssid]) {
  72         return -EBUSY;
  73     }
  74     channel_subsys->css[cssid] = g_malloc0(sizeof(CssImage));
  75     if (default_image) {
  76         channel_subsys->default_cssid = cssid;
  77     }
  78     return 0;
  79 }
  80
  81 int css_register_io_adapter(uint8_t type, uint8_t isc, bool swap,
  82                             bool maskable, uint32_t *id)
  83 {
  84     IoAdapter *adapter;
  85     bool found = false;
  86     int ret;
  87     S390FLICState *fs = s390_get_flic();
  88     S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
  89
  90     *id = 0;
  91     QTAILQ_FOREACH(adapter, &channel_subsys->io_adapters, sibling) {
  92         if ((adapter->type == type) && (adapter->isc == isc)) {
  93             *id = adapter->id;
  94             found = true;
  95             ret = 0;
  96             break;
  97         }
  98         if (adapter->id >= *id) {
  99             *id = adapter->id + 1;
 100         }
 101     }
 102     if (found) {
 103         goto out;
 104     }
 105     adapter = g_new0(IoAdapter, 1);
 106     ret = fsc->register_io_adapter(fs, *id, isc, swap, maskable);
 107     if (ret == 0) {
 108         adapter->id = *id;
 109         adapter->isc = isc;
 110         adapter->type = type;
 111         QTAILQ_INSERT_TAIL(&channel_subsys->io_adapters, adapter, sibling);
 112     } else {
 113         g_free(adapter);
 114         fprintf(stderr, "Unexpected error %d when registering adapter %d\n",
 115                 ret, *id);
 116     }
 117 out:
 118     return ret;
 119 }
 120
 121 uint16_t css_build_subchannel_id(SubchDev *sch)
 122 {
 123     if (channel_subsys->max_cssid > 0) {
 124         return (sch->cssid << 8) | (1 << 3) | (sch->ssid << 1) | 1;
 125     }
 126     return (sch->ssid << 1) | 1;
 127 }
 128
 129 static void css_inject_io_interrupt(SubchDev *sch)
 130 {
 131     uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
 132
 133     trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
 134                            sch->curr_status.pmcw.intparm, isc, "");
 135     s390_io_interrupt(css_build_subchannel_id(sch),
 136                       sch->schid,
 137                       sch->curr_status.pmcw.intparm,
 138                       isc << 27);
 139 }
 140
 141 void css_conditional_io_interrupt(SubchDev *sch)
 142 {
 143     /*
 144      * If the subchannel is not currently status pending, make it pending
 145      * with alert status.
 146      */
 147     if (!(sch->curr_status.scsw.ctrl & SCSW_STCTL_STATUS_PEND)) {
 148         uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
 149
 150         trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
 151                                sch->curr_status.pmcw.intparm, isc,
 152                                "(unsolicited)");
 153         sch->curr_status.scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
 154         sch->curr_status.scsw.ctrl |=
 155             SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
 156         /* Inject an I/O interrupt. */
 157         s390_io_interrupt(css_build_subchannel_id(sch),
 158                           sch->schid,
 159                           sch->curr_status.pmcw.intparm,
 160                           isc << 27);
 161     }
 162 }
 163
 164 void css_adapter_interrupt(uint8_t isc)
 165 {
 166     uint32_t io_int_word = (isc << 27) | IO_INT_WORD_AI;
 167
 168     trace_css_adapter_interrupt(isc);
 169     s390_io_interrupt(0, 0, 0, io_int_word);
 170 }
 171
 172 static void sch_handle_clear_func(SubchDev *sch)
 173 {
 174     PMCW *p = &sch->curr_status.pmcw;
 175     SCSW *s = &sch->curr_status.scsw;
 176     int path;
 177
 178     /* Path management: In our simple css, we always choose the only path. */
 179     path = 0x80;
 180
 181     /* Reset values prior to 'issuing the clear signal'. */
 182     p->lpum = 0;
 183     p->pom = 0xff;
 184     s->flags &= ~SCSW_FLAGS_MASK_PNO;
 185
 186     /* We always 'attempt to issue the clear signal', and we always succeed. */
 187     sch->channel_prog = 0x0;
 188     sch->last_cmd_valid = false;
 189     s->ctrl &= ~SCSW_ACTL_CLEAR_PEND;
 190     s->ctrl |= SCSW_STCTL_STATUS_PEND;
 191
 192     s->dstat = 0;
 193     s->cstat = 0;
 194     p->lpum = path;
 195
 196 }
 197
 198 static void sch_handle_halt_func(SubchDev *sch)
 199 {
 200
 201     PMCW *p = &sch->curr_status.pmcw;
 202     SCSW *s = &sch->curr_status.scsw;
 203     hwaddr curr_ccw = sch->channel_prog;
 204     int path;
 205
 206     /* Path management: In our simple css, we always choose the only path. */
 207     path = 0x80;
 208
 209     /* We always 'attempt to issue the halt signal', and we always succeed. */
 210     sch->channel_prog = 0x0;
 211     sch->last_cmd_valid = false;
 212     s->ctrl &= ~SCSW_ACTL_HALT_PEND;
 213     s->ctrl |= SCSW_STCTL_STATUS_PEND;
 214
 215     if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) ||
 216         !((s->ctrl & SCSW_ACTL_START_PEND) ||
 217           (s->ctrl & SCSW_ACTL_SUSP))) {
 218         s->dstat = SCSW_DSTAT_DEVICE_END;
 219     }
 220     if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) ||
 221         (s->ctrl & SCSW_ACTL_SUSP)) {
 222         s->cpa = curr_ccw + 8;
 223     }
 224     s->cstat = 0;
 225     p->lpum = path;
 226
 227 }
 228
 229 static void copy_sense_id_to_guest(SenseId *dest, SenseId *src)
 230 {
 231     int i;
 232
 233     dest->reserved = src->reserved;
 234     dest->cu_type = cpu_to_be16(src->cu_type);
 235     dest->cu_model = src->cu_model;
 236     dest->dev_type = cpu_to_be16(src->dev_type);
 237     dest->dev_model = src->dev_model;
 238     dest->unused = src->unused;
 239     for (i = 0; i < ARRAY_SIZE(dest->ciw); i++) {
 240         dest->ciw[i].type = src->ciw[i].type;
 241         dest->ciw[i].command = src->ciw[i].command;
 242         dest->ciw[i].count = cpu_to_be16(src->ciw[i].count);
 243     }
 244 }
 245
 246 static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt1)
 247 {
 248     CCW0 tmp0;
 249     CCW1 tmp1;
 250     CCW1 ret;
 251
 252     if (fmt1) {
 253         cpu_physical_memory_read(addr, &tmp1, sizeof(tmp1));
 254         ret.cmd_code = tmp1.cmd_code;
 255         ret.flags = tmp1.flags;
 256         ret.count = be16_to_cpu(tmp1.count);
 257         ret.cda = be32_to_cpu(tmp1.cda);
 258     } else {
 259         cpu_physical_memory_read(addr, &tmp0, sizeof(tmp0));
 260         ret.cmd_code = tmp0.cmd_code;
 261         ret.flags = tmp0.flags;
 262         ret.count = be16_to_cpu(tmp0.count);
 263         ret.cda = be16_to_cpu(tmp0.cda1) | (tmp0.cda0 << 16);
 264     }
 265     return ret;
 266 }
 267
 268 static int css_interpret_ccw(SubchDev *sch, hwaddr ccw_addr)
 269 {
 270     int ret;
 271     bool check_len;
 272     int len;
 273     CCW1 ccw;
 274
 275     if (!ccw_addr) {
 276         return -EIO;
 277     }
 278
 279     /* Translate everything to format-1 ccws - the information is the same. */
 280     ccw = copy_ccw_from_guest(ccw_addr, sch->ccw_fmt_1);
 281
 282     /* Check for invalid command codes. */
 283     if ((ccw.cmd_code & 0x0f) == 0) {
 284         return -EINVAL;
 285     }
 286     if (((ccw.cmd_code & 0x0f) == CCW_CMD_TIC) &&
 287         ((ccw.cmd_code & 0xf0) != 0)) {
 288         return -EINVAL;
 289     }
 290
 291     if (ccw.flags & CCW_FLAG_SUSPEND) {
 292         return -EINPROGRESS;
 293     }
 294
 295     check_len = !((ccw.flags & CCW_FLAG_SLI) && !(ccw.flags & CCW_FLAG_DC));
 296
 297     if (!ccw.cda) {
 298         if (sch->ccw_no_data_cnt == 255) {
 299             return -EINVAL;
 300         }
 301         sch->ccw_no_data_cnt++;
 302     }
 303
 304     /* Look at the command. */
 305     switch (ccw.cmd_code) {
 306     case CCW_CMD_NOOP:
 307         /* Nothing to do. */
 308         ret = 0;
 309         break;
 310     case CCW_CMD_BASIC_SENSE:
 311         if (check_len) {
 312             if (ccw.count != sizeof(sch->sense_data)) {
 313                 ret = -EINVAL;
 314                 break;
 315             }
 316         }
 317         len = MIN(ccw.count, sizeof(sch->sense_data));
 318         cpu_physical_memory_write(ccw.cda, sch->sense_data, len);
 319         sch->curr_status.scsw.count = ccw.count - len;
 320         memset(sch->sense_data, 0, sizeof(sch->sense_data));
 321         ret = 0;
 322         break;
 323     case CCW_CMD_SENSE_ID:
 324     {
 325         SenseId sense_id;
 326
 327         copy_sense_id_to_guest(&sense_id, &sch->id);
 328         /* Sense ID information is device specific. */
 329         if (check_len) {
 330             if (ccw.count != sizeof(sense_id)) {
 331                 ret = -EINVAL;
 332                 break;
 333             }
 334         }
 335         len = MIN(ccw.count, sizeof(sense_id));
 336         /*
 337          * Only indicate 0xff in the first sense byte if we actually
 338          * have enough place to store at least bytes 0-3.
 339          */
 340         if (len >= 4) {
 341             sense_id.reserved = 0xff;
 342         } else {
 343             sense_id.reserved = 0;
 344         }
 345         cpu_physical_memory_write(ccw.cda, &sense_id, len);
 346         sch->curr_status.scsw.count = ccw.count - len;
 347         ret = 0;
 348         break;
 349     }
 350     case CCW_CMD_TIC:
 351         if (sch->last_cmd_valid && (sch->last_cmd.cmd_code == CCW_CMD_TIC)) {
 352             ret = -EINVAL;
 353             break;
 354         }
 355         if (ccw.flags & (CCW_FLAG_CC | CCW_FLAG_DC)) {
 356             ret = -EINVAL;
 357             break;
 358         }
 359         sch->channel_prog = ccw.cda;
 360         ret = -EAGAIN;
 361         break;
 362     default:
 363         if (sch->ccw_cb) {
 364             /* Handle device specific commands. */
 365             ret = sch->ccw_cb(sch, ccw);
 366         } else {
 367             ret = -ENOSYS;
 368         }
 369         break;
 370     }
 371     sch->last_cmd = ccw;
 372     sch->last_cmd_valid = true;
 373     if (ret == 0) {
 374         if (ccw.flags & CCW_FLAG_CC) {
 375             sch->channel_prog += 8;
 376             ret = -EAGAIN;
 377         }
 378     }
 379
 380     return ret;
 381 }
 382
 383 static void sch_handle_start_func(SubchDev *sch, ORB *orb)
 384 {
 385
 386     PMCW *p = &sch->curr_status.pmcw;
 387     SCSW *s = &sch->curr_status.scsw;
 388     int path;
 389     int ret;
 390
 391     /* Path management: In our simple css, we always choose the only path. */
 392     path = 0x80;
 393
 394     if (!(s->ctrl & SCSW_ACTL_SUSP)) {
 395         /* Look at the orb and try to execute the channel program. */
 396         assert(orb != NULL); /* resume does not pass an orb */
 397         p->intparm = orb->intparm;
 398         if (!(orb->lpm & path)) {
 399             /* Generate a deferred cc 3 condition. */
 400             s->flags |= SCSW_FLAGS_MASK_CC;
 401             s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
 402             s->ctrl |= (SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND);
 403             return;
 404         }
 405         sch->ccw_fmt_1 = !!(orb->ctrl0 & ORB_CTRL0_MASK_FMT);
 406         sch->ccw_no_data_cnt = 0;
 407     } else {
 408         s->ctrl &= ~(SCSW_ACTL_SUSP | SCSW_ACTL_RESUME_PEND);
 409     }
 410     sch->last_cmd_valid = false;
 411     do {
 412         ret = css_interpret_ccw(sch, sch->channel_prog);
 413         switch (ret) {
 414         case -EAGAIN:
 415             /* ccw chain, continue processing */
 416             break;
 417         case 0:
 418             /* success */
 419             s->ctrl &= ~SCSW_ACTL_START_PEND;
 420             s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
 421             s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
 422                     SCSW_STCTL_STATUS_PEND;
 423             s->dstat = SCSW_DSTAT_CHANNEL_END | SCSW_DSTAT_DEVICE_END;
 424             s->cpa = sch->channel_prog + 8;
 425             break;
 426         case -ENOSYS:
 427             /* unsupported command, generate unit check (command reject) */
 428             s->ctrl &= ~SCSW_ACTL_START_PEND;
 429             s->dstat = SCSW_DSTAT_UNIT_CHECK;
 430             /* Set sense bit 0 in ecw0. */
 431             sch->sense_data[0] = 0x80;
 432             s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
 433             s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
 434                     SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
 435             s->cpa = sch->channel_prog + 8;
 436             break;
 437         case -EFAULT:
 438             /* memory problem, generate channel data check */
 439             s->ctrl &= ~SCSW_ACTL_START_PEND;
 440             s->cstat = SCSW_CSTAT_DATA_CHECK;
 441             s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
 442             s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
 443                     SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
 444             s->cpa = sch->channel_prog + 8;
 445             break;
 446         case -EBUSY:
 447             /* subchannel busy, generate deferred cc 1 */
 448             s->flags &= ~SCSW_FLAGS_MASK_CC;
 449             s->flags |= (1 << 8);
 450             s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
 451             s->ctrl |= SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
 452             break;
 453         case -EINPROGRESS:
 454             /* channel program has been suspended */
 455             s->ctrl &= ~SCSW_ACTL_START_PEND;
 456             s->ctrl |= SCSW_ACTL_SUSP;
 457             break;
 458         default:
 459             /* error, generate channel program check */
 460             s->ctrl &= ~SCSW_ACTL_START_PEND;
 461             s->cstat = SCSW_CSTAT_PROG_CHECK;
 462             s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
 463             s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
 464                     SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
 465             s->cpa = sch->channel_prog + 8;
 466             break;
 467         }
 468     } while (ret == -EAGAIN);
 469
 470 }
 471
 472 /*
 473  * On real machines, this would run asynchronously to the main vcpus.
 474  * We might want to make some parts of the ssch handling (interpreting
 475  * read/writes) asynchronous later on if we start supporting more than
 476  * our current very simple devices.
 477  */
 478 static void do_subchannel_work(SubchDev *sch, ORB *orb)
 479 {
 480
 481     SCSW *s = &sch->curr_status.scsw;
 482
 483     if (s->ctrl & SCSW_FCTL_CLEAR_FUNC) {
 484         sch_handle_clear_func(sch);
 485     } else if (s->ctrl & SCSW_FCTL_HALT_FUNC) {
 486         sch_handle_halt_func(sch);
 487     } else if (s->ctrl & SCSW_FCTL_START_FUNC) {
 488         sch_handle_start_func(sch, orb);
 489     } else {
 490         /* Cannot happen. */
 491         return;
 492     }
 493     css_inject_io_interrupt(sch);
 494 }
 495
 496 static void copy_pmcw_to_guest(PMCW *dest, const PMCW *src)
 497 {
 498     int i;
 499
 500     dest->intparm = cpu_to_be32(src->intparm);
 501     dest->flags = cpu_to_be16(src->flags);
 502     dest->devno = cpu_to_be16(src->devno);
 503     dest->lpm = src->lpm;
 504     dest->pnom = src->pnom;
 505     dest->lpum = src->lpum;
 506     dest->pim = src->pim;
 507     dest->mbi = cpu_to_be16(src->mbi);
 508     dest->pom = src->pom;
 509     dest->pam = src->pam;
 510     for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
 511         dest->chpid[i] = src->chpid[i];
 512     }
 513     dest->chars = cpu_to_be32(src->chars);
 514 }
 515
 516 static void copy_scsw_to_guest(SCSW *dest, const SCSW *src)
 517 {
 518     dest->flags = cpu_to_be16(src->flags);
 519     dest->ctrl = cpu_to_be16(src->ctrl);
 520     dest->cpa = cpu_to_be32(src->cpa);
 521     dest->dstat = src->dstat;
 522     dest->cstat = src->cstat;
 523     dest->count = cpu_to_be16(src->count);
 524 }
 525
 526 static void copy_schib_to_guest(SCHIB *dest, const SCHIB *src)
 527 {
 528     int i;
 529
 530     copy_pmcw_to_guest(&dest->pmcw, &src->pmcw);
 531     copy_scsw_to_guest(&dest->scsw, &src->scsw);
 532     dest->mba = cpu_to_be64(src->mba);
 533     for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
 534         dest->mda[i] = src->mda[i];
 535     }
 536 }
 537
 538 int css_do_stsch(SubchDev *sch, SCHIB *schib)
 539 {
 540     /* Use current status. */
 541     copy_schib_to_guest(schib, &sch->curr_status);
 542     return 0;
 543 }
 544
 545 static void copy_pmcw_from_guest(PMCW *dest, const PMCW *src)
 546 {
 547     int i;
 548
 549     dest->intparm = be32_to_cpu(src->intparm);
 550     dest->flags = be16_to_cpu(src->flags);
 551     dest->devno = be16_to_cpu(src->devno);
 552     dest->lpm = src->lpm;
 553     dest->pnom = src->pnom;
 554     dest->lpum = src->lpum;
 555     dest->pim = src->pim;
 556     dest->mbi = be16_to_cpu(src->mbi);
 557     dest->pom = src->pom;
 558     dest->pam = src->pam;
 559     for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
 560         dest->chpid[i] = src->chpid[i];
 561     }
 562     dest->chars = be32_to_cpu(src->chars);
 563 }
 564
 565 static void copy_scsw_from_guest(SCSW *dest, const SCSW *src)
 566 {
 567     dest->flags = be16_to_cpu(src->flags);
 568     dest->ctrl = be16_to_cpu(src->ctrl);
 569     dest->cpa = be32_to_cpu(src->cpa);
 570     dest->dstat = src->dstat;
 571     dest->cstat = src->cstat;
 572     dest->count = be16_to_cpu(src->count);
 573 }
 574
 575 static void copy_schib_from_guest(SCHIB *dest, const SCHIB *src)
 576 {
 577     int i;
 578
 579     copy_pmcw_from_guest(&dest->pmcw, &src->pmcw);
 580     copy_scsw_from_guest(&dest->scsw, &src->scsw);
 581     dest->mba = be64_to_cpu(src->mba);
 582     for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
 583         dest->mda[i] = src->mda[i];
 584     }
 585 }
 586
 587 int css_do_msch(SubchDev *sch, SCHIB *orig_schib)
 588 {
 589     SCSW *s = &sch->curr_status.scsw;
 590     PMCW *p = &sch->curr_status.pmcw;
 591     int ret;
 592     SCHIB schib;
 593
 594     if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_DNV)) {
 595         ret = 0;
 596         goto out;
 597     }
 598
 599     if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
 600         ret = -EINPROGRESS;
 601         goto out;
 602     }
 603
 604     if (s->ctrl &
 605         (SCSW_FCTL_START_FUNC|SCSW_FCTL_HALT_FUNC|SCSW_FCTL_CLEAR_FUNC)) {
 606         ret = -EBUSY;
 607         goto out;
 608     }
 609
 610     copy_schib_from_guest(&schib, orig_schib);
 611     /* Only update the program-modifiable fields. */
 612     p->intparm = schib.pmcw.intparm;
 613     p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
 614                   PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
 615                   PMCW_FLAGS_MASK_MP);
 616     p->flags |= schib.pmcw.flags &
 617             (PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
 618              PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
 619              PMCW_FLAGS_MASK_MP);
 620     p->lpm = schib.pmcw.lpm;
 621     p->mbi = schib.pmcw.mbi;
 622     p->pom = schib.pmcw.pom;
 623     p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
 624     p->chars |= schib.pmcw.chars &
 625             (PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
 626     sch->curr_status.mba = schib.mba;
 627
 628     ret = 0;
 629
 630 out:
 631     return ret;
 632 }
 633
 634 int css_do_xsch(SubchDev *sch)
 635 {
 636     SCSW *s = &sch->curr_status.scsw;
 637     PMCW *p = &sch->curr_status.pmcw;
 638     int ret;
 639
 640     if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
 641         ret = -ENODEV;
 642         goto out;
 643     }
 644
 645     if (!(s->ctrl & SCSW_CTRL_MASK_FCTL) ||
 646         ((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
 647         (!(s->ctrl &
 648            (SCSW_ACTL_RESUME_PEND | SCSW_ACTL_START_PEND | SCSW_ACTL_SUSP))) ||
 649         (s->ctrl & SCSW_ACTL_SUBCH_ACTIVE)) {
 650         ret = -EINPROGRESS;
 651         goto out;
 652     }
 653
 654     if (s->ctrl & SCSW_CTRL_MASK_STCTL) {
 655         ret = -EBUSY;
 656         goto out;
 657     }
 658
 659     /* Cancel the current operation. */
 660     s->ctrl &= ~(SCSW_FCTL_START_FUNC |
 661                  SCSW_ACTL_RESUME_PEND |
 662                  SCSW_ACTL_START_PEND |
 663                  SCSW_ACTL_SUSP);
 664     sch->channel_prog = 0x0;
 665     sch->last_cmd_valid = false;
 666     s->dstat = 0;
 667     s->cstat = 0;
 668     ret = 0;
 669
 670 out:
 671     return ret;
 672 }
 673
 674 int css_do_csch(SubchDev *sch)
 675 {
 676     SCSW *s = &sch->curr_status.scsw;
 677     PMCW *p = &sch->curr_status.pmcw;
 678     int ret;
 679
 680     if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
 681         ret = -ENODEV;
 682         goto out;
 683     }
 684
 685     /* Trigger the clear function. */
 686     s->ctrl &= ~(SCSW_CTRL_MASK_FCTL | SCSW_CTRL_MASK_ACTL);
 687     s->ctrl |= SCSW_FCTL_CLEAR_FUNC | SCSW_FCTL_CLEAR_FUNC;
 688
 689     do_subchannel_work(sch, NULL);
 690     ret = 0;
 691
 692 out:
 693     return ret;
 694 }
 695
 696 int css_do_hsch(SubchDev *sch)
 697 {
 698     SCSW *s = &sch->curr_status.scsw;
 699     PMCW *p = &sch->curr_status.pmcw;
 700     int ret;
 701
 702     if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
 703         ret = -ENODEV;
 704         goto out;
 705     }
 706
 707     if (((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_STATUS_PEND) ||
 708         (s->ctrl & (SCSW_STCTL_PRIMARY |
 709                     SCSW_STCTL_SECONDARY |
 710                     SCSW_STCTL_ALERT))) {
 711         ret = -EINPROGRESS;
 712         goto out;
 713     }
 714
 715     if (s->ctrl & (SCSW_FCTL_HALT_FUNC | SCSW_FCTL_CLEAR_FUNC)) {
 716         ret = -EBUSY;
 717         goto out;
 718     }
 719
 720     /* Trigger the halt function. */
 721     s->ctrl |= SCSW_FCTL_HALT_FUNC;
 722     s->ctrl &= ~SCSW_FCTL_START_FUNC;
 723     if (((s->ctrl & SCSW_CTRL_MASK_ACTL) ==
 724          (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) &&
 725         ((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_INTERMEDIATE)) {
 726         s->ctrl &= ~SCSW_STCTL_STATUS_PEND;
 727     }
 728     s->ctrl |= SCSW_ACTL_HALT_PEND;
 729
 730     do_subchannel_work(sch, NULL);
 731     ret = 0;
 732
 733 out:
 734     return ret;
 735 }
 736
 737 static void css_update_chnmon(SubchDev *sch)
 738 {
 739     if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_MME)) {
 740         /* Not active. */
 741         return;
 742     }
 743     /* The counter is conveniently located at the beginning of the struct. */
 744     if (sch->curr_status.pmcw.chars & PMCW_CHARS_MASK_MBFC) {
 745         /* Format 1, per-subchannel area. */
 746         uint32_t count;
 747
 748         count = ldl_phys(&address_space_memory, sch->curr_status.mba);
 749         count++;
 750         stl_phys(&address_space_memory, sch->curr_status.mba, count);
 751     } else {
 752         /* Format 0, global area. */
 753         uint32_t offset;
 754         uint16_t count;
 755
 756         offset = sch->curr_status.pmcw.mbi << 5;
 757         count = lduw_phys(&address_space_memory,
 758                           channel_subsys->chnmon_area + offset);
 759         count++;
 760         stw_phys(&address_space_memory,
 761                  channel_subsys->chnmon_area + offset, count);
 762     }
 763 }
 764
 765 int css_do_ssch(SubchDev *sch, ORB *orb)
 766 {
 767     SCSW *s = &sch->curr_status.scsw;
 768     PMCW *p = &sch->curr_status.pmcw;
 769     int ret;
 770
 771     if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
 772         ret = -ENODEV;
 773         goto out;
 774     }
 775
 776     if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
 777         ret = -EINPROGRESS;
 778         goto out;
 779     }
 780
 781     if (s->ctrl & (SCSW_FCTL_START_FUNC |
 782                    SCSW_FCTL_HALT_FUNC |
 783                    SCSW_FCTL_CLEAR_FUNC)) {
 784         ret = -EBUSY;
 785         goto out;
 786     }
 787
 788     /* If monitoring is active, update counter. */
 789     if (channel_subsys->chnmon_active) {
 790         css_update_chnmon(sch);
 791     }
 792     sch->channel_prog = orb->cpa;
 793     /* Trigger the start function. */
 794     s->ctrl |= (SCSW_FCTL_START_FUNC | SCSW_ACTL_START_PEND);
 795     s->flags &= ~SCSW_FLAGS_MASK_PNO;
 796
 797     do_subchannel_work(sch, orb);
 798     ret = 0;
 799
 800 out:
 801     return ret;
 802 }
 803
 804 static void copy_irb_to_guest(IRB *dest, const IRB *src, PMCW *pmcw)
 805 {
 806     int i;
 807     uint16_t stctl = src->scsw.ctrl & SCSW_CTRL_MASK_STCTL;
 808     uint16_t actl = src->scsw.ctrl & SCSW_CTRL_MASK_ACTL;
 809
 810     copy_scsw_to_guest(&dest->scsw, &src->scsw);
 811
 812     for (i = 0; i < ARRAY_SIZE(dest->esw); i++) {
 813         dest->esw[i] = cpu_to_be32(src->esw[i]);
 814     }
 815     for (i = 0; i < ARRAY_SIZE(dest->ecw); i++) {
 816         dest->ecw[i] = cpu_to_be32(src->ecw[i]);
 817     }
 818     /* extended measurements enabled? */
 819     if ((src->scsw.flags & SCSW_FLAGS_MASK_ESWF) ||
 820         !(pmcw->flags & PMCW_FLAGS_MASK_TF) ||
 821         !(pmcw->chars & PMCW_CHARS_MASK_XMWME)) {
 822         return;
 823     }
 824     /* extended measurements pending? */
 825     if (!(stctl & SCSW_STCTL_STATUS_PEND)) {
 826         return;
 827     }
 828     if ((stctl & SCSW_STCTL_PRIMARY) ||
 829         (stctl == SCSW_STCTL_SECONDARY) ||
 830         ((stctl & SCSW_STCTL_INTERMEDIATE) && (actl & SCSW_ACTL_SUSP))) {
 831         for (i = 0; i < ARRAY_SIZE(dest->emw); i++) {
 832             dest->emw[i] = cpu_to_be32(src->emw[i]);
 833         }
 834     }
 835 }
 836
 837 int css_do_tsch(SubchDev *sch, IRB *target_irb)
 838 {
 839     SCSW *s = &sch->curr_status.scsw;
 840     PMCW *p = &sch->curr_status.pmcw;
 841     uint16_t stctl;
 842     uint16_t fctl;
 843     uint16_t actl;
 844     IRB irb;
 845     int ret;
 846
 847     if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
 848         ret = 3;
 849         goto out;
 850     }
 851
 852     stctl = s->ctrl & SCSW_CTRL_MASK_STCTL;
 853     fctl = s->ctrl & SCSW_CTRL_MASK_FCTL;
 854     actl = s->ctrl & SCSW_CTRL_MASK_ACTL;
 855
 856     /* Prepare the irb for the guest. */
 857     memset(&irb, 0, sizeof(IRB));
 858
 859     /* Copy scsw from current status. */
 860     memcpy(&irb.scsw, s, sizeof(SCSW));
 861     if (stctl & SCSW_STCTL_STATUS_PEND) {
 862         if (s->cstat & (SCSW_CSTAT_DATA_CHECK |
 863                         SCSW_CSTAT_CHN_CTRL_CHK |
 864                         SCSW_CSTAT_INTF_CTRL_CHK)) {
 865             irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF;
 866             irb.esw[0] = 0x04804000;
 867         } else {
 868             irb.esw[0] = 0x00800000;
 869         }
 870         /* If a unit check is pending, copy sense data. */
 871         if ((s->dstat & SCSW_DSTAT_UNIT_CHECK) &&
 872             (p->chars & PMCW_CHARS_MASK_CSENSE)) {
 873             irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF | SCSW_FLAGS_MASK_ECTL;
 874             memcpy(irb.ecw, sch->sense_data, sizeof(sch->sense_data));
 875             irb.esw[1] = 0x01000000 | (sizeof(sch->sense_data) << 8);
 876         }
 877     }
 878     /* Store the irb to the guest. */
 879     copy_irb_to_guest(target_irb, &irb, p);
 880
 881     /* Clear conditions on subchannel, if applicable. */
 882     if (stctl & SCSW_STCTL_STATUS_PEND) {
 883         s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
 884         if ((stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) ||
 885             ((fctl & SCSW_FCTL_HALT_FUNC) &&
 886              (actl & SCSW_ACTL_SUSP))) {
 887             s->ctrl &= ~SCSW_CTRL_MASK_FCTL;
 888         }
 889         if (stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) {
 890             s->flags &= ~SCSW_FLAGS_MASK_PNO;
 891             s->ctrl &= ~(SCSW_ACTL_RESUME_PEND |
 892                          SCSW_ACTL_START_PEND |
 893                          SCSW_ACTL_HALT_PEND |
 894                          SCSW_ACTL_CLEAR_PEND |
 895                          SCSW_ACTL_SUSP);
 896         } else {
 897             if ((actl & SCSW_ACTL_SUSP) &&
 898                 (fctl & SCSW_FCTL_START_FUNC)) {
 899                 s->flags &= ~SCSW_FLAGS_MASK_PNO;
 900                 if (fctl & SCSW_FCTL_HALT_FUNC) {
 901                     s->ctrl &= ~(SCSW_ACTL_RESUME_PEND |
 902                                  SCSW_ACTL_START_PEND |
 903                                  SCSW_ACTL_HALT_PEND |
 904                                  SCSW_ACTL_CLEAR_PEND |
 905                                  SCSW_ACTL_SUSP);
 906                 } else {
 907                     s->ctrl &= ~SCSW_ACTL_RESUME_PEND;
 908                 }
 909             }
 910         }
 911         /* Clear pending sense data. */
 912         if (p->chars & PMCW_CHARS_MASK_CSENSE) {
 913             memset(sch->sense_data, 0 , sizeof(sch->sense_data));
 914         }
 915     }
 916
 917     ret = ((stctl & SCSW_STCTL_STATUS_PEND) == 0);
 918
 919 out:
 920     return ret;
 921 }
 922
 923 static void copy_crw_to_guest(CRW *dest, const CRW *src)
 924 {
 925     dest->flags = cpu_to_be16(src->flags);
 926     dest->rsid = cpu_to_be16(src->rsid);
 927 }
 928
 929 int css_do_stcrw(CRW *crw)
 930 {
 931     CrwContainer *crw_cont;
 932     int ret;
 933
 934     crw_cont = QTAILQ_FIRST(&channel_subsys->pending_crws);
 935     if (crw_cont) {
 936         QTAILQ_REMOVE(&channel_subsys->pending_crws, crw_cont, sibling);
 937         copy_crw_to_guest(crw, &crw_cont->crw);
 938         g_free(crw_cont);
 939         ret = 0;
 940     } else {
 941         /* List was empty, turn crw machine checks on again. */
 942         memset(crw, 0, sizeof(*crw));
 943         channel_subsys->do_crw_mchk = true;
 944         ret = 1;
 945     }
 946
 947     return ret;
 948 }
 949
 950 int css_do_tpi(IOIntCode *int_code, int lowcore)
 951 {
 952     /* No pending interrupts for !KVM. */
 953     return 0;
 954  }
 955
 956 int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid,
 957                          int rfmt, void *buf)
 958 {
 959     int i, desc_size;
 960     uint32_t words[8];
 961     uint32_t chpid_type_word;
 962     CssImage *css;
 963
 964     if (!m && !cssid) {
 965         css = channel_subsys->css[channel_subsys->default_cssid];
 966     } else {
 967         css = channel_subsys->css[cssid];
 968     }
 969     if (!css) {
 970         return 0;
 971     }
 972     desc_size = 0;
 973     for (i = f_chpid; i <= l_chpid; i++) {
 974         if (css->chpids[i].in_use) {
 975             chpid_type_word = 0x80000000 | (css->chpids[i].type << 8) | i;
 976             if (rfmt == 0) {
 977                 words[0] = cpu_to_be32(chpid_type_word);
 978                 words[1] = 0;
 979                 memcpy(buf + desc_size, words, 8);
 980                 desc_size += 8;
 981             } else if (rfmt == 1) {
 982                 words[0] = cpu_to_be32(chpid_type_word);
 983                 words[1] = 0;
 984                 words[2] = 0;
 985                 words[3] = 0;
 986                 words[4] = 0;
 987                 words[5] = 0;
 988                 words[6] = 0;
 989                 words[7] = 0;
 990                 memcpy(buf + desc_size, words, 32);
 991                 desc_size += 32;
 992             }
 993         }
 994     }
 995     return desc_size;
 996 }
 997
 998 void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo)
 999 {
1000     /* dct is currently ignored (not really meaningful for our devices) */
1001     /* TODO: Don't ignore mbk. */
1002     if (update && !channel_subsys->chnmon_active) {
1003         /* Enable measuring. */
1004         channel_subsys->chnmon_area = mbo;
1005         channel_subsys->chnmon_active = true;
1006     }
1007     if (!update && channel_subsys->chnmon_active) {
1008         /* Disable measuring. */
1009         channel_subsys->chnmon_area = 0;
1010         channel_subsys->chnmon_active = false;
1011     }
1012 }
1013
1014 int css_do_rsch(SubchDev *sch)
1015 {
1016     SCSW *s = &sch->curr_status.scsw;
1017     PMCW *p = &sch->curr_status.pmcw;
1018     int ret;
1019
1020     if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
1021         ret = -ENODEV;
1022         goto out;
1023     }
1024
1025     if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
1026         ret = -EINPROGRESS;
1027         goto out;
1028     }
1029
1030     if (((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
1031         (s->ctrl & SCSW_ACTL_RESUME_PEND) ||
1032         (!(s->ctrl & SCSW_ACTL_SUSP))) {
1033         ret = -EINVAL;
1034         goto out;
1035     }
1036
1037     /* If monitoring is active, update counter. */
1038     if (channel_subsys->chnmon_active) {
1039         css_update_chnmon(sch);
1040     }
1041
1042     s->ctrl |= SCSW_ACTL_RESUME_PEND;
1043     do_subchannel_work(sch, NULL);
1044     ret = 0;
1045
1046 out:
1047     return ret;
1048 }
1049
1050 int css_do_rchp(uint8_t cssid, uint8_t chpid)
1051 {
1052     uint8_t real_cssid;
1053
1054     if (cssid > channel_subsys->max_cssid) {
1055         return -EINVAL;
1056     }
1057     if (channel_subsys->max_cssid == 0) {
1058         real_cssid = channel_subsys->default_cssid;
1059     } else {
1060         real_cssid = cssid;
1061     }
1062     if (!channel_subsys->css[real_cssid]) {
1063         return -EINVAL;
1064     }
1065
1066     if (!channel_subsys->css[real_cssid]->chpids[chpid].in_use) {
1067         return -ENODEV;
1068     }
1069
1070     if (!channel_subsys->css[real_cssid]->chpids[chpid].is_virtual) {
1071         fprintf(stderr,
1072                 "rchp unsupported for non-virtual chpid %x.%02x!\n",
1073                 real_cssid, chpid);
1074         return -ENODEV;
1075     }
1076
1077     /* We don't really use a channel path, so we're done here. */
1078     css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT,
1079                   channel_subsys->max_cssid > 0 ? 1 : 0, chpid);
1080     if (channel_subsys->max_cssid > 0) {
1081         css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT, 0, real_cssid << 8);
1082     }
1083     return 0;
1084 }
1085
1086 bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid)
1087 {
1088     SubchSet *set;
1089     uint8_t real_cssid;
1090
1091     real_cssid = (!m && (cssid == 0)) ? channel_subsys->default_cssid : cssid;
1092     if (real_cssid > MAX_CSSID || ssid > MAX_SSID ||
1093         !channel_subsys->css[real_cssid] ||
1094         !channel_subsys->css[real_cssid]->sch_set[ssid]) {
1095         return true;
1096     }
1097     set = channel_subsys->css[real_cssid]->sch_set[ssid];
1098     return schid > find_last_bit(set->schids_used,
1099                                  (MAX_SCHID + 1) / sizeof(unsigned long));
1100 }
1101
1102 static int css_add_virtual_chpid(uint8_t cssid, uint8_t chpid, uint8_t type)
1103 {
1104     CssImage *css;
1105
1106     trace_css_chpid_add(cssid, chpid, type);
1107     if (cssid > MAX_CSSID) {
1108         return -EINVAL;
1109     }
1110     css = channel_subsys->css[cssid];
1111     if (!css) {
1112         return -EINVAL;
1113     }
1114     if (css->chpids[chpid].in_use) {
1115         return -EEXIST;
1116     }
1117     css->chpids[chpid].in_use = 1;
1118     css->chpids[chpid].type = type;
1119     css->chpids[chpid].is_virtual = 1;
1120
1121     css_generate_chp_crws(cssid, chpid);
1122
1123     return 0;
1124 }
1125
1126 void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type)
1127 {
1128     PMCW *p = &sch->curr_status.pmcw;
1129     SCSW *s = &sch->curr_status.scsw;
1130     int i;
1131     CssImage *css = channel_subsys->css[sch->cssid];
1132
1133     assert(css != NULL);
1134     memset(p, 0, sizeof(PMCW));
1135     p->flags |= PMCW_FLAGS_MASK_DNV;
1136     p->devno = sch->devno;
1137     /* single path */
1138     p->pim = 0x80;
1139     p->pom = 0xff;
1140     p->pam = 0x80;
1141     p->chpid[0] = chpid;
1142     if (!css->chpids[chpid].in_use) {
1143         css_add_virtual_chpid(sch->cssid, chpid, type);
1144     }
1145
1146     memset(s, 0, sizeof(SCSW));
1147     sch->curr_status.mba = 0;
1148     for (i = 0; i < ARRAY_SIZE(sch->curr_status.mda); i++) {
1149         sch->curr_status.mda[i] = 0;
1150     }
1151 }
1152
1153 SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid, uint16_t schid)
1154 {
1155     uint8_t real_cssid;
1156
1157     real_cssid = (!m && (cssid == 0)) ? channel_subsys->default_cssid : cssid;
1158
1159     if (!channel_subsys->css[real_cssid]) {
1160         return NULL;
1161     }
1162
1163     if (!channel_subsys->css[real_cssid]->sch_set[ssid]) {
1164         return NULL;
1165     }
1166
1167     return channel_subsys->css[real_cssid]->sch_set[ssid]->sch[schid];
1168 }
1169
1170 bool css_subch_visible(SubchDev *sch)
1171 {
1172     if (sch->ssid > channel_subsys->max_ssid) {
1173         return false;
1174     }
1175
1176     if (sch->cssid != channel_subsys->default_cssid) {
1177         return (channel_subsys->max_cssid > 0);
1178     }
1179
1180     return true;
1181 }
1182
1183 bool css_present(uint8_t cssid)
1184 {
1185     return (channel_subsys->css[cssid] != NULL);
1186 }
1187
1188 bool css_devno_used(uint8_t cssid, uint8_t ssid, uint16_t devno)
1189 {
1190     if (!channel_subsys->css[cssid]) {
1191         return false;
1192     }
1193     if (!channel_subsys->css[cssid]->sch_set[ssid]) {
1194         return false;
1195     }
1196
1197     return !!test_bit(devno,
1198                       channel_subsys->css[cssid]->sch_set[ssid]->devnos_used);
1199 }
1200
1201 void css_subch_assign(uint8_t cssid, uint8_t ssid, uint16_t schid,
1202                       uint16_t devno, SubchDev *sch)
1203 {
1204     CssImage *css;
1205     SubchSet *s_set;
1206
1207     trace_css_assign_subch(sch ? "assign" : "deassign", cssid, ssid, schid,
1208                            devno);
1209     if (!channel_subsys->css[cssid]) {
1210         fprintf(stderr,
1211                 "Suspicious call to %s (%x.%x.%04x) for non-existing css!\n",
1212                 __func__, cssid, ssid, schid);
1213         return;
1214     }
1215     css = channel_subsys->css[cssid];
1216
1217     if (!css->sch_set[ssid]) {
1218         css->sch_set[ssid] = g_malloc0(sizeof(SubchSet));
1219     }
1220     s_set = css->sch_set[ssid];
1221
1222     s_set->sch[schid] = sch;
1223     if (sch) {
1224         set_bit(schid, s_set->schids_used);
1225         set_bit(devno, s_set->devnos_used);
1226     } else {
1227         clear_bit(schid, s_set->schids_used);
1228         clear_bit(devno, s_set->devnos_used);
1229     }
1230 }
1231
1232 void css_queue_crw(uint8_t rsc, uint8_t erc, int chain, uint16_t rsid)
1233 {
1234     CrwContainer *crw_cont;
1235
1236     trace_css_crw(rsc, erc, rsid, chain ? "(chained)" : "");
1237     /* TODO: Maybe use a static crw pool? */
1238     crw_cont = g_try_malloc0(sizeof(CrwContainer));
1239     if (!crw_cont) {
1240         channel_subsys->crws_lost = true;
1241         return;
1242     }
1243     crw_cont->crw.flags = (rsc << 8) | erc;
1244     if (chain) {
1245         crw_cont->crw.flags |= CRW_FLAGS_MASK_C;
1246     }
1247     crw_cont->crw.rsid = rsid;
1248     if (channel_subsys->crws_lost) {
1249         crw_cont->crw.flags |= CRW_FLAGS_MASK_R;
1250         channel_subsys->crws_lost = false;
1251     }
1252
1253     QTAILQ_INSERT_TAIL(&channel_subsys->pending_crws, crw_cont, sibling);
1254
1255     if (channel_subsys->do_crw_mchk) {
1256         channel_subsys->do_crw_mchk = false;
1257         /* Inject crw pending machine check. */
1258         s390_crw_mchk();
1259     }
1260 }
1261
1262 void css_generate_sch_crws(uint8_t cssid, uint8_t ssid, uint16_t schid,
1263                            int hotplugged, int add)
1264 {
1265     uint8_t guest_cssid;
1266     bool chain_crw;
1267
1268     if (add && !hotplugged) {
1269         return;
1270     }
1271     if (channel_subsys->max_cssid == 0) {
1272         /* Default cssid shows up as 0. */
1273         guest_cssid = (cssid == channel_subsys->default_cssid) ? 0 : cssid;
1274     } else {
1275         /* Show real cssid to the guest. */
1276         guest_cssid = cssid;
1277     }
1278     /*
1279      * Only notify for higher subchannel sets/channel subsystems if the
1280      * guest has enabled it.
1281      */
1282     if ((ssid > channel_subsys->max_ssid) ||
1283         (guest_cssid > channel_subsys->max_cssid) ||
1284         ((channel_subsys->max_cssid == 0) &&
1285          (cssid != channel_subsys->default_cssid))) {
1286         return;
1287     }
1288     chain_crw = (channel_subsys->max_ssid > 0) ||
1289             (channel_subsys->max_cssid > 0);
1290     css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, chain_crw ? 1 : 0, schid);
1291     if (chain_crw) {
1292         css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, 0,
1293                       (guest_cssid << 8) | (ssid << 4));
1294     }
1295 }
1296
1297 void css_generate_chp_crws(uint8_t cssid, uint8_t chpid)
1298 {
1299     /* TODO */
1300 }
1301
1302 void css_generate_css_crws(uint8_t cssid)
1303 {
1304     css_queue_crw(CRW_RSC_CSS, 0, 0, cssid);
1305 }
1306
1307 int css_enable_mcsse(void)
1308 {
1309     trace_css_enable_facility("mcsse");
1310     channel_subsys->max_cssid = MAX_CSSID;
1311     return 0;
1312 }
1313
1314 int css_enable_mss(void)
1315 {
1316     trace_css_enable_facility("mss");
1317     channel_subsys->max_ssid = MAX_SSID;
1318     return 0;
1319 }
1320
1321 void subch_device_save(SubchDev *s, QEMUFile *f)
1322 {
1323     int i;
1324
1325     qemu_put_byte(f, s->cssid);
1326     qemu_put_byte(f, s->ssid);
1327     qemu_put_be16(f, s->schid);
1328     qemu_put_be16(f, s->devno);
1329     qemu_put_byte(f, s->thinint_active);
1330     /* SCHIB */
1331     /*     PMCW */
1332     qemu_put_be32(f, s->curr_status.pmcw.intparm);
1333     qemu_put_be16(f, s->curr_status.pmcw.flags);
1334     qemu_put_be16(f, s->curr_status.pmcw.devno);
1335     qemu_put_byte(f, s->curr_status.pmcw.lpm);
1336     qemu_put_byte(f, s->curr_status.pmcw.pnom);
1337     qemu_put_byte(f, s->curr_status.pmcw.lpum);
1338     qemu_put_byte(f, s->curr_status.pmcw.pim);
1339     qemu_put_be16(f, s->curr_status.pmcw.mbi);
1340     qemu_put_byte(f, s->curr_status.pmcw.pom);
1341     qemu_put_byte(f, s->curr_status.pmcw.pam);
1342     qemu_put_buffer(f, s->curr_status.pmcw.chpid, 8);
1343     qemu_put_be32(f, s->curr_status.pmcw.chars);
1344     /*     SCSW */
1345     qemu_put_be16(f, s->curr_status.scsw.flags);
1346     qemu_put_be16(f, s->curr_status.scsw.ctrl);
1347     qemu_put_be32(f, s->curr_status.scsw.cpa);
1348     qemu_put_byte(f, s->curr_status.scsw.dstat);
1349     qemu_put_byte(f, s->curr_status.scsw.cstat);
1350     qemu_put_be16(f, s->curr_status.scsw.count);
1351     qemu_put_be64(f, s->curr_status.mba);
1352     qemu_put_buffer(f, s->curr_status.mda, 4);
1353     /* end SCHIB */
1354     qemu_put_buffer(f, s->sense_data, 32);
1355     qemu_put_be64(f, s->channel_prog);
1356     /* last cmd */
1357     qemu_put_byte(f, s->last_cmd.cmd_code);
1358     qemu_put_byte(f, s->last_cmd.flags);
1359     qemu_put_be16(f, s->last_cmd.count);
1360     qemu_put_be32(f, s->last_cmd.cda);
1361     qemu_put_byte(f, s->last_cmd_valid);
1362     qemu_put_byte(f, s->id.reserved);
1363     qemu_put_be16(f, s->id.cu_type);
1364     qemu_put_byte(f, s->id.cu_model);
1365     qemu_put_be16(f, s->id.dev_type);
1366     qemu_put_byte(f, s->id.dev_model);
1367     qemu_put_byte(f, s->id.unused);
1368     for (i = 0; i < ARRAY_SIZE(s->id.ciw); i++) {
1369         qemu_put_byte(f, s->id.ciw[i].type);
1370         qemu_put_byte(f, s->id.ciw[i].command);
1371         qemu_put_be16(f, s->id.ciw[i].count);
1372     }
1373     qemu_put_byte(f, s->ccw_fmt_1);
1374     qemu_put_byte(f, s->ccw_no_data_cnt);
1375     return;
1376 }
1377
1378 int subch_device_load(SubchDev *s, QEMUFile *f)
1379 {
1380     int i;
1381
1382     s->cssid = qemu_get_byte(f);
1383     s->ssid = qemu_get_byte(f);
1384     s->schid = qemu_get_be16(f);
1385     s->devno = qemu_get_be16(f);
1386     s->thinint_active = qemu_get_byte(f);
1387     /* SCHIB */
1388     /*     PMCW */
1389     s->curr_status.pmcw.intparm = qemu_get_be32(f);
1390     s->curr_status.pmcw.flags = qemu_get_be16(f);
1391     s->curr_status.pmcw.devno = qemu_get_be16(f);
1392     s->curr_status.pmcw.lpm = qemu_get_byte(f);
1393     s->curr_status.pmcw.pnom  = qemu_get_byte(f);
1394     s->curr_status.pmcw.lpum = qemu_get_byte(f);
1395     s->curr_status.pmcw.pim = qemu_get_byte(f);
1396     s->curr_status.pmcw.mbi = qemu_get_be16(f);
1397     s->curr_status.pmcw.pom = qemu_get_byte(f);
1398     s->curr_status.pmcw.pam = qemu_get_byte(f);
1399     qemu_get_buffer(f, s->curr_status.pmcw.chpid, 8);
1400     s->curr_status.pmcw.chars = qemu_get_be32(f);
1401     /*     SCSW */
1402     s->curr_status.scsw.flags = qemu_get_be16(f);
1403     s->curr_status.scsw.ctrl = qemu_get_be16(f);
1404     s->curr_status.scsw.cpa = qemu_get_be32(f);
1405     s->curr_status.scsw.dstat = qemu_get_byte(f);
1406     s->curr_status.scsw.cstat = qemu_get_byte(f);
1407     s->curr_status.scsw.count = qemu_get_be16(f);
1408     s->curr_status.mba = qemu_get_be64(f);
1409     qemu_get_buffer(f, s->curr_status.mda, 4);
1410     /* end SCHIB */
1411     qemu_get_buffer(f, s->sense_data, 32);
1412     s->channel_prog = qemu_get_be64(f);
1413     /* last cmd */
1414     s->last_cmd.cmd_code = qemu_get_byte(f);
1415     s->last_cmd.flags = qemu_get_byte(f);
1416     s->last_cmd.count = qemu_get_be16(f);
1417     s->last_cmd.cda = qemu_get_be32(f);
1418     s->last_cmd_valid = qemu_get_byte(f);
1419     s->id.reserved = qemu_get_byte(f);
1420     s->id.cu_type = qemu_get_be16(f);
1421     s->id.cu_model = qemu_get_byte(f);
1422     s->id.dev_type = qemu_get_be16(f);
1423     s->id.dev_model = qemu_get_byte(f);
1424     s->id.unused = qemu_get_byte(f);
1425     for (i = 0; i < ARRAY_SIZE(s->id.ciw); i++) {
1426         s->id.ciw[i].type = qemu_get_byte(f);
1427         s->id.ciw[i].command = qemu_get_byte(f);
1428         s->id.ciw[i].count = qemu_get_be16(f);
1429     }
1430     s->ccw_fmt_1 = qemu_get_byte(f);
1431     s->ccw_no_data_cnt = qemu_get_byte(f);
1432     return 0;
1433 }
1434
1435
1436 static void css_init(void)
1437 {
1438     channel_subsys = g_malloc0(sizeof(*channel_subsys));
1439     QTAILQ_INIT(&channel_subsys->pending_crws);
1440     channel_subsys->do_crw_mchk = true;
1441     channel_subsys->crws_lost = false;
1442     channel_subsys->chnmon_active = false;
1443     QTAILQ_INIT(&channel_subsys->io_adapters);
1444 }
1445 machine_init(css_init);
1446
1447 void css_reset_sch(SubchDev *sch)
1448 {
1449     PMCW *p = &sch->curr_status.pmcw;
1450
1451     p->intparm = 0;
1452     p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
1453                   PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
1454                   PMCW_FLAGS_MASK_MP | PMCW_FLAGS_MASK_TF);
1455     p->flags |= PMCW_FLAGS_MASK_DNV;
1456     p->devno = sch->devno;
1457     p->pim = 0x80;
1458     p->lpm = p->pim;
1459     p->pnom = 0;
1460     p->lpum = 0;
1461     p->mbi = 0;
1462     p->pom = 0xff;
1463     p->pam = 0x80;
1464     p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_XMWME |
1465                   PMCW_CHARS_MASK_CSENSE);
1466
1467     memset(&sch->curr_status.scsw, 0, sizeof(sch->curr_status.scsw));
1468     sch->curr_status.mba = 0;
1469
1470     sch->channel_prog = 0x0;
1471     sch->last_cmd_valid = false;
1472     sch->thinint_active = false;
1473 }
1474
1475 void css_reset(void)
1476 {
1477     CrwContainer *crw_cont;
1478
1479     /* Clean up monitoring. */
1480     channel_subsys->chnmon_active = false;
1481     channel_subsys->chnmon_area = 0;
1482
1483     /* Clear pending CRWs. */
1484     while ((crw_cont = QTAILQ_FIRST(&channel_subsys->pending_crws))) {
1485         QTAILQ_REMOVE(&channel_subsys->pending_crws, crw_cont, sibling);
1486         g_free(crw_cont);
1487     }
1488     channel_subsys->do_crw_mchk = true;
1489     channel_subsys->crws_lost = false;
1490
1491     /* Reset maximum ids. */
1492     channel_subsys->max_cssid = 0;
1493     channel_subsys->max_ssid = 0;
1494 }