configure: fix performance regression due to PIC objects
[qemu/ar7.git] / exec.c
blobbca441f7fd358bfbf003b01f2095db512be3de4f
1 /*
2 * Virtual page mapping
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qapi/error.h"
24 #include "qemu/cutils.h"
25 #include "cpu.h"
26 #include "exec/exec-all.h"
27 #include "exec/target_page.h"
28 #include "tcg/tcg.h"
29 #include "hw/qdev-core.h"
30 #include "hw/qdev-properties.h"
31 #if !defined(CONFIG_USER_ONLY)
32 #include "hw/boards.h"
33 #include "hw/xen/xen.h"
34 #endif
35 #include "sysemu/kvm.h"
36 #include "sysemu/sysemu.h"
37 #include "sysemu/tcg.h"
38 #include "sysemu/qtest.h"
39 #include "qemu/timer.h"
40 #include "qemu/config-file.h"
41 #include "qemu/error-report.h"
42 #include "qemu/qemu-print.h"
43 #if defined(CONFIG_USER_ONLY)
44 #include "qemu.h"
45 #else /* !CONFIG_USER_ONLY */
46 #include "exec/memory.h"
47 #include "exec/ioport.h"
48 #include "sysemu/dma.h"
49 #include "sysemu/hostmem.h"
50 #include "sysemu/hw_accel.h"
51 #include "exec/address-spaces.h"
52 #include "sysemu/xen-mapcache.h"
53 #include "trace/trace-root.h"
55 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
56 #include <linux/falloc.h>
57 #endif
59 #endif
60 #include "qemu/rcu_queue.h"
61 #include "qemu/main-loop.h"
62 #include "translate-all.h"
63 #include "sysemu/replay.h"
65 #include "exec/memory-internal.h"
66 #include "exec/ram_addr.h"
67 #include "exec/log.h"
69 #include "qemu/pmem.h"
71 #include "migration/vmstate.h"
73 #include "qemu/range.h"
74 #ifndef _WIN32
75 #include "qemu/mmap-alloc.h"
76 #endif
78 #include "monitor/monitor.h"
80 #ifdef CONFIG_LIBDAXCTL
81 #include <daxctl/libdaxctl.h>
82 #endif
84 //#define DEBUG_SUBPAGE
86 #if !defined(CONFIG_USER_ONLY)
87 /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
88 * are protected by the ramlist lock.
90 RAMList ram_list = { .blocks = QLIST_HEAD_INITIALIZER(ram_list.blocks) };
92 static MemoryRegion *system_memory;
93 static MemoryRegion *system_io;
95 AddressSpace address_space_io;
96 AddressSpace address_space_memory;
98 static MemoryRegion io_mem_unassigned;
99 #endif
101 uintptr_t qemu_host_page_size;
102 intptr_t qemu_host_page_mask;
104 #if !defined(CONFIG_USER_ONLY)
106 typedef struct PhysPageEntry PhysPageEntry;
108 struct PhysPageEntry {
109 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
110 uint32_t skip : 6;
111 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
112 uint32_t ptr : 26;
115 #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
117 /* Size of the L2 (and L3, etc) page tables. */
118 #define ADDR_SPACE_BITS 64
120 #define P_L2_BITS 9
121 #define P_L2_SIZE (1 << P_L2_BITS)
123 #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
125 typedef PhysPageEntry Node[P_L2_SIZE];
127 typedef struct PhysPageMap {
128 struct rcu_head rcu;
130 unsigned sections_nb;
131 unsigned sections_nb_alloc;
132 unsigned nodes_nb;
133 unsigned nodes_nb_alloc;
134 Node *nodes;
135 MemoryRegionSection *sections;
136 } PhysPageMap;
138 struct AddressSpaceDispatch {
139 MemoryRegionSection *mru_section;
140 /* This is a multi-level map on the physical address space.
141 * The bottom level has pointers to MemoryRegionSections.
143 PhysPageEntry phys_map;
144 PhysPageMap map;
147 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
148 typedef struct subpage_t {
149 MemoryRegion iomem;
150 FlatView *fv;
151 hwaddr base;
152 uint16_t sub_section[];
153 } subpage_t;
155 #define PHYS_SECTION_UNASSIGNED 0
157 static void io_mem_init(void);
158 static void memory_map_init(void);
159 static void tcg_log_global_after_sync(MemoryListener *listener);
160 static void tcg_commit(MemoryListener *listener);
163 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
164 * @cpu: the CPU whose AddressSpace this is
165 * @as: the AddressSpace itself
166 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
167 * @tcg_as_listener: listener for tracking changes to the AddressSpace
169 struct CPUAddressSpace {
170 CPUState *cpu;
171 AddressSpace *as;
172 struct AddressSpaceDispatch *memory_dispatch;
173 MemoryListener tcg_as_listener;
176 struct DirtyBitmapSnapshot {
177 ram_addr_t start;
178 ram_addr_t end;
179 unsigned long dirty[];
182 #endif
184 #if !defined(CONFIG_USER_ONLY)
186 static void phys_map_node_reserve(PhysPageMap *map, unsigned nodes)
188 static unsigned alloc_hint = 16;
189 if (map->nodes_nb + nodes > map->nodes_nb_alloc) {
190 map->nodes_nb_alloc = MAX(alloc_hint, map->nodes_nb + nodes);
191 map->nodes = g_renew(Node, map->nodes, map->nodes_nb_alloc);
192 alloc_hint = map->nodes_nb_alloc;
196 static uint32_t phys_map_node_alloc(PhysPageMap *map, bool leaf)
198 unsigned i;
199 uint32_t ret;
200 PhysPageEntry e;
201 PhysPageEntry *p;
203 ret = map->nodes_nb++;
204 p = map->nodes[ret];
205 assert(ret != PHYS_MAP_NODE_NIL);
206 assert(ret != map->nodes_nb_alloc);
208 e.skip = leaf ? 0 : 1;
209 e.ptr = leaf ? PHYS_SECTION_UNASSIGNED : PHYS_MAP_NODE_NIL;
210 for (i = 0; i < P_L2_SIZE; ++i) {
211 memcpy(&p[i], &e, sizeof(e));
213 return ret;
216 static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp,
217 hwaddr *index, uint64_t *nb, uint16_t leaf,
218 int level)
220 PhysPageEntry *p;
221 hwaddr step = (hwaddr)1 << (level * P_L2_BITS);
223 if (lp->skip && lp->ptr == PHYS_MAP_NODE_NIL) {
224 lp->ptr = phys_map_node_alloc(map, level == 0);
226 p = map->nodes[lp->ptr];
227 lp = &p[(*index >> (level * P_L2_BITS)) & (P_L2_SIZE - 1)];
229 while (*nb && lp < &p[P_L2_SIZE]) {
230 if ((*index & (step - 1)) == 0 && *nb >= step) {
231 lp->skip = 0;
232 lp->ptr = leaf;
233 *index += step;
234 *nb -= step;
235 } else {
236 phys_page_set_level(map, lp, index, nb, leaf, level - 1);
238 ++lp;
242 static void phys_page_set(AddressSpaceDispatch *d,
243 hwaddr index, uint64_t nb,
244 uint16_t leaf)
246 /* Wildly overreserve - it doesn't matter much. */
247 phys_map_node_reserve(&d->map, 3 * P_L2_LEVELS);
249 phys_page_set_level(&d->map, &d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1);
252 /* Compact a non leaf page entry. Simply detect that the entry has a single child,
253 * and update our entry so we can skip it and go directly to the destination.
255 static void phys_page_compact(PhysPageEntry *lp, Node *nodes)
257 unsigned valid_ptr = P_L2_SIZE;
258 int valid = 0;
259 PhysPageEntry *p;
260 int i;
262 if (lp->ptr == PHYS_MAP_NODE_NIL) {
263 return;
266 p = nodes[lp->ptr];
267 for (i = 0; i < P_L2_SIZE; i++) {
268 if (p[i].ptr == PHYS_MAP_NODE_NIL) {
269 continue;
272 valid_ptr = i;
273 valid++;
274 if (p[i].skip) {
275 phys_page_compact(&p[i], nodes);
279 /* We can only compress if there's only one child. */
280 if (valid != 1) {
281 return;
284 assert(valid_ptr < P_L2_SIZE);
286 /* Don't compress if it won't fit in the # of bits we have. */
287 if (P_L2_LEVELS >= (1 << 6) &&
288 lp->skip + p[valid_ptr].skip >= (1 << 6)) {
289 return;
292 lp->ptr = p[valid_ptr].ptr;
293 if (!p[valid_ptr].skip) {
294 /* If our only child is a leaf, make this a leaf. */
295 /* By design, we should have made this node a leaf to begin with so we
296 * should never reach here.
297 * But since it's so simple to handle this, let's do it just in case we
298 * change this rule.
300 lp->skip = 0;
301 } else {
302 lp->skip += p[valid_ptr].skip;
306 void address_space_dispatch_compact(AddressSpaceDispatch *d)
308 if (d->phys_map.skip) {
309 phys_page_compact(&d->phys_map, d->map.nodes);
313 static inline bool section_covers_addr(const MemoryRegionSection *section,
314 hwaddr addr)
316 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
317 * the section must cover the entire address space.
319 return int128_gethi(section->size) ||
320 range_covers_byte(section->offset_within_address_space,
321 int128_getlo(section->size), addr);
324 static MemoryRegionSection *phys_page_find(AddressSpaceDispatch *d, hwaddr addr)
326 PhysPageEntry lp = d->phys_map, *p;
327 Node *nodes = d->map.nodes;
328 MemoryRegionSection *sections = d->map.sections;
329 hwaddr index = addr >> TARGET_PAGE_BITS;
330 int i;
332 for (i = P_L2_LEVELS; lp.skip && (i -= lp.skip) >= 0;) {
333 if (lp.ptr == PHYS_MAP_NODE_NIL) {
334 return &sections[PHYS_SECTION_UNASSIGNED];
336 p = nodes[lp.ptr];
337 lp = p[(index >> (i * P_L2_BITS)) & (P_L2_SIZE - 1)];
340 if (section_covers_addr(&sections[lp.ptr], addr)) {
341 return &sections[lp.ptr];
342 } else {
343 return &sections[PHYS_SECTION_UNASSIGNED];
347 /* Called from RCU critical section */
348 static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d,
349 hwaddr addr,
350 bool resolve_subpage)
352 MemoryRegionSection *section = qatomic_read(&d->mru_section);
353 subpage_t *subpage;
355 if (!section || section == &d->map.sections[PHYS_SECTION_UNASSIGNED] ||
356 !section_covers_addr(section, addr)) {
357 section = phys_page_find(d, addr);
358 qatomic_set(&d->mru_section, section);
360 if (resolve_subpage && section->mr->subpage) {
361 subpage = container_of(section->mr, subpage_t, iomem);
362 section = &d->map.sections[subpage->sub_section[SUBPAGE_IDX(addr)]];
364 return section;
367 /* Called from RCU critical section */
368 static MemoryRegionSection *
369 address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat,
370 hwaddr *plen, bool resolve_subpage)
372 MemoryRegionSection *section;
373 MemoryRegion *mr;
374 Int128 diff;
376 section = address_space_lookup_region(d, addr, resolve_subpage);
377 /* Compute offset within MemoryRegionSection */
378 addr -= section->offset_within_address_space;
380 /* Compute offset within MemoryRegion */
381 *xlat = addr + section->offset_within_region;
383 mr = section->mr;
385 /* MMIO registers can be expected to perform full-width accesses based only
386 * on their address, without considering adjacent registers that could
387 * decode to completely different MemoryRegions. When such registers
388 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
389 * regions overlap wildly. For this reason we cannot clamp the accesses
390 * here.
392 * If the length is small (as is the case for address_space_ldl/stl),
393 * everything works fine. If the incoming length is large, however,
394 * the caller really has to do the clamping through memory_access_size.
396 if (memory_region_is_ram(mr)) {
397 diff = int128_sub(section->size, int128_make64(addr));
398 *plen = int128_get64(int128_min(diff, int128_make64(*plen)));
400 return section;
404 * address_space_translate_iommu - translate an address through an IOMMU
405 * memory region and then through the target address space.
407 * @iommu_mr: the IOMMU memory region that we start the translation from
408 * @addr: the address to be translated through the MMU
409 * @xlat: the translated address offset within the destination memory region.
410 * It cannot be %NULL.
411 * @plen_out: valid read/write length of the translated address. It
412 * cannot be %NULL.
413 * @page_mask_out: page mask for the translated address. This
414 * should only be meaningful for IOMMU translated
415 * addresses, since there may be huge pages that this bit
416 * would tell. It can be %NULL if we don't care about it.
417 * @is_write: whether the translation operation is for write
418 * @is_mmio: whether this can be MMIO, set true if it can
419 * @target_as: the address space targeted by the IOMMU
420 * @attrs: transaction attributes
422 * This function is called from RCU critical section. It is the common
423 * part of flatview_do_translate and address_space_translate_cached.
425 static MemoryRegionSection address_space_translate_iommu(IOMMUMemoryRegion *iommu_mr,
426 hwaddr *xlat,
427 hwaddr *plen_out,
428 hwaddr *page_mask_out,
429 bool is_write,
430 bool is_mmio,
431 AddressSpace **target_as,
432 MemTxAttrs attrs)
434 MemoryRegionSection *section;
435 hwaddr page_mask = (hwaddr)-1;
437 do {
438 hwaddr addr = *xlat;
439 IOMMUMemoryRegionClass *imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
440 int iommu_idx = 0;
441 IOMMUTLBEntry iotlb;
443 if (imrc->attrs_to_index) {
444 iommu_idx = imrc->attrs_to_index(iommu_mr, attrs);
447 iotlb = imrc->translate(iommu_mr, addr, is_write ?
448 IOMMU_WO : IOMMU_RO, iommu_idx);
450 if (!(iotlb.perm & (1 << is_write))) {
451 goto unassigned;
454 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
455 | (addr & iotlb.addr_mask));
456 page_mask &= iotlb.addr_mask;
457 *plen_out = MIN(*plen_out, (addr | iotlb.addr_mask) - addr + 1);
458 *target_as = iotlb.target_as;
460 section = address_space_translate_internal(
461 address_space_to_dispatch(iotlb.target_as), addr, xlat,
462 plen_out, is_mmio);
464 iommu_mr = memory_region_get_iommu(section->mr);
465 } while (unlikely(iommu_mr));
467 if (page_mask_out) {
468 *page_mask_out = page_mask;
470 return *section;
472 unassigned:
473 return (MemoryRegionSection) { .mr = &io_mem_unassigned };
477 * flatview_do_translate - translate an address in FlatView
479 * @fv: the flat view that we want to translate on
480 * @addr: the address to be translated in above address space
481 * @xlat: the translated address offset within memory region. It
482 * cannot be @NULL.
483 * @plen_out: valid read/write length of the translated address. It
484 * can be @NULL when we don't care about it.
485 * @page_mask_out: page mask for the translated address. This
486 * should only be meaningful for IOMMU translated
487 * addresses, since there may be huge pages that this bit
488 * would tell. It can be @NULL if we don't care about it.
489 * @is_write: whether the translation operation is for write
490 * @is_mmio: whether this can be MMIO, set true if it can
491 * @target_as: the address space targeted by the IOMMU
492 * @attrs: memory transaction attributes
494 * This function is called from RCU critical section
496 static MemoryRegionSection flatview_do_translate(FlatView *fv,
497 hwaddr addr,
498 hwaddr *xlat,
499 hwaddr *plen_out,
500 hwaddr *page_mask_out,
501 bool is_write,
502 bool is_mmio,
503 AddressSpace **target_as,
504 MemTxAttrs attrs)
506 MemoryRegionSection *section;
507 IOMMUMemoryRegion *iommu_mr;
508 hwaddr plen = (hwaddr)(-1);
510 if (!plen_out) {
511 plen_out = &plen;
514 section = address_space_translate_internal(
515 flatview_to_dispatch(fv), addr, xlat,
516 plen_out, is_mmio);
518 iommu_mr = memory_region_get_iommu(section->mr);
519 if (unlikely(iommu_mr)) {
520 return address_space_translate_iommu(iommu_mr, xlat,
521 plen_out, page_mask_out,
522 is_write, is_mmio,
523 target_as, attrs);
525 if (page_mask_out) {
526 /* Not behind an IOMMU, use default page size. */
527 *page_mask_out = ~TARGET_PAGE_MASK;
530 return *section;
533 /* Called from RCU critical section */
534 IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr,
535 bool is_write, MemTxAttrs attrs)
537 MemoryRegionSection section;
538 hwaddr xlat, page_mask;
541 * This can never be MMIO, and we don't really care about plen,
542 * but page mask.
544 section = flatview_do_translate(address_space_to_flatview(as), addr, &xlat,
545 NULL, &page_mask, is_write, false, &as,
546 attrs);
548 /* Illegal translation */
549 if (section.mr == &io_mem_unassigned) {
550 goto iotlb_fail;
553 /* Convert memory region offset into address space offset */
554 xlat += section.offset_within_address_space -
555 section.offset_within_region;
557 return (IOMMUTLBEntry) {
558 .target_as = as,
559 .iova = addr & ~page_mask,
560 .translated_addr = xlat & ~page_mask,
561 .addr_mask = page_mask,
562 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
563 .perm = IOMMU_RW,
566 iotlb_fail:
567 return (IOMMUTLBEntry) {0};
570 /* Called from RCU critical section */
571 MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat,
572 hwaddr *plen, bool is_write,
573 MemTxAttrs attrs)
575 MemoryRegion *mr;
576 MemoryRegionSection section;
577 AddressSpace *as = NULL;
579 /* This can be MMIO, so setup MMIO bit. */
580 section = flatview_do_translate(fv, addr, xlat, plen, NULL,
581 is_write, true, &as, attrs);
582 mr = section.mr;
584 if (xen_enabled() && memory_access_is_direct(mr, is_write)) {
585 hwaddr page = ((addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE) - addr;
586 *plen = MIN(page, *plen);
589 return mr;
592 typedef struct TCGIOMMUNotifier {
593 IOMMUNotifier n;
594 MemoryRegion *mr;
595 CPUState *cpu;
596 int iommu_idx;
597 bool active;
598 } TCGIOMMUNotifier;
600 static void tcg_iommu_unmap_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb)
602 TCGIOMMUNotifier *notifier = container_of(n, TCGIOMMUNotifier, n);
604 if (!notifier->active) {
605 return;
607 tlb_flush(notifier->cpu);
608 notifier->active = false;
609 /* We leave the notifier struct on the list to avoid reallocating it later.
610 * Generally the number of IOMMUs a CPU deals with will be small.
611 * In any case we can't unregister the iommu notifier from a notify
612 * callback.
616 static void tcg_register_iommu_notifier(CPUState *cpu,
617 IOMMUMemoryRegion *iommu_mr,
618 int iommu_idx)
620 /* Make sure this CPU has an IOMMU notifier registered for this
621 * IOMMU/IOMMU index combination, so that we can flush its TLB
622 * when the IOMMU tells us the mappings we've cached have changed.
624 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
625 TCGIOMMUNotifier *notifier;
626 int i;
628 for (i = 0; i < cpu->iommu_notifiers->len; i++) {
629 notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i);
630 if (notifier->mr == mr && notifier->iommu_idx == iommu_idx) {
631 break;
634 if (i == cpu->iommu_notifiers->len) {
635 /* Not found, add a new entry at the end of the array */
636 cpu->iommu_notifiers = g_array_set_size(cpu->iommu_notifiers, i + 1);
637 notifier = g_new0(TCGIOMMUNotifier, 1);
638 g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i) = notifier;
640 notifier->mr = mr;
641 notifier->iommu_idx = iommu_idx;
642 notifier->cpu = cpu;
643 /* Rather than trying to register interest in the specific part
644 * of the iommu's address space that we've accessed and then
645 * expand it later as subsequent accesses touch more of it, we
646 * just register interest in the whole thing, on the assumption
647 * that iommu reconfiguration will be rare.
649 iommu_notifier_init(&notifier->n,
650 tcg_iommu_unmap_notify,
651 IOMMU_NOTIFIER_UNMAP,
653 HWADDR_MAX,
654 iommu_idx);
655 memory_region_register_iommu_notifier(notifier->mr, &notifier->n,
656 &error_fatal);
659 if (!notifier->active) {
660 notifier->active = true;
664 static void tcg_iommu_free_notifier_list(CPUState *cpu)
666 /* Destroy the CPU's notifier list */
667 int i;
668 TCGIOMMUNotifier *notifier;
670 for (i = 0; i < cpu->iommu_notifiers->len; i++) {
671 notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i);
672 memory_region_unregister_iommu_notifier(notifier->mr, &notifier->n);
673 g_free(notifier);
675 g_array_free(cpu->iommu_notifiers, true);
678 /* Called from RCU critical section */
679 MemoryRegionSection *
680 address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr,
681 hwaddr *xlat, hwaddr *plen,
682 MemTxAttrs attrs, int *prot)
684 MemoryRegionSection *section;
685 IOMMUMemoryRegion *iommu_mr;
686 IOMMUMemoryRegionClass *imrc;
687 IOMMUTLBEntry iotlb;
688 int iommu_idx;
689 AddressSpaceDispatch *d =
690 qatomic_rcu_read(&cpu->cpu_ases[asidx].memory_dispatch);
692 for (;;) {
693 section = address_space_translate_internal(d, addr, &addr, plen, false);
695 iommu_mr = memory_region_get_iommu(section->mr);
696 if (!iommu_mr) {
697 break;
700 imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
702 iommu_idx = imrc->attrs_to_index(iommu_mr, attrs);
703 tcg_register_iommu_notifier(cpu, iommu_mr, iommu_idx);
704 /* We need all the permissions, so pass IOMMU_NONE so the IOMMU
705 * doesn't short-cut its translation table walk.
707 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, iommu_idx);
708 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
709 | (addr & iotlb.addr_mask));
710 /* Update the caller's prot bits to remove permissions the IOMMU
711 * is giving us a failure response for. If we get down to no
712 * permissions left at all we can give up now.
714 if (!(iotlb.perm & IOMMU_RO)) {
715 *prot &= ~(PAGE_READ | PAGE_EXEC);
717 if (!(iotlb.perm & IOMMU_WO)) {
718 *prot &= ~PAGE_WRITE;
721 if (!*prot) {
722 goto translate_fail;
725 d = flatview_to_dispatch(address_space_to_flatview(iotlb.target_as));
728 assert(!memory_region_is_iommu(section->mr));
729 *xlat = addr;
730 return section;
732 translate_fail:
733 return &d->map.sections[PHYS_SECTION_UNASSIGNED];
735 #endif
737 #if !defined(CONFIG_USER_ONLY)
739 static int cpu_common_post_load(void *opaque, int version_id)
741 CPUState *cpu = opaque;
743 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
744 version_id is increased. */
745 cpu->interrupt_request &= ~0x01;
746 tlb_flush(cpu);
748 /* loadvm has just updated the content of RAM, bypassing the
749 * usual mechanisms that ensure we flush TBs for writes to
750 * memory we've translated code from. So we must flush all TBs,
751 * which will now be stale.
753 tb_flush(cpu);
755 return 0;
758 static int cpu_common_pre_load(void *opaque)
760 CPUState *cpu = opaque;
762 cpu->exception_index = -1;
764 return 0;
767 static bool cpu_common_exception_index_needed(void *opaque)
769 CPUState *cpu = opaque;
771 return tcg_enabled() && cpu->exception_index != -1;
774 static const VMStateDescription vmstate_cpu_common_exception_index = {
775 .name = "cpu_common/exception_index",
776 .version_id = 1,
777 .minimum_version_id = 1,
778 .needed = cpu_common_exception_index_needed,
779 .fields = (VMStateField[]) {
780 VMSTATE_INT32(exception_index, CPUState),
781 VMSTATE_END_OF_LIST()
785 static bool cpu_common_crash_occurred_needed(void *opaque)
787 CPUState *cpu = opaque;
789 return cpu->crash_occurred;
792 static const VMStateDescription vmstate_cpu_common_crash_occurred = {
793 .name = "cpu_common/crash_occurred",
794 .version_id = 1,
795 .minimum_version_id = 1,
796 .needed = cpu_common_crash_occurred_needed,
797 .fields = (VMStateField[]) {
798 VMSTATE_BOOL(crash_occurred, CPUState),
799 VMSTATE_END_OF_LIST()
803 const VMStateDescription vmstate_cpu_common = {
804 .name = "cpu_common",
805 .version_id = 1,
806 .minimum_version_id = 1,
807 .pre_load = cpu_common_pre_load,
808 .post_load = cpu_common_post_load,
809 .fields = (VMStateField[]) {
810 VMSTATE_UINT32(halted, CPUState),
811 VMSTATE_UINT32(interrupt_request, CPUState),
812 VMSTATE_END_OF_LIST()
814 .subsections = (const VMStateDescription*[]) {
815 &vmstate_cpu_common_exception_index,
816 &vmstate_cpu_common_crash_occurred,
817 NULL
821 void cpu_address_space_init(CPUState *cpu, int asidx,
822 const char *prefix, MemoryRegion *mr)
824 CPUAddressSpace *newas;
825 AddressSpace *as = g_new0(AddressSpace, 1);
826 char *as_name;
828 assert(mr);
829 as_name = g_strdup_printf("%s-%d", prefix, cpu->cpu_index);
830 address_space_init(as, mr, as_name);
831 g_free(as_name);
833 /* Target code should have set num_ases before calling us */
834 assert(asidx < cpu->num_ases);
836 if (asidx == 0) {
837 /* address space 0 gets the convenience alias */
838 cpu->as = as;
841 /* KVM cannot currently support multiple address spaces. */
842 assert(asidx == 0 || !kvm_enabled());
844 if (!cpu->cpu_ases) {
845 cpu->cpu_ases = g_new0(CPUAddressSpace, cpu->num_ases);
848 newas = &cpu->cpu_ases[asidx];
849 newas->cpu = cpu;
850 newas->as = as;
851 if (tcg_enabled()) {
852 newas->tcg_as_listener.log_global_after_sync = tcg_log_global_after_sync;
853 newas->tcg_as_listener.commit = tcg_commit;
854 memory_listener_register(&newas->tcg_as_listener, as);
858 AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx)
860 /* Return the AddressSpace corresponding to the specified index */
861 return cpu->cpu_ases[asidx].as;
863 #endif
865 void cpu_exec_unrealizefn(CPUState *cpu)
867 CPUClass *cc = CPU_GET_CLASS(cpu);
869 tlb_destroy(cpu);
870 cpu_list_remove(cpu);
872 if (cc->vmsd != NULL) {
873 vmstate_unregister(NULL, cc->vmsd, cpu);
875 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
876 vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
878 #ifndef CONFIG_USER_ONLY
879 tcg_iommu_free_notifier_list(cpu);
880 #endif
883 Property cpu_common_props[] = {
884 #ifndef CONFIG_USER_ONLY
885 /* Create a memory property for softmmu CPU object,
886 * so users can wire up its memory. (This can't go in hw/core/cpu.c
887 * because that file is compiled only once for both user-mode
888 * and system builds.) The default if no link is set up is to use
889 * the system address space.
891 DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION,
892 MemoryRegion *),
893 #endif
894 DEFINE_PROP_BOOL("start-powered-off", CPUState, start_powered_off, false),
895 DEFINE_PROP_END_OF_LIST(),
898 void cpu_exec_initfn(CPUState *cpu)
900 cpu->as = NULL;
901 cpu->num_ases = 0;
903 #ifndef CONFIG_USER_ONLY
904 cpu->thread_id = qemu_get_thread_id();
905 cpu->memory = system_memory;
906 object_ref(OBJECT(cpu->memory));
907 #endif
910 void cpu_exec_realizefn(CPUState *cpu, Error **errp)
912 CPUClass *cc = CPU_GET_CLASS(cpu);
913 static bool tcg_target_initialized;
915 cpu_list_add(cpu);
917 if (tcg_enabled() && !tcg_target_initialized) {
918 tcg_target_initialized = true;
919 cc->tcg_initialize();
921 tlb_init(cpu);
923 qemu_plugin_vcpu_init_hook(cpu);
925 #ifdef CONFIG_USER_ONLY
926 assert(cc->vmsd == NULL);
927 #else /* !CONFIG_USER_ONLY */
928 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
929 vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
931 if (cc->vmsd != NULL) {
932 vmstate_register(NULL, cpu->cpu_index, cc->vmsd, cpu);
935 cpu->iommu_notifiers = g_array_new(false, true, sizeof(TCGIOMMUNotifier *));
936 #endif
939 const char *parse_cpu_option(const char *cpu_option)
941 ObjectClass *oc;
942 CPUClass *cc;
943 gchar **model_pieces;
944 const char *cpu_type;
946 model_pieces = g_strsplit(cpu_option, ",", 2);
947 if (!model_pieces[0]) {
948 error_report("-cpu option cannot be empty");
949 exit(1);
952 oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
953 if (oc == NULL) {
954 error_report("unable to find CPU model '%s'", model_pieces[0]);
955 g_strfreev(model_pieces);
956 exit(EXIT_FAILURE);
959 cpu_type = object_class_get_name(oc);
960 cc = CPU_CLASS(oc);
961 cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
962 g_strfreev(model_pieces);
963 return cpu_type;
966 #if defined(CONFIG_USER_ONLY)
967 void tb_invalidate_phys_addr(target_ulong addr)
969 mmap_lock();
970 tb_invalidate_phys_page_range(addr, addr + 1);
971 mmap_unlock();
974 static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
976 tb_invalidate_phys_addr(pc);
978 #else
979 void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
981 ram_addr_t ram_addr;
982 MemoryRegion *mr;
983 hwaddr l = 1;
985 if (!tcg_enabled()) {
986 return;
989 RCU_READ_LOCK_GUARD();
990 mr = address_space_translate(as, addr, &addr, &l, false, attrs);
991 if (!(memory_region_is_ram(mr)
992 || memory_region_is_romd(mr))) {
993 return;
995 ram_addr = memory_region_get_ram_addr(mr) + addr;
996 tb_invalidate_phys_page_range(ram_addr, ram_addr + 1);
999 static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
1002 * There may not be a virtual to physical translation for the pc
1003 * right now, but there may exist cached TB for this pc.
1004 * Flush the whole TB cache to force re-translation of such TBs.
1005 * This is heavyweight, but we're debugging anyway.
1007 tb_flush(cpu);
1009 #endif
1011 #ifndef CONFIG_USER_ONLY
1012 /* Add a watchpoint. */
1013 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
1014 int flags, CPUWatchpoint **watchpoint)
1016 CPUWatchpoint *wp;
1017 vaddr in_page;
1019 /* forbid ranges which are empty or run off the end of the address space */
1020 if (len == 0 || (addr + len - 1) < addr) {
1021 error_report("tried to set invalid watchpoint at %"
1022 VADDR_PRIx ", len=%" VADDR_PRIu, addr, len);
1023 return -EINVAL;
1025 wp = g_malloc(sizeof(*wp));
1027 wp->vaddr = addr;
1028 wp->len = len;
1029 wp->flags = flags;
1031 /* keep all GDB-injected watchpoints in front */
1032 if (flags & BP_GDB) {
1033 QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry);
1034 } else {
1035 QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry);
1038 in_page = -(addr | TARGET_PAGE_MASK);
1039 if (len <= in_page) {
1040 tlb_flush_page(cpu, addr);
1041 } else {
1042 tlb_flush(cpu);
1045 if (watchpoint)
1046 *watchpoint = wp;
1047 return 0;
1050 /* Remove a specific watchpoint. */
1051 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
1052 int flags)
1054 CPUWatchpoint *wp;
1056 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1057 if (addr == wp->vaddr && len == wp->len
1058 && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {
1059 cpu_watchpoint_remove_by_ref(cpu, wp);
1060 return 0;
1063 return -ENOENT;
1066 /* Remove a specific watchpoint by reference. */
1067 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
1069 QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry);
1071 tlb_flush_page(cpu, watchpoint->vaddr);
1073 g_free(watchpoint);
1076 /* Remove all matching watchpoints. */
1077 void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
1079 CPUWatchpoint *wp, *next;
1081 QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) {
1082 if (wp->flags & mask) {
1083 cpu_watchpoint_remove_by_ref(cpu, wp);
1088 /* Return true if this watchpoint address matches the specified
1089 * access (ie the address range covered by the watchpoint overlaps
1090 * partially or completely with the address range covered by the
1091 * access).
1093 static inline bool watchpoint_address_matches(CPUWatchpoint *wp,
1094 vaddr addr, vaddr len)
1096 /* We know the lengths are non-zero, but a little caution is
1097 * required to avoid errors in the case where the range ends
1098 * exactly at the top of the address space and so addr + len
1099 * wraps round to zero.
1101 vaddr wpend = wp->vaddr + wp->len - 1;
1102 vaddr addrend = addr + len - 1;
1104 return !(addr > wpend || wp->vaddr > addrend);
1107 /* Return flags for watchpoints that match addr + prot. */
1108 int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len)
1110 CPUWatchpoint *wp;
1111 int ret = 0;
1113 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1114 if (watchpoint_address_matches(wp, addr, len)) {
1115 ret |= wp->flags;
1118 return ret;
1120 #endif /* !CONFIG_USER_ONLY */
1122 /* Add a breakpoint. */
1123 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
1124 CPUBreakpoint **breakpoint)
1126 CPUBreakpoint *bp;
1128 bp = g_malloc(sizeof(*bp));
1130 bp->pc = pc;
1131 bp->flags = flags;
1133 /* keep all GDB-injected breakpoints in front */
1134 if (flags & BP_GDB) {
1135 QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
1136 } else {
1137 QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
1140 breakpoint_invalidate(cpu, pc);
1142 if (breakpoint) {
1143 *breakpoint = bp;
1145 return 0;
1148 /* Remove a specific breakpoint. */
1149 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
1151 CPUBreakpoint *bp;
1153 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
1154 if (bp->pc == pc && bp->flags == flags) {
1155 cpu_breakpoint_remove_by_ref(cpu, bp);
1156 return 0;
1159 return -ENOENT;
1162 /* Remove a specific breakpoint by reference. */
1163 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint)
1165 QTAILQ_REMOVE(&cpu->breakpoints, breakpoint, entry);
1167 breakpoint_invalidate(cpu, breakpoint->pc);
1169 g_free(breakpoint);
1172 /* Remove all matching breakpoints. */
1173 void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
1175 CPUBreakpoint *bp, *next;
1177 QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
1178 if (bp->flags & mask) {
1179 cpu_breakpoint_remove_by_ref(cpu, bp);
1184 /* enable or disable single step mode. EXCP_DEBUG is returned by the
1185 CPU loop after each instruction */
1186 void cpu_single_step(CPUState *cpu, int enabled)
1188 if (cpu->singlestep_enabled != enabled) {
1189 cpu->singlestep_enabled = enabled;
1190 if (kvm_enabled()) {
1191 kvm_update_guest_debug(cpu, 0);
1192 } else {
1193 /* must flush all the translated code to avoid inconsistencies */
1194 /* XXX: only flush what is necessary */
1195 tb_flush(cpu);
1200 void cpu_abort(CPUState *cpu, const char *fmt, ...)
1202 va_list ap;
1203 va_list ap2;
1205 va_start(ap, fmt);
1206 va_copy(ap2, ap);
1207 fprintf(stderr, "qemu: fatal: ");
1208 vfprintf(stderr, fmt, ap);
1209 fprintf(stderr, "\n");
1210 cpu_dump_state(cpu, stderr, CPU_DUMP_FPU | CPU_DUMP_CCOP);
1211 if (qemu_log_separate()) {
1212 FILE *logfile = qemu_log_lock();
1213 qemu_log("qemu: fatal: ");
1214 qemu_log_vprintf(fmt, ap2);
1215 qemu_log("\n");
1216 log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP);
1217 qemu_log_flush();
1218 qemu_log_unlock(logfile);
1219 qemu_log_close();
1221 va_end(ap2);
1222 va_end(ap);
1223 replay_finish();
1224 #if defined(CONFIG_USER_ONLY)
1226 struct sigaction act;
1227 sigfillset(&act.sa_mask);
1228 act.sa_handler = SIG_DFL;
1229 act.sa_flags = 0;
1230 sigaction(SIGABRT, &act, NULL);
1232 #endif
1233 abort();
1236 #if !defined(CONFIG_USER_ONLY)
1237 /* Called from RCU critical section */
1238 static RAMBlock *qemu_get_ram_block(ram_addr_t addr)
1240 RAMBlock *block;
1242 block = qatomic_rcu_read(&ram_list.mru_block);
1243 if (block && addr - block->offset < block->max_length) {
1244 return block;
1246 RAMBLOCK_FOREACH(block) {
1247 if (addr - block->offset < block->max_length) {
1248 goto found;
1252 fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr);
1253 abort();
1255 found:
1256 /* It is safe to write mru_block outside the iothread lock. This
1257 * is what happens:
1259 * mru_block = xxx
1260 * rcu_read_unlock()
1261 * xxx removed from list
1262 * rcu_read_lock()
1263 * read mru_block
1264 * mru_block = NULL;
1265 * call_rcu(reclaim_ramblock, xxx);
1266 * rcu_read_unlock()
1268 * qatomic_rcu_set is not needed here. The block was already published
1269 * when it was placed into the list. Here we're just making an extra
1270 * copy of the pointer.
1272 ram_list.mru_block = block;
1273 return block;
1276 static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length)
1278 CPUState *cpu;
1279 ram_addr_t start1;
1280 RAMBlock *block;
1281 ram_addr_t end;
1283 assert(tcg_enabled());
1284 end = TARGET_PAGE_ALIGN(start + length);
1285 start &= TARGET_PAGE_MASK;
1287 RCU_READ_LOCK_GUARD();
1288 block = qemu_get_ram_block(start);
1289 assert(block == qemu_get_ram_block(end - 1));
1290 start1 = (uintptr_t)ramblock_ptr(block, start - block->offset);
1291 CPU_FOREACH(cpu) {
1292 tlb_reset_dirty(cpu, start1, length);
1296 /* Note: start and end must be within the same ram block. */
1297 bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start,
1298 ram_addr_t length,
1299 unsigned client)
1301 DirtyMemoryBlocks *blocks;
1302 unsigned long end, page, start_page;
1303 bool dirty = false;
1304 RAMBlock *ramblock;
1305 uint64_t mr_offset, mr_size;
1307 if (length == 0) {
1308 return false;
1311 end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS;
1312 start_page = start >> TARGET_PAGE_BITS;
1313 page = start_page;
1315 WITH_RCU_READ_LOCK_GUARD() {
1316 blocks = qatomic_rcu_read(&ram_list.dirty_memory[client]);
1317 ramblock = qemu_get_ram_block(start);
1318 /* Range sanity check on the ramblock */
1319 assert(start >= ramblock->offset &&
1320 start + length <= ramblock->offset + ramblock->used_length);
1322 while (page < end) {
1323 unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE;
1324 unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE;
1325 unsigned long num = MIN(end - page,
1326 DIRTY_MEMORY_BLOCK_SIZE - offset);
1328 dirty |= bitmap_test_and_clear_atomic(blocks->blocks[idx],
1329 offset, num);
1330 page += num;
1333 mr_offset = (ram_addr_t)(start_page << TARGET_PAGE_BITS) - ramblock->offset;
1334 mr_size = (end - start_page) << TARGET_PAGE_BITS;
1335 memory_region_clear_dirty_bitmap(ramblock->mr, mr_offset, mr_size);
1338 if (dirty && tcg_enabled()) {
1339 tlb_reset_dirty_range_all(start, length);
1342 return dirty;
1345 DirtyBitmapSnapshot *cpu_physical_memory_snapshot_and_clear_dirty
1346 (MemoryRegion *mr, hwaddr offset, hwaddr length, unsigned client)
1348 DirtyMemoryBlocks *blocks;
1349 ram_addr_t start = memory_region_get_ram_addr(mr) + offset;
1350 unsigned long align = 1UL << (TARGET_PAGE_BITS + BITS_PER_LEVEL);
1351 ram_addr_t first = QEMU_ALIGN_DOWN(start, align);
1352 ram_addr_t last = QEMU_ALIGN_UP(start + length, align);
1353 DirtyBitmapSnapshot *snap;
1354 unsigned long page, end, dest;
1356 snap = g_malloc0(sizeof(*snap) +
1357 ((last - first) >> (TARGET_PAGE_BITS + 3)));
1358 snap->start = first;
1359 snap->end = last;
1361 page = first >> TARGET_PAGE_BITS;
1362 end = last >> TARGET_PAGE_BITS;
1363 dest = 0;
1365 WITH_RCU_READ_LOCK_GUARD() {
1366 blocks = qatomic_rcu_read(&ram_list.dirty_memory[client]);
1368 while (page < end) {
1369 unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE;
1370 unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE;
1371 unsigned long num = MIN(end - page,
1372 DIRTY_MEMORY_BLOCK_SIZE - offset);
1374 assert(QEMU_IS_ALIGNED(offset, (1 << BITS_PER_LEVEL)));
1375 assert(QEMU_IS_ALIGNED(num, (1 << BITS_PER_LEVEL)));
1376 offset >>= BITS_PER_LEVEL;
1378 bitmap_copy_and_clear_atomic(snap->dirty + dest,
1379 blocks->blocks[idx] + offset,
1380 num);
1381 page += num;
1382 dest += num >> BITS_PER_LEVEL;
1386 if (tcg_enabled()) {
1387 tlb_reset_dirty_range_all(start, length);
1390 memory_region_clear_dirty_bitmap(mr, offset, length);
1392 return snap;
1395 bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot *snap,
1396 ram_addr_t start,
1397 ram_addr_t length)
1399 unsigned long page, end;
1401 assert(start >= snap->start);
1402 assert(start + length <= snap->end);
1404 end = TARGET_PAGE_ALIGN(start + length - snap->start) >> TARGET_PAGE_BITS;
1405 page = (start - snap->start) >> TARGET_PAGE_BITS;
1407 while (page < end) {
1408 if (test_bit(page, snap->dirty)) {
1409 return true;
1411 page++;
1413 return false;
1416 /* Called from RCU critical section */
1417 hwaddr memory_region_section_get_iotlb(CPUState *cpu,
1418 MemoryRegionSection *section)
1420 AddressSpaceDispatch *d = flatview_to_dispatch(section->fv);
1421 return section - d->map.sections;
1423 #endif /* defined(CONFIG_USER_ONLY) */
1425 #if !defined(CONFIG_USER_ONLY)
1427 static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end,
1428 uint16_t section);
1429 static subpage_t *subpage_init(FlatView *fv, hwaddr base);
1431 static void *(*phys_mem_alloc)(size_t size, uint64_t *align, bool shared) =
1432 qemu_anon_ram_alloc;
1435 * Set a custom physical guest memory alloator.
1436 * Accelerators with unusual needs may need this. Hopefully, we can
1437 * get rid of it eventually.
1439 void phys_mem_set_alloc(void *(*alloc)(size_t, uint64_t *align, bool shared))
1441 phys_mem_alloc = alloc;
1444 static uint16_t phys_section_add(PhysPageMap *map,
1445 MemoryRegionSection *section)
1447 /* The physical section number is ORed with a page-aligned
1448 * pointer to produce the iotlb entries. Thus it should
1449 * never overflow into the page-aligned value.
1451 assert(map->sections_nb < TARGET_PAGE_SIZE);
1453 if (map->sections_nb == map->sections_nb_alloc) {
1454 map->sections_nb_alloc = MAX(map->sections_nb_alloc * 2, 16);
1455 map->sections = g_renew(MemoryRegionSection, map->sections,
1456 map->sections_nb_alloc);
1458 map->sections[map->sections_nb] = *section;
1459 memory_region_ref(section->mr);
1460 return map->sections_nb++;
1463 static void phys_section_destroy(MemoryRegion *mr)
1465 bool have_sub_page = mr->subpage;
1467 memory_region_unref(mr);
1469 if (have_sub_page) {
1470 subpage_t *subpage = container_of(mr, subpage_t, iomem);
1471 object_unref(OBJECT(&subpage->iomem));
1472 g_free(subpage);
1476 static void phys_sections_free(PhysPageMap *map)
1478 while (map->sections_nb > 0) {
1479 MemoryRegionSection *section = &map->sections[--map->sections_nb];
1480 phys_section_destroy(section->mr);
1482 g_free(map->sections);
1483 g_free(map->nodes);
1486 static void register_subpage(FlatView *fv, MemoryRegionSection *section)
1488 AddressSpaceDispatch *d = flatview_to_dispatch(fv);
1489 subpage_t *subpage;
1490 hwaddr base = section->offset_within_address_space
1491 & TARGET_PAGE_MASK;
1492 MemoryRegionSection *existing = phys_page_find(d, base);
1493 MemoryRegionSection subsection = {
1494 .offset_within_address_space = base,
1495 .size = int128_make64(TARGET_PAGE_SIZE),
1497 hwaddr start, end;
1499 assert(existing->mr->subpage || existing->mr == &io_mem_unassigned);
1501 if (!(existing->mr->subpage)) {
1502 subpage = subpage_init(fv, base);
1503 subsection.fv = fv;
1504 subsection.mr = &subpage->iomem;
1505 phys_page_set(d, base >> TARGET_PAGE_BITS, 1,
1506 phys_section_add(&d->map, &subsection));
1507 } else {
1508 subpage = container_of(existing->mr, subpage_t, iomem);
1510 start = section->offset_within_address_space & ~TARGET_PAGE_MASK;
1511 end = start + int128_get64(section->size) - 1;
1512 subpage_register(subpage, start, end,
1513 phys_section_add(&d->map, section));
1517 static void register_multipage(FlatView *fv,
1518 MemoryRegionSection *section)
1520 AddressSpaceDispatch *d = flatview_to_dispatch(fv);
1521 hwaddr start_addr = section->offset_within_address_space;
1522 uint16_t section_index = phys_section_add(&d->map, section);
1523 uint64_t num_pages = int128_get64(int128_rshift(section->size,
1524 TARGET_PAGE_BITS));
1526 assert(num_pages);
1527 phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index);
1531 * The range in *section* may look like this:
1533 * |s|PPPPPPP|s|
1535 * where s stands for subpage and P for page.
1537 void flatview_add_to_dispatch(FlatView *fv, MemoryRegionSection *section)
1539 MemoryRegionSection remain = *section;
1540 Int128 page_size = int128_make64(TARGET_PAGE_SIZE);
1542 /* register first subpage */
1543 if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) {
1544 uint64_t left = TARGET_PAGE_ALIGN(remain.offset_within_address_space)
1545 - remain.offset_within_address_space;
1547 MemoryRegionSection now = remain;
1548 now.size = int128_min(int128_make64(left), now.size);
1549 register_subpage(fv, &now);
1550 if (int128_eq(remain.size, now.size)) {
1551 return;
1553 remain.size = int128_sub(remain.size, now.size);
1554 remain.offset_within_address_space += int128_get64(now.size);
1555 remain.offset_within_region += int128_get64(now.size);
1558 /* register whole pages */
1559 if (int128_ge(remain.size, page_size)) {
1560 MemoryRegionSection now = remain;
1561 now.size = int128_and(now.size, int128_neg(page_size));
1562 register_multipage(fv, &now);
1563 if (int128_eq(remain.size, now.size)) {
1564 return;
1566 remain.size = int128_sub(remain.size, now.size);
1567 remain.offset_within_address_space += int128_get64(now.size);
1568 remain.offset_within_region += int128_get64(now.size);
1571 /* register last subpage */
1572 register_subpage(fv, &remain);
1575 void qemu_flush_coalesced_mmio_buffer(void)
1577 if (kvm_enabled())
1578 kvm_flush_coalesced_mmio_buffer();
1581 void qemu_mutex_lock_ramlist(void)
1583 qemu_mutex_lock(&ram_list.mutex);
1586 void qemu_mutex_unlock_ramlist(void)
1588 qemu_mutex_unlock(&ram_list.mutex);
1591 void ram_block_dump(Monitor *mon)
1593 RAMBlock *block;
1594 char *psize;
1596 RCU_READ_LOCK_GUARD();
1597 monitor_printf(mon, "%24s %8s %18s %18s %18s\n",
1598 "Block Name", "PSize", "Offset", "Used", "Total");
1599 RAMBLOCK_FOREACH(block) {
1600 psize = size_to_str(block->page_size);
1601 monitor_printf(mon, "%24s %8s 0x%016" PRIx64 " 0x%016" PRIx64
1602 " 0x%016" PRIx64 "\n", block->idstr, psize,
1603 (uint64_t)block->offset,
1604 (uint64_t)block->used_length,
1605 (uint64_t)block->max_length);
1606 g_free(psize);
1610 #ifdef __linux__
1612 * FIXME TOCTTOU: this iterates over memory backends' mem-path, which
1613 * may or may not name the same files / on the same filesystem now as
1614 * when we actually open and map them. Iterate over the file
1615 * descriptors instead, and use qemu_fd_getpagesize().
1617 static int find_min_backend_pagesize(Object *obj, void *opaque)
1619 long *hpsize_min = opaque;
1621 if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) {
1622 HostMemoryBackend *backend = MEMORY_BACKEND(obj);
1623 long hpsize = host_memory_backend_pagesize(backend);
1625 if (host_memory_backend_is_mapped(backend) && (hpsize < *hpsize_min)) {
1626 *hpsize_min = hpsize;
1630 return 0;
1633 static int find_max_backend_pagesize(Object *obj, void *opaque)
1635 long *hpsize_max = opaque;
1637 if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) {
1638 HostMemoryBackend *backend = MEMORY_BACKEND(obj);
1639 long hpsize = host_memory_backend_pagesize(backend);
1641 if (host_memory_backend_is_mapped(backend) && (hpsize > *hpsize_max)) {
1642 *hpsize_max = hpsize;
1646 return 0;
1650 * TODO: We assume right now that all mapped host memory backends are
1651 * used as RAM, however some might be used for different purposes.
1653 long qemu_minrampagesize(void)
1655 long hpsize = LONG_MAX;
1656 Object *memdev_root = object_resolve_path("/objects", NULL);
1658 object_child_foreach(memdev_root, find_min_backend_pagesize, &hpsize);
1659 return hpsize;
1662 long qemu_maxrampagesize(void)
1664 long pagesize = 0;
1665 Object *memdev_root = object_resolve_path("/objects", NULL);
1667 object_child_foreach(memdev_root, find_max_backend_pagesize, &pagesize);
1668 return pagesize;
1670 #else
1671 long qemu_minrampagesize(void)
1673 return qemu_real_host_page_size;
1675 long qemu_maxrampagesize(void)
1677 return qemu_real_host_page_size;
1679 #endif
1681 #ifdef CONFIG_POSIX
1682 static int64_t get_file_size(int fd)
1684 int64_t size;
1685 #if defined(__linux__)
1686 struct stat st;
1688 if (fstat(fd, &st) < 0) {
1689 return -errno;
1692 /* Special handling for devdax character devices */
1693 if (S_ISCHR(st.st_mode)) {
1694 g_autofree char *subsystem_path = NULL;
1695 g_autofree char *subsystem = NULL;
1697 subsystem_path = g_strdup_printf("/sys/dev/char/%d:%d/subsystem",
1698 major(st.st_rdev), minor(st.st_rdev));
1699 subsystem = g_file_read_link(subsystem_path, NULL);
1701 if (subsystem && g_str_has_suffix(subsystem, "/dax")) {
1702 g_autofree char *size_path = NULL;
1703 g_autofree char *size_str = NULL;
1705 size_path = g_strdup_printf("/sys/dev/char/%d:%d/size",
1706 major(st.st_rdev), minor(st.st_rdev));
1708 if (g_file_get_contents(size_path, &size_str, NULL, NULL)) {
1709 return g_ascii_strtoll(size_str, NULL, 0);
1713 #endif /* defined(__linux__) */
1715 /* st.st_size may be zero for special files yet lseek(2) works */
1716 size = lseek(fd, 0, SEEK_END);
1717 if (size < 0) {
1718 return -errno;
1720 return size;
1723 static int64_t get_file_align(int fd)
1725 int64_t align = -1;
1726 #if defined(__linux__) && defined(CONFIG_LIBDAXCTL)
1727 struct stat st;
1729 if (fstat(fd, &st) < 0) {
1730 return -errno;
1733 /* Special handling for devdax character devices */
1734 if (S_ISCHR(st.st_mode)) {
1735 g_autofree char *path = NULL;
1736 g_autofree char *rpath = NULL;
1737 struct daxctl_ctx *ctx;
1738 struct daxctl_region *region;
1739 int rc = 0;
1741 path = g_strdup_printf("/sys/dev/char/%d:%d",
1742 major(st.st_rdev), minor(st.st_rdev));
1743 rpath = realpath(path, NULL);
1745 rc = daxctl_new(&ctx);
1746 if (rc) {
1747 return -1;
1750 daxctl_region_foreach(ctx, region) {
1751 if (strstr(rpath, daxctl_region_get_path(region))) {
1752 align = daxctl_region_get_align(region);
1753 break;
1756 daxctl_unref(ctx);
1758 #endif /* defined(__linux__) && defined(CONFIG_LIBDAXCTL) */
1760 return align;
1763 static int file_ram_open(const char *path,
1764 const char *region_name,
1765 bool *created,
1766 Error **errp)
1768 char *filename;
1769 char *sanitized_name;
1770 char *c;
1771 int fd = -1;
1773 *created = false;
1774 for (;;) {
1775 fd = open(path, O_RDWR);
1776 if (fd >= 0) {
1777 /* @path names an existing file, use it */
1778 break;
1780 if (errno == ENOENT) {
1781 /* @path names a file that doesn't exist, create it */
1782 fd = open(path, O_RDWR | O_CREAT | O_EXCL, 0644);
1783 if (fd >= 0) {
1784 *created = true;
1785 break;
1787 } else if (errno == EISDIR) {
1788 /* @path names a directory, create a file there */
1789 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
1790 sanitized_name = g_strdup(region_name);
1791 for (c = sanitized_name; *c != '\0'; c++) {
1792 if (*c == '/') {
1793 *c = '_';
1797 filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path,
1798 sanitized_name);
1799 g_free(sanitized_name);
1801 fd = mkstemp(filename);
1802 if (fd >= 0) {
1803 unlink(filename);
1804 g_free(filename);
1805 break;
1807 g_free(filename);
1809 if (errno != EEXIST && errno != EINTR) {
1810 error_setg_errno(errp, errno,
1811 "can't open backing store %s for guest RAM",
1812 path);
1813 return -1;
1816 * Try again on EINTR and EEXIST. The latter happens when
1817 * something else creates the file between our two open().
1821 return fd;
1824 static void *file_ram_alloc(RAMBlock *block,
1825 ram_addr_t memory,
1826 int fd,
1827 bool truncate,
1828 Error **errp)
1830 void *area;
1832 block->page_size = qemu_fd_getpagesize(fd);
1833 if (block->mr->align % block->page_size) {
1834 error_setg(errp, "alignment 0x%" PRIx64
1835 " must be multiples of page size 0x%zx",
1836 block->mr->align, block->page_size);
1837 return NULL;
1838 } else if (block->mr->align && !is_power_of_2(block->mr->align)) {
1839 error_setg(errp, "alignment 0x%" PRIx64
1840 " must be a power of two", block->mr->align);
1841 return NULL;
1843 block->mr->align = MAX(block->page_size, block->mr->align);
1844 #if defined(__s390x__)
1845 if (kvm_enabled()) {
1846 block->mr->align = MAX(block->mr->align, QEMU_VMALLOC_ALIGN);
1848 #endif
1850 if (memory < block->page_size) {
1851 error_setg(errp, "memory size 0x" RAM_ADDR_FMT " must be equal to "
1852 "or larger than page size 0x%zx",
1853 memory, block->page_size);
1854 return NULL;
1857 memory = ROUND_UP(memory, block->page_size);
1860 * ftruncate is not supported by hugetlbfs in older
1861 * hosts, so don't bother bailing out on errors.
1862 * If anything goes wrong with it under other filesystems,
1863 * mmap will fail.
1865 * Do not truncate the non-empty backend file to avoid corrupting
1866 * the existing data in the file. Disabling shrinking is not
1867 * enough. For example, the current vNVDIMM implementation stores
1868 * the guest NVDIMM labels at the end of the backend file. If the
1869 * backend file is later extended, QEMU will not be able to find
1870 * those labels. Therefore, extending the non-empty backend file
1871 * is disabled as well.
1873 if (truncate && ftruncate(fd, memory)) {
1874 perror("ftruncate");
1877 area = qemu_ram_mmap(fd, memory, block->mr->align,
1878 block->flags & RAM_SHARED, block->flags & RAM_PMEM);
1879 if (area == MAP_FAILED) {
1880 error_setg_errno(errp, errno,
1881 "unable to map backing store for guest RAM");
1882 return NULL;
1885 block->fd = fd;
1886 return area;
1888 #endif
1890 /* Allocate space within the ram_addr_t space that governs the
1891 * dirty bitmaps.
1892 * Called with the ramlist lock held.
1894 static ram_addr_t find_ram_offset(ram_addr_t size)
1896 RAMBlock *block, *next_block;
1897 ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX;
1899 assert(size != 0); /* it would hand out same offset multiple times */
1901 if (QLIST_EMPTY_RCU(&ram_list.blocks)) {
1902 return 0;
1905 RAMBLOCK_FOREACH(block) {
1906 ram_addr_t candidate, next = RAM_ADDR_MAX;
1908 /* Align blocks to start on a 'long' in the bitmap
1909 * which makes the bitmap sync'ing take the fast path.
1911 candidate = block->offset + block->max_length;
1912 candidate = ROUND_UP(candidate, BITS_PER_LONG << TARGET_PAGE_BITS);
1914 /* Search for the closest following block
1915 * and find the gap.
1917 RAMBLOCK_FOREACH(next_block) {
1918 if (next_block->offset >= candidate) {
1919 next = MIN(next, next_block->offset);
1923 /* If it fits remember our place and remember the size
1924 * of gap, but keep going so that we might find a smaller
1925 * gap to fill so avoiding fragmentation.
1927 if (next - candidate >= size && next - candidate < mingap) {
1928 offset = candidate;
1929 mingap = next - candidate;
1932 trace_find_ram_offset_loop(size, candidate, offset, next, mingap);
1935 if (offset == RAM_ADDR_MAX) {
1936 fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n",
1937 (uint64_t)size);
1938 abort();
1941 trace_find_ram_offset(size, offset);
1943 return offset;
1946 static unsigned long last_ram_page(void)
1948 RAMBlock *block;
1949 ram_addr_t last = 0;
1951 RCU_READ_LOCK_GUARD();
1952 RAMBLOCK_FOREACH(block) {
1953 last = MAX(last, block->offset + block->max_length);
1955 return last >> TARGET_PAGE_BITS;
1958 static void qemu_ram_setup_dump(void *addr, ram_addr_t size)
1960 int ret;
1962 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
1963 if (!machine_dump_guest_core(current_machine)) {
1964 ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP);
1965 if (ret) {
1966 perror("qemu_madvise");
1967 fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, "
1968 "but dump_guest_core=off specified\n");
1973 const char *qemu_ram_get_idstr(RAMBlock *rb)
1975 return rb->idstr;
1978 void *qemu_ram_get_host_addr(RAMBlock *rb)
1980 return rb->host;
1983 ram_addr_t qemu_ram_get_offset(RAMBlock *rb)
1985 return rb->offset;
1988 ram_addr_t qemu_ram_get_used_length(RAMBlock *rb)
1990 return rb->used_length;
1993 bool qemu_ram_is_shared(RAMBlock *rb)
1995 return rb->flags & RAM_SHARED;
1998 /* Note: Only set at the start of postcopy */
1999 bool qemu_ram_is_uf_zeroable(RAMBlock *rb)
2001 return rb->flags & RAM_UF_ZEROPAGE;
2004 void qemu_ram_set_uf_zeroable(RAMBlock *rb)
2006 rb->flags |= RAM_UF_ZEROPAGE;
2009 bool qemu_ram_is_migratable(RAMBlock *rb)
2011 return rb->flags & RAM_MIGRATABLE;
2014 void qemu_ram_set_migratable(RAMBlock *rb)
2016 rb->flags |= RAM_MIGRATABLE;
2019 void qemu_ram_unset_migratable(RAMBlock *rb)
2021 rb->flags &= ~RAM_MIGRATABLE;
2024 /* Called with iothread lock held. */
2025 void qemu_ram_set_idstr(RAMBlock *new_block, const char *name, DeviceState *dev)
2027 RAMBlock *block;
2029 assert(new_block);
2030 assert(!new_block->idstr[0]);
2032 if (dev) {
2033 char *id = qdev_get_dev_path(dev);
2034 if (id) {
2035 snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id);
2036 g_free(id);
2039 pstrcat(new_block->idstr, sizeof(new_block->idstr), name);
2041 RCU_READ_LOCK_GUARD();
2042 RAMBLOCK_FOREACH(block) {
2043 if (block != new_block &&
2044 !strcmp(block->idstr, new_block->idstr)) {
2045 fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n",
2046 new_block->idstr);
2047 abort();
2052 /* Called with iothread lock held. */
2053 void qemu_ram_unset_idstr(RAMBlock *block)
2055 /* FIXME: arch_init.c assumes that this is not called throughout
2056 * migration. Ignore the problem since hot-unplug during migration
2057 * does not work anyway.
2059 if (block) {
2060 memset(block->idstr, 0, sizeof(block->idstr));
2064 size_t qemu_ram_pagesize(RAMBlock *rb)
2066 return rb->page_size;
2069 /* Returns the largest size of page in use */
2070 size_t qemu_ram_pagesize_largest(void)
2072 RAMBlock *block;
2073 size_t largest = 0;
2075 RAMBLOCK_FOREACH(block) {
2076 largest = MAX(largest, qemu_ram_pagesize(block));
2079 return largest;
2082 static int memory_try_enable_merging(void *addr, size_t len)
2084 if (!machine_mem_merge(current_machine)) {
2085 /* disabled by the user */
2086 return 0;
2089 return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE);
2092 /* Only legal before guest might have detected the memory size: e.g. on
2093 * incoming migration, or right after reset.
2095 * As memory core doesn't know how is memory accessed, it is up to
2096 * resize callback to update device state and/or add assertions to detect
2097 * misuse, if necessary.
2099 int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp)
2101 const ram_addr_t unaligned_size = newsize;
2103 assert(block);
2105 newsize = HOST_PAGE_ALIGN(newsize);
2107 if (block->used_length == newsize) {
2109 * We don't have to resize the ram block (which only knows aligned
2110 * sizes), however, we have to notify if the unaligned size changed.
2112 if (unaligned_size != memory_region_size(block->mr)) {
2113 memory_region_set_size(block->mr, unaligned_size);
2114 if (block->resized) {
2115 block->resized(block->idstr, unaligned_size, block->host);
2118 return 0;
2121 if (!(block->flags & RAM_RESIZEABLE)) {
2122 error_setg_errno(errp, EINVAL,
2123 "Length mismatch: %s: 0x" RAM_ADDR_FMT
2124 " in != 0x" RAM_ADDR_FMT, block->idstr,
2125 newsize, block->used_length);
2126 return -EINVAL;
2129 if (block->max_length < newsize) {
2130 error_setg_errno(errp, EINVAL,
2131 "Length too large: %s: 0x" RAM_ADDR_FMT
2132 " > 0x" RAM_ADDR_FMT, block->idstr,
2133 newsize, block->max_length);
2134 return -EINVAL;
2137 cpu_physical_memory_clear_dirty_range(block->offset, block->used_length);
2138 block->used_length = newsize;
2139 cpu_physical_memory_set_dirty_range(block->offset, block->used_length,
2140 DIRTY_CLIENTS_ALL);
2141 memory_region_set_size(block->mr, unaligned_size);
2142 if (block->resized) {
2143 block->resized(block->idstr, unaligned_size, block->host);
2145 return 0;
2149 * Trigger sync on the given ram block for range [start, start + length]
2150 * with the backing store if one is available.
2151 * Otherwise no-op.
2152 * @Note: this is supposed to be a synchronous op.
2154 void qemu_ram_msync(RAMBlock *block, ram_addr_t start, ram_addr_t length)
2156 /* The requested range should fit in within the block range */
2157 g_assert((start + length) <= block->used_length);
2159 #ifdef CONFIG_LIBPMEM
2160 /* The lack of support for pmem should not block the sync */
2161 if (ramblock_is_pmem(block)) {
2162 void *addr = ramblock_ptr(block, start);
2163 pmem_persist(addr, length);
2164 return;
2166 #endif
2167 if (block->fd >= 0) {
2169 * Case there is no support for PMEM or the memory has not been
2170 * specified as persistent (or is not one) - use the msync.
2171 * Less optimal but still achieves the same goal
2173 void *addr = ramblock_ptr(block, start);
2174 if (qemu_msync(addr, length, block->fd)) {
2175 warn_report("%s: failed to sync memory range: start: "
2176 RAM_ADDR_FMT " length: " RAM_ADDR_FMT,
2177 __func__, start, length);
2182 /* Called with ram_list.mutex held */
2183 static void dirty_memory_extend(ram_addr_t old_ram_size,
2184 ram_addr_t new_ram_size)
2186 ram_addr_t old_num_blocks = DIV_ROUND_UP(old_ram_size,
2187 DIRTY_MEMORY_BLOCK_SIZE);
2188 ram_addr_t new_num_blocks = DIV_ROUND_UP(new_ram_size,
2189 DIRTY_MEMORY_BLOCK_SIZE);
2190 int i;
2192 /* Only need to extend if block count increased */
2193 if (new_num_blocks <= old_num_blocks) {
2194 return;
2197 for (i = 0; i < DIRTY_MEMORY_NUM; i++) {
2198 DirtyMemoryBlocks *old_blocks;
2199 DirtyMemoryBlocks *new_blocks;
2200 int j;
2202 old_blocks = qatomic_rcu_read(&ram_list.dirty_memory[i]);
2203 new_blocks = g_malloc(sizeof(*new_blocks) +
2204 sizeof(new_blocks->blocks[0]) * new_num_blocks);
2206 if (old_num_blocks) {
2207 memcpy(new_blocks->blocks, old_blocks->blocks,
2208 old_num_blocks * sizeof(old_blocks->blocks[0]));
2211 for (j = old_num_blocks; j < new_num_blocks; j++) {
2212 new_blocks->blocks[j] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE);
2215 qatomic_rcu_set(&ram_list.dirty_memory[i], new_blocks);
2217 if (old_blocks) {
2218 g_free_rcu(old_blocks, rcu);
2223 static void ram_block_add(RAMBlock *new_block, Error **errp, bool shared)
2225 RAMBlock *block;
2226 RAMBlock *last_block = NULL;
2227 ram_addr_t old_ram_size, new_ram_size;
2228 Error *err = NULL;
2230 old_ram_size = last_ram_page();
2232 qemu_mutex_lock_ramlist();
2233 new_block->offset = find_ram_offset(new_block->max_length);
2235 if (!new_block->host) {
2236 if (xen_enabled()) {
2237 xen_ram_alloc(new_block->offset, new_block->max_length,
2238 new_block->mr, &err);
2239 if (err) {
2240 error_propagate(errp, err);
2241 qemu_mutex_unlock_ramlist();
2242 return;
2244 } else {
2245 new_block->host = phys_mem_alloc(new_block->max_length,
2246 &new_block->mr->align, shared);
2247 if (!new_block->host) {
2248 error_setg_errno(errp, errno,
2249 "cannot set up guest memory '%s'",
2250 memory_region_name(new_block->mr));
2251 qemu_mutex_unlock_ramlist();
2252 return;
2254 memory_try_enable_merging(new_block->host, new_block->max_length);
2258 new_ram_size = MAX(old_ram_size,
2259 (new_block->offset + new_block->max_length) >> TARGET_PAGE_BITS);
2260 if (new_ram_size > old_ram_size) {
2261 dirty_memory_extend(old_ram_size, new_ram_size);
2263 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
2264 * QLIST (which has an RCU-friendly variant) does not have insertion at
2265 * tail, so save the last element in last_block.
2267 RAMBLOCK_FOREACH(block) {
2268 last_block = block;
2269 if (block->max_length < new_block->max_length) {
2270 break;
2273 if (block) {
2274 QLIST_INSERT_BEFORE_RCU(block, new_block, next);
2275 } else if (last_block) {
2276 QLIST_INSERT_AFTER_RCU(last_block, new_block, next);
2277 } else { /* list is empty */
2278 QLIST_INSERT_HEAD_RCU(&ram_list.blocks, new_block, next);
2280 ram_list.mru_block = NULL;
2282 /* Write list before version */
2283 smp_wmb();
2284 ram_list.version++;
2285 qemu_mutex_unlock_ramlist();
2287 cpu_physical_memory_set_dirty_range(new_block->offset,
2288 new_block->used_length,
2289 DIRTY_CLIENTS_ALL);
2291 if (new_block->host) {
2292 qemu_ram_setup_dump(new_block->host, new_block->max_length);
2293 qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_HUGEPAGE);
2295 * MADV_DONTFORK is also needed by KVM in absence of synchronous MMU
2296 * Configure it unless the machine is a qtest server, in which case
2297 * KVM is not used and it may be forked (eg for fuzzing purposes).
2299 if (!qtest_enabled()) {
2300 qemu_madvise(new_block->host, new_block->max_length,
2301 QEMU_MADV_DONTFORK);
2303 ram_block_notify_add(new_block->host, new_block->max_length);
2307 #ifdef CONFIG_POSIX
2308 RAMBlock *qemu_ram_alloc_from_fd(ram_addr_t size, MemoryRegion *mr,
2309 uint32_t ram_flags, int fd,
2310 Error **errp)
2312 RAMBlock *new_block;
2313 Error *local_err = NULL;
2314 int64_t file_size, file_align;
2316 /* Just support these ram flags by now. */
2317 assert((ram_flags & ~(RAM_SHARED | RAM_PMEM)) == 0);
2319 if (xen_enabled()) {
2320 error_setg(errp, "-mem-path not supported with Xen");
2321 return NULL;
2324 if (kvm_enabled() && !kvm_has_sync_mmu()) {
2325 error_setg(errp,
2326 "host lacks kvm mmu notifiers, -mem-path unsupported");
2327 return NULL;
2330 if (phys_mem_alloc != qemu_anon_ram_alloc) {
2332 * file_ram_alloc() needs to allocate just like
2333 * phys_mem_alloc, but we haven't bothered to provide
2334 * a hook there.
2336 error_setg(errp,
2337 "-mem-path not supported with this accelerator");
2338 return NULL;
2341 size = HOST_PAGE_ALIGN(size);
2342 file_size = get_file_size(fd);
2343 if (file_size > 0 && file_size < size) {
2344 error_setg(errp, "backing store size 0x%" PRIx64
2345 " does not match 'size' option 0x" RAM_ADDR_FMT,
2346 file_size, size);
2347 return NULL;
2350 file_align = get_file_align(fd);
2351 if (file_align > 0 && mr && file_align > mr->align) {
2352 error_setg(errp, "backing store align 0x%" PRIx64
2353 " is larger than 'align' option 0x%" PRIx64,
2354 file_align, mr->align);
2355 return NULL;
2358 new_block = g_malloc0(sizeof(*new_block));
2359 new_block->mr = mr;
2360 new_block->used_length = size;
2361 new_block->max_length = size;
2362 new_block->flags = ram_flags;
2363 new_block->host = file_ram_alloc(new_block, size, fd, !file_size, errp);
2364 if (!new_block->host) {
2365 g_free(new_block);
2366 return NULL;
2369 ram_block_add(new_block, &local_err, ram_flags & RAM_SHARED);
2370 if (local_err) {
2371 g_free(new_block);
2372 error_propagate(errp, local_err);
2373 return NULL;
2375 return new_block;
2380 RAMBlock *qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr,
2381 uint32_t ram_flags, const char *mem_path,
2382 Error **errp)
2384 int fd;
2385 bool created;
2386 RAMBlock *block;
2388 fd = file_ram_open(mem_path, memory_region_name(mr), &created, errp);
2389 if (fd < 0) {
2390 return NULL;
2393 block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, errp);
2394 if (!block) {
2395 if (created) {
2396 unlink(mem_path);
2398 close(fd);
2399 return NULL;
2402 return block;
2404 #endif
2406 static
2407 RAMBlock *qemu_ram_alloc_internal(ram_addr_t size, ram_addr_t max_size,
2408 void (*resized)(const char*,
2409 uint64_t length,
2410 void *host),
2411 void *host, bool resizeable, bool share,
2412 MemoryRegion *mr, Error **errp)
2414 RAMBlock *new_block;
2415 Error *local_err = NULL;
2417 size = HOST_PAGE_ALIGN(size);
2418 max_size = HOST_PAGE_ALIGN(max_size);
2419 new_block = g_malloc0(sizeof(*new_block));
2420 new_block->mr = mr;
2421 new_block->resized = resized;
2422 new_block->used_length = size;
2423 new_block->max_length = max_size;
2424 assert(max_size >= size);
2425 new_block->fd = -1;
2426 new_block->page_size = qemu_real_host_page_size;
2427 new_block->host = host;
2428 if (host) {
2429 new_block->flags |= RAM_PREALLOC;
2431 if (resizeable) {
2432 new_block->flags |= RAM_RESIZEABLE;
2434 ram_block_add(new_block, &local_err, share);
2435 if (local_err) {
2436 g_free(new_block);
2437 error_propagate(errp, local_err);
2438 return NULL;
2440 return new_block;
2443 RAMBlock *qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
2444 MemoryRegion *mr, Error **errp)
2446 return qemu_ram_alloc_internal(size, size, NULL, host, false,
2447 false, mr, errp);
2450 RAMBlock *qemu_ram_alloc(ram_addr_t size, bool share,
2451 MemoryRegion *mr, Error **errp)
2453 return qemu_ram_alloc_internal(size, size, NULL, NULL, false,
2454 share, mr, errp);
2457 RAMBlock *qemu_ram_alloc_resizeable(ram_addr_t size, ram_addr_t maxsz,
2458 void (*resized)(const char*,
2459 uint64_t length,
2460 void *host),
2461 MemoryRegion *mr, Error **errp)
2463 return qemu_ram_alloc_internal(size, maxsz, resized, NULL, true,
2464 false, mr, errp);
2467 static void reclaim_ramblock(RAMBlock *block)
2469 if (block->flags & RAM_PREALLOC) {
2471 } else if (xen_enabled()) {
2472 xen_invalidate_map_cache_entry(block->host);
2473 #ifndef _WIN32
2474 } else if (block->fd >= 0) {
2475 qemu_ram_munmap(block->fd, block->host, block->max_length);
2476 close(block->fd);
2477 #endif
2478 } else {
2479 qemu_anon_ram_free(block->host, block->max_length);
2481 g_free(block);
2484 void qemu_ram_free(RAMBlock *block)
2486 if (!block) {
2487 return;
2490 if (block->host) {
2491 ram_block_notify_remove(block->host, block->max_length);
2494 qemu_mutex_lock_ramlist();
2495 QLIST_REMOVE_RCU(block, next);
2496 ram_list.mru_block = NULL;
2497 /* Write list before version */
2498 smp_wmb();
2499 ram_list.version++;
2500 call_rcu(block, reclaim_ramblock, rcu);
2501 qemu_mutex_unlock_ramlist();
2504 #ifndef _WIN32
2505 void qemu_ram_remap(ram_addr_t addr, ram_addr_t length)
2507 RAMBlock *block;
2508 ram_addr_t offset;
2509 int flags;
2510 void *area, *vaddr;
2512 RAMBLOCK_FOREACH(block) {
2513 offset = addr - block->offset;
2514 if (offset < block->max_length) {
2515 vaddr = ramblock_ptr(block, offset);
2516 if (block->flags & RAM_PREALLOC) {
2518 } else if (xen_enabled()) {
2519 abort();
2520 } else {
2521 flags = MAP_FIXED;
2522 if (block->fd >= 0) {
2523 flags |= (block->flags & RAM_SHARED ?
2524 MAP_SHARED : MAP_PRIVATE);
2525 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
2526 flags, block->fd, offset);
2527 } else {
2529 * Remap needs to match alloc. Accelerators that
2530 * set phys_mem_alloc never remap. If they did,
2531 * we'd need a remap hook here.
2533 assert(phys_mem_alloc == qemu_anon_ram_alloc);
2535 flags |= MAP_PRIVATE | MAP_ANONYMOUS;
2536 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
2537 flags, -1, 0);
2539 if (area != vaddr) {
2540 error_report("Could not remap addr: "
2541 RAM_ADDR_FMT "@" RAM_ADDR_FMT "",
2542 length, addr);
2543 exit(1);
2545 memory_try_enable_merging(vaddr, length);
2546 qemu_ram_setup_dump(vaddr, length);
2551 #endif /* !_WIN32 */
2553 /* Return a host pointer to ram allocated with qemu_ram_alloc.
2554 * This should not be used for general purpose DMA. Use address_space_map
2555 * or address_space_rw instead. For local memory (e.g. video ram) that the
2556 * device owns, use memory_region_get_ram_ptr.
2558 * Called within RCU critical section.
2560 void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr)
2562 RAMBlock *block = ram_block;
2564 if (block == NULL) {
2565 block = qemu_get_ram_block(addr);
2566 addr -= block->offset;
2569 if (xen_enabled() && block->host == NULL) {
2570 /* We need to check if the requested address is in the RAM
2571 * because we don't want to map the entire memory in QEMU.
2572 * In that case just map until the end of the page.
2574 if (block->offset == 0) {
2575 return xen_map_cache(addr, 0, 0, false);
2578 block->host = xen_map_cache(block->offset, block->max_length, 1, false);
2580 return ramblock_ptr(block, addr);
2583 /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
2584 * but takes a size argument.
2586 * Called within RCU critical section.
2588 static void *qemu_ram_ptr_length(RAMBlock *ram_block, ram_addr_t addr,
2589 hwaddr *size, bool lock)
2591 RAMBlock *block = ram_block;
2592 if (*size == 0) {
2593 return NULL;
2596 if (block == NULL) {
2597 block = qemu_get_ram_block(addr);
2598 addr -= block->offset;
2600 *size = MIN(*size, block->max_length - addr);
2602 if (xen_enabled() && block->host == NULL) {
2603 /* We need to check if the requested address is in the RAM
2604 * because we don't want to map the entire memory in QEMU.
2605 * In that case just map the requested area.
2607 if (block->offset == 0) {
2608 return xen_map_cache(addr, *size, lock, lock);
2611 block->host = xen_map_cache(block->offset, block->max_length, 1, lock);
2614 return ramblock_ptr(block, addr);
2617 /* Return the offset of a hostpointer within a ramblock */
2618 ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host)
2620 ram_addr_t res = (uint8_t *)host - (uint8_t *)rb->host;
2621 assert((uintptr_t)host >= (uintptr_t)rb->host);
2622 assert(res < rb->max_length);
2624 return res;
2628 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
2629 * in that RAMBlock.
2631 * ptr: Host pointer to look up
2632 * round_offset: If true round the result offset down to a page boundary
2633 * *ram_addr: set to result ram_addr
2634 * *offset: set to result offset within the RAMBlock
2636 * Returns: RAMBlock (or NULL if not found)
2638 * By the time this function returns, the returned pointer is not protected
2639 * by RCU anymore. If the caller is not within an RCU critical section and
2640 * does not hold the iothread lock, it must have other means of protecting the
2641 * pointer, such as a reference to the region that includes the incoming
2642 * ram_addr_t.
2644 RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset,
2645 ram_addr_t *offset)
2647 RAMBlock *block;
2648 uint8_t *host = ptr;
2650 if (xen_enabled()) {
2651 ram_addr_t ram_addr;
2652 RCU_READ_LOCK_GUARD();
2653 ram_addr = xen_ram_addr_from_mapcache(ptr);
2654 block = qemu_get_ram_block(ram_addr);
2655 if (block) {
2656 *offset = ram_addr - block->offset;
2658 return block;
2661 RCU_READ_LOCK_GUARD();
2662 block = qatomic_rcu_read(&ram_list.mru_block);
2663 if (block && block->host && host - block->host < block->max_length) {
2664 goto found;
2667 RAMBLOCK_FOREACH(block) {
2668 /* This case append when the block is not mapped. */
2669 if (block->host == NULL) {
2670 continue;
2672 if (host - block->host < block->max_length) {
2673 goto found;
2677 return NULL;
2679 found:
2680 *offset = (host - block->host);
2681 if (round_offset) {
2682 *offset &= TARGET_PAGE_MASK;
2684 return block;
2688 * Finds the named RAMBlock
2690 * name: The name of RAMBlock to find
2692 * Returns: RAMBlock (or NULL if not found)
2694 RAMBlock *qemu_ram_block_by_name(const char *name)
2696 RAMBlock *block;
2698 RAMBLOCK_FOREACH(block) {
2699 if (!strcmp(name, block->idstr)) {
2700 return block;
2704 return NULL;
2707 /* Some of the softmmu routines need to translate from a host pointer
2708 (typically a TLB entry) back to a ram offset. */
2709 ram_addr_t qemu_ram_addr_from_host(void *ptr)
2711 RAMBlock *block;
2712 ram_addr_t offset;
2714 block = qemu_ram_block_from_host(ptr, false, &offset);
2715 if (!block) {
2716 return RAM_ADDR_INVALID;
2719 return block->offset + offset;
2722 /* Generate a debug exception if a watchpoint has been hit. */
2723 void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
2724 MemTxAttrs attrs, int flags, uintptr_t ra)
2726 CPUClass *cc = CPU_GET_CLASS(cpu);
2727 CPUWatchpoint *wp;
2729 assert(tcg_enabled());
2730 if (cpu->watchpoint_hit) {
2732 * We re-entered the check after replacing the TB.
2733 * Now raise the debug interrupt so that it will
2734 * trigger after the current instruction.
2736 qemu_mutex_lock_iothread();
2737 cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
2738 qemu_mutex_unlock_iothread();
2739 return;
2742 addr = cc->adjust_watchpoint_address(cpu, addr, len);
2743 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
2744 if (watchpoint_address_matches(wp, addr, len)
2745 && (wp->flags & flags)) {
2746 if (replay_running_debug()) {
2748 * Don't process the watchpoints when we are
2749 * in a reverse debugging operation.
2751 replay_breakpoint();
2752 return;
2754 if (flags == BP_MEM_READ) {
2755 wp->flags |= BP_WATCHPOINT_HIT_READ;
2756 } else {
2757 wp->flags |= BP_WATCHPOINT_HIT_WRITE;
2759 wp->hitaddr = MAX(addr, wp->vaddr);
2760 wp->hitattrs = attrs;
2761 if (!cpu->watchpoint_hit) {
2762 if (wp->flags & BP_CPU &&
2763 !cc->debug_check_watchpoint(cpu, wp)) {
2764 wp->flags &= ~BP_WATCHPOINT_HIT;
2765 continue;
2767 cpu->watchpoint_hit = wp;
2769 mmap_lock();
2770 tb_check_watchpoint(cpu, ra);
2771 if (wp->flags & BP_STOP_BEFORE_ACCESS) {
2772 cpu->exception_index = EXCP_DEBUG;
2773 mmap_unlock();
2774 cpu_loop_exit_restore(cpu, ra);
2775 } else {
2776 /* Force execution of one insn next time. */
2777 cpu->cflags_next_tb = 1 | curr_cflags();
2778 mmap_unlock();
2779 if (ra) {
2780 cpu_restore_state(cpu, ra, true);
2782 cpu_loop_exit_noexc(cpu);
2785 } else {
2786 wp->flags &= ~BP_WATCHPOINT_HIT;
2791 static MemTxResult flatview_read(FlatView *fv, hwaddr addr,
2792 MemTxAttrs attrs, void *buf, hwaddr len);
2793 static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
2794 const void *buf, hwaddr len);
2795 static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len,
2796 bool is_write, MemTxAttrs attrs);
2798 static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
2799 unsigned len, MemTxAttrs attrs)
2801 subpage_t *subpage = opaque;
2802 uint8_t buf[8];
2803 MemTxResult res;
2805 #if defined(DEBUG_SUBPAGE)
2806 printf("%s: subpage %p len %u addr " TARGET_FMT_plx "\n", __func__,
2807 subpage, len, addr);
2808 #endif
2809 res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len);
2810 if (res) {
2811 return res;
2813 *data = ldn_p(buf, len);
2814 return MEMTX_OK;
2817 static MemTxResult subpage_write(void *opaque, hwaddr addr,
2818 uint64_t value, unsigned len, MemTxAttrs attrs)
2820 subpage_t *subpage = opaque;
2821 uint8_t buf[8];
2823 #if defined(DEBUG_SUBPAGE)
2824 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
2825 " value %"PRIx64"\n",
2826 __func__, subpage, len, addr, value);
2827 #endif
2828 stn_p(buf, len, value);
2829 return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);
2832 static bool subpage_accepts(void *opaque, hwaddr addr,
2833 unsigned len, bool is_write,
2834 MemTxAttrs attrs)
2836 subpage_t *subpage = opaque;
2837 #if defined(DEBUG_SUBPAGE)
2838 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx "\n",
2839 __func__, subpage, is_write ? 'w' : 'r', len, addr);
2840 #endif
2842 return flatview_access_valid(subpage->fv, addr + subpage->base,
2843 len, is_write, attrs);
2846 static const MemoryRegionOps subpage_ops = {
2847 .read_with_attrs = subpage_read,
2848 .write_with_attrs = subpage_write,
2849 .impl.min_access_size = 1,
2850 .impl.max_access_size = 8,
2851 .valid.min_access_size = 1,
2852 .valid.max_access_size = 8,
2853 .valid.accepts = subpage_accepts,
2854 .endianness = DEVICE_NATIVE_ENDIAN,
2857 static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end,
2858 uint16_t section)
2860 int idx, eidx;
2862 if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE)
2863 return -1;
2864 idx = SUBPAGE_IDX(start);
2865 eidx = SUBPAGE_IDX(end);
2866 #if defined(DEBUG_SUBPAGE)
2867 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2868 __func__, mmio, start, end, idx, eidx, section);
2869 #endif
2870 for (; idx <= eidx; idx++) {
2871 mmio->sub_section[idx] = section;
2874 return 0;
2877 static subpage_t *subpage_init(FlatView *fv, hwaddr base)
2879 subpage_t *mmio;
2881 /* mmio->sub_section is set to PHYS_SECTION_UNASSIGNED with g_malloc0 */
2882 mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t));
2883 mmio->fv = fv;
2884 mmio->base = base;
2885 memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
2886 NULL, TARGET_PAGE_SIZE);
2887 mmio->iomem.subpage = true;
2888 #if defined(DEBUG_SUBPAGE)
2889 printf("%s: %p base " TARGET_FMT_plx " len %08x\n", __func__,
2890 mmio, base, TARGET_PAGE_SIZE);
2891 #endif
2893 return mmio;
2896 static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion *mr)
2898 assert(fv);
2899 MemoryRegionSection section = {
2900 .fv = fv,
2901 .mr = mr,
2902 .offset_within_address_space = 0,
2903 .offset_within_region = 0,
2904 .size = int128_2_64(),
2907 return phys_section_add(map, &section);
2910 MemoryRegionSection *iotlb_to_section(CPUState *cpu,
2911 hwaddr index, MemTxAttrs attrs)
2913 int asidx = cpu_asidx_from_attrs(cpu, attrs);
2914 CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
2915 AddressSpaceDispatch *d = qatomic_rcu_read(&cpuas->memory_dispatch);
2916 MemoryRegionSection *sections = d->map.sections;
2918 return &sections[index & ~TARGET_PAGE_MASK];
2921 static void io_mem_init(void)
2923 memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL,
2924 NULL, UINT64_MAX);
2927 AddressSpaceDispatch *address_space_dispatch_new(FlatView *fv)
2929 AddressSpaceDispatch *d = g_new0(AddressSpaceDispatch, 1);
2930 uint16_t n;
2932 n = dummy_section(&d->map, fv, &io_mem_unassigned);
2933 assert(n == PHYS_SECTION_UNASSIGNED);
2935 d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .skip = 1 };
2937 return d;
2940 void address_space_dispatch_free(AddressSpaceDispatch *d)
2942 phys_sections_free(&d->map);
2943 g_free(d);
2946 static void do_nothing(CPUState *cpu, run_on_cpu_data d)
2950 static void tcg_log_global_after_sync(MemoryListener *listener)
2952 CPUAddressSpace *cpuas;
2954 /* Wait for the CPU to end the current TB. This avoids the following
2955 * incorrect race:
2957 * vCPU migration
2958 * ---------------------- -------------------------
2959 * TLB check -> slow path
2960 * notdirty_mem_write
2961 * write to RAM
2962 * mark dirty
2963 * clear dirty flag
2964 * TLB check -> fast path
2965 * read memory
2966 * write to RAM
2968 * by pushing the migration thread's memory read after the vCPU thread has
2969 * written the memory.
2971 if (replay_mode == REPLAY_MODE_NONE) {
2973 * VGA can make calls to this function while updating the screen.
2974 * In record/replay mode this causes a deadlock, because
2975 * run_on_cpu waits for rr mutex. Therefore no races are possible
2976 * in this case and no need for making run_on_cpu when
2977 * record/replay is not enabled.
2979 cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener);
2980 run_on_cpu(cpuas->cpu, do_nothing, RUN_ON_CPU_NULL);
2984 static void tcg_commit(MemoryListener *listener)
2986 CPUAddressSpace *cpuas;
2987 AddressSpaceDispatch *d;
2989 assert(tcg_enabled());
2990 /* since each CPU stores ram addresses in its TLB cache, we must
2991 reset the modified entries */
2992 cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener);
2993 cpu_reloading_memory_map();
2994 /* The CPU and TLB are protected by the iothread lock.
2995 * We reload the dispatch pointer now because cpu_reloading_memory_map()
2996 * may have split the RCU critical section.
2998 d = address_space_to_dispatch(cpuas->as);
2999 qatomic_rcu_set(&cpuas->memory_dispatch, d);
3000 tlb_flush(cpuas->cpu);
3003 static void memory_map_init(void)
3005 system_memory = g_malloc(sizeof(*system_memory));
3007 memory_region_init(system_memory, NULL, "system", UINT64_MAX);
3008 address_space_init(&address_space_memory, system_memory, "memory");
3010 system_io = g_malloc(sizeof(*system_io));
3011 memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io",
3012 65536);
3013 address_space_init(&address_space_io, system_io, "I/O");
3016 MemoryRegion *get_system_memory(void)
3018 return system_memory;
3021 MemoryRegion *get_system_io(void)
3023 return system_io;
3026 #endif /* !defined(CONFIG_USER_ONLY) */
3028 /* physical memory access (slow version, mainly for debug) */
3029 #if defined(CONFIG_USER_ONLY)
3030 int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
3031 void *ptr, target_ulong len, bool is_write)
3033 int flags;
3034 target_ulong l, page;
3035 void * p;
3036 uint8_t *buf = ptr;
3038 while (len > 0) {
3039 page = addr & TARGET_PAGE_MASK;
3040 l = (page + TARGET_PAGE_SIZE) - addr;
3041 if (l > len)
3042 l = len;
3043 flags = page_get_flags(page);
3044 if (!(flags & PAGE_VALID))
3045 return -1;
3046 if (is_write) {
3047 if (!(flags & PAGE_WRITE))
3048 return -1;
3049 /* XXX: this code should not depend on lock_user */
3050 if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
3051 return -1;
3052 memcpy(p, buf, l);
3053 unlock_user(p, addr, l);
3054 } else {
3055 if (!(flags & PAGE_READ))
3056 return -1;
3057 /* XXX: this code should not depend on lock_user */
3058 if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
3059 return -1;
3060 memcpy(buf, p, l);
3061 unlock_user(p, addr, 0);
3063 len -= l;
3064 buf += l;
3065 addr += l;
3067 return 0;
3070 #else
3072 static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr,
3073 hwaddr length)
3075 uint8_t dirty_log_mask = memory_region_get_dirty_log_mask(mr);
3076 addr += memory_region_get_ram_addr(mr);
3078 /* No early return if dirty_log_mask is or becomes 0, because
3079 * cpu_physical_memory_set_dirty_range will still call
3080 * xen_modified_memory.
3082 if (dirty_log_mask) {
3083 dirty_log_mask =
3084 cpu_physical_memory_range_includes_clean(addr, length, dirty_log_mask);
3086 if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) {
3087 assert(tcg_enabled());
3088 tb_invalidate_phys_range(addr, addr + length);
3089 dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE);
3091 cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask);
3094 void memory_region_flush_rom_device(MemoryRegion *mr, hwaddr addr, hwaddr size)
3097 * In principle this function would work on other memory region types too,
3098 * but the ROM device use case is the only one where this operation is
3099 * necessary. Other memory regions should use the
3100 * address_space_read/write() APIs.
3102 assert(memory_region_is_romd(mr));
3104 invalidate_and_set_dirty(mr, addr, size);
3107 static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr)
3109 unsigned access_size_max = mr->ops->valid.max_access_size;
3111 /* Regions are assumed to support 1-4 byte accesses unless
3112 otherwise specified. */
3113 if (access_size_max == 0) {
3114 access_size_max = 4;
3117 /* Bound the maximum access by the alignment of the address. */
3118 if (!mr->ops->impl.unaligned) {
3119 unsigned align_size_max = addr & -addr;
3120 if (align_size_max != 0 && align_size_max < access_size_max) {
3121 access_size_max = align_size_max;
3125 /* Don't attempt accesses larger than the maximum. */
3126 if (l > access_size_max) {
3127 l = access_size_max;
3129 l = pow2floor(l);
3131 return l;
3134 static bool prepare_mmio_access(MemoryRegion *mr)
3136 bool unlocked = !qemu_mutex_iothread_locked();
3137 bool release_lock = false;
3139 if (unlocked) {
3140 qemu_mutex_lock_iothread();
3141 unlocked = false;
3142 release_lock = true;
3144 if (mr->flush_coalesced_mmio) {
3145 if (unlocked) {
3146 qemu_mutex_lock_iothread();
3148 qemu_flush_coalesced_mmio_buffer();
3149 if (unlocked) {
3150 qemu_mutex_unlock_iothread();
3154 return release_lock;
3157 /* Called within RCU critical section. */
3158 static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr,
3159 MemTxAttrs attrs,
3160 const void *ptr,
3161 hwaddr len, hwaddr addr1,
3162 hwaddr l, MemoryRegion *mr)
3164 uint8_t *ram_ptr;
3165 uint64_t val;
3166 MemTxResult result = MEMTX_OK;
3167 bool release_lock = false;
3168 const uint8_t *buf = ptr;
3170 for (;;) {
3171 if (!memory_access_is_direct(mr, true)) {
3172 release_lock |= prepare_mmio_access(mr);
3173 l = memory_access_size(mr, l, addr1);
3174 /* XXX: could force current_cpu to NULL to avoid
3175 potential bugs */
3176 val = ldn_he_p(buf, l);
3177 result |= memory_region_dispatch_write(mr, addr1, val,
3178 size_memop(l), attrs);
3179 } else {
3180 /* RAM case */
3181 ram_ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false);
3182 memcpy(ram_ptr, buf, l);
3183 invalidate_and_set_dirty(mr, addr1, l);
3186 if (release_lock) {
3187 qemu_mutex_unlock_iothread();
3188 release_lock = false;
3191 len -= l;
3192 buf += l;
3193 addr += l;
3195 if (!len) {
3196 break;
3199 l = len;
3200 mr = flatview_translate(fv, addr, &addr1, &l, true, attrs);
3203 return result;
3206 /* Called from RCU critical section. */
3207 static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
3208 const void *buf, hwaddr len)
3210 hwaddr l;
3211 hwaddr addr1;
3212 MemoryRegion *mr;
3213 MemTxResult result = MEMTX_OK;
3215 l = len;
3216 mr = flatview_translate(fv, addr, &addr1, &l, true, attrs);
3217 result = flatview_write_continue(fv, addr, attrs, buf, len,
3218 addr1, l, mr);
3220 return result;
3223 /* Called within RCU critical section. */
3224 MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,
3225 MemTxAttrs attrs, void *ptr,
3226 hwaddr len, hwaddr addr1, hwaddr l,
3227 MemoryRegion *mr)
3229 uint8_t *ram_ptr;
3230 uint64_t val;
3231 MemTxResult result = MEMTX_OK;
3232 bool release_lock = false;
3233 uint8_t *buf = ptr;
3235 for (;;) {
3236 if (!memory_access_is_direct(mr, false)) {
3237 /* I/O case */
3238 release_lock |= prepare_mmio_access(mr);
3239 l = memory_access_size(mr, l, addr1);
3240 result |= memory_region_dispatch_read(mr, addr1, &val,
3241 size_memop(l), attrs);
3242 stn_he_p(buf, l, val);
3243 } else {
3244 /* RAM case */
3245 ram_ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false);
3246 memcpy(buf, ram_ptr, l);
3249 if (release_lock) {
3250 qemu_mutex_unlock_iothread();
3251 release_lock = false;
3254 len -= l;
3255 buf += l;
3256 addr += l;
3258 if (!len) {
3259 break;
3262 l = len;
3263 mr = flatview_translate(fv, addr, &addr1, &l, false, attrs);
3266 return result;
3269 /* Called from RCU critical section. */
3270 static MemTxResult flatview_read(FlatView *fv, hwaddr addr,
3271 MemTxAttrs attrs, void *buf, hwaddr len)
3273 hwaddr l;
3274 hwaddr addr1;
3275 MemoryRegion *mr;
3277 l = len;
3278 mr = flatview_translate(fv, addr, &addr1, &l, false, attrs);
3279 return flatview_read_continue(fv, addr, attrs, buf, len,
3280 addr1, l, mr);
3283 MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
3284 MemTxAttrs attrs, void *buf, hwaddr len)
3286 MemTxResult result = MEMTX_OK;
3287 FlatView *fv;
3289 if (len > 0) {
3290 RCU_READ_LOCK_GUARD();
3291 fv = address_space_to_flatview(as);
3292 result = flatview_read(fv, addr, attrs, buf, len);
3295 return result;
3298 MemTxResult address_space_write(AddressSpace *as, hwaddr addr,
3299 MemTxAttrs attrs,
3300 const void *buf, hwaddr len)
3302 MemTxResult result = MEMTX_OK;
3303 FlatView *fv;
3305 if (len > 0) {
3306 RCU_READ_LOCK_GUARD();
3307 fv = address_space_to_flatview(as);
3308 result = flatview_write(fv, addr, attrs, buf, len);
3311 return result;
3314 MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
3315 void *buf, hwaddr len, bool is_write)
3317 if (is_write) {
3318 return address_space_write(as, addr, attrs, buf, len);
3319 } else {
3320 return address_space_read_full(as, addr, attrs, buf, len);
3324 void cpu_physical_memory_rw(hwaddr addr, void *buf,
3325 hwaddr len, bool is_write)
3327 address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
3328 buf, len, is_write);
3331 enum write_rom_type {
3332 WRITE_DATA,
3333 FLUSH_CACHE,
3336 static inline MemTxResult address_space_write_rom_internal(AddressSpace *as,
3337 hwaddr addr,
3338 MemTxAttrs attrs,
3339 const void *ptr,
3340 hwaddr len,
3341 enum write_rom_type type)
3343 hwaddr l;
3344 uint8_t *ram_ptr;
3345 hwaddr addr1;
3346 MemoryRegion *mr;
3347 const uint8_t *buf = ptr;
3349 RCU_READ_LOCK_GUARD();
3350 while (len > 0) {
3351 l = len;
3352 mr = address_space_translate(as, addr, &addr1, &l, true, attrs);
3354 if (!(memory_region_is_ram(mr) ||
3355 memory_region_is_romd(mr))) {
3356 l = memory_access_size(mr, l, addr1);
3357 } else {
3358 /* ROM/RAM case */
3359 ram_ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
3360 switch (type) {
3361 case WRITE_DATA:
3362 memcpy(ram_ptr, buf, l);
3363 invalidate_and_set_dirty(mr, addr1, l);
3364 break;
3365 case FLUSH_CACHE:
3366 flush_icache_range((uintptr_t)ram_ptr, (uintptr_t)ram_ptr + l);
3367 break;
3370 len -= l;
3371 buf += l;
3372 addr += l;
3374 return MEMTX_OK;
3377 /* used for ROM loading : can write in RAM and ROM */
3378 MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr,
3379 MemTxAttrs attrs,
3380 const void *buf, hwaddr len)
3382 return address_space_write_rom_internal(as, addr, attrs,
3383 buf, len, WRITE_DATA);
3386 void cpu_flush_icache_range(hwaddr start, hwaddr len)
3389 * This function should do the same thing as an icache flush that was
3390 * triggered from within the guest. For TCG we are always cache coherent,
3391 * so there is no need to flush anything. For KVM / Xen we need to flush
3392 * the host's instruction cache at least.
3394 if (tcg_enabled()) {
3395 return;
3398 address_space_write_rom_internal(&address_space_memory,
3399 start, MEMTXATTRS_UNSPECIFIED,
3400 NULL, len, FLUSH_CACHE);
3403 typedef struct {
3404 MemoryRegion *mr;
3405 void *buffer;
3406 hwaddr addr;
3407 hwaddr len;
3408 bool in_use;
3409 } BounceBuffer;
3411 static BounceBuffer bounce;
3413 typedef struct MapClient {
3414 QEMUBH *bh;
3415 QLIST_ENTRY(MapClient) link;
3416 } MapClient;
3418 QemuMutex map_client_list_lock;
3419 static QLIST_HEAD(, MapClient) map_client_list
3420 = QLIST_HEAD_INITIALIZER(map_client_list);
3422 static void cpu_unregister_map_client_do(MapClient *client)
3424 QLIST_REMOVE(client, link);
3425 g_free(client);
3428 static void cpu_notify_map_clients_locked(void)
3430 MapClient *client;
3432 while (!QLIST_EMPTY(&map_client_list)) {
3433 client = QLIST_FIRST(&map_client_list);
3434 qemu_bh_schedule(client->bh);
3435 cpu_unregister_map_client_do(client);
3439 void cpu_register_map_client(QEMUBH *bh)
3441 MapClient *client = g_malloc(sizeof(*client));
3443 qemu_mutex_lock(&map_client_list_lock);
3444 client->bh = bh;
3445 QLIST_INSERT_HEAD(&map_client_list, client, link);
3446 if (!qatomic_read(&bounce.in_use)) {
3447 cpu_notify_map_clients_locked();
3449 qemu_mutex_unlock(&map_client_list_lock);
3452 void cpu_exec_init_all(void)
3454 qemu_mutex_init(&ram_list.mutex);
3455 /* The data structures we set up here depend on knowing the page size,
3456 * so no more changes can be made after this point.
3457 * In an ideal world, nothing we did before we had finished the
3458 * machine setup would care about the target page size, and we could
3459 * do this much later, rather than requiring board models to state
3460 * up front what their requirements are.
3462 finalize_target_page_bits();
3463 io_mem_init();
3464 memory_map_init();
3465 qemu_mutex_init(&map_client_list_lock);
3468 void cpu_unregister_map_client(QEMUBH *bh)
3470 MapClient *client;
3472 qemu_mutex_lock(&map_client_list_lock);
3473 QLIST_FOREACH(client, &map_client_list, link) {
3474 if (client->bh == bh) {
3475 cpu_unregister_map_client_do(client);
3476 break;
3479 qemu_mutex_unlock(&map_client_list_lock);
3482 static void cpu_notify_map_clients(void)
3484 qemu_mutex_lock(&map_client_list_lock);
3485 cpu_notify_map_clients_locked();
3486 qemu_mutex_unlock(&map_client_list_lock);
3489 static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len,
3490 bool is_write, MemTxAttrs attrs)
3492 MemoryRegion *mr;
3493 hwaddr l, xlat;
3495 while (len > 0) {
3496 l = len;
3497 mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs);
3498 if (!memory_access_is_direct(mr, is_write)) {
3499 l = memory_access_size(mr, l, addr);
3500 if (!memory_region_access_valid(mr, xlat, l, is_write, attrs)) {
3501 return false;
3505 len -= l;
3506 addr += l;
3508 return true;
3511 bool address_space_access_valid(AddressSpace *as, hwaddr addr,
3512 hwaddr len, bool is_write,
3513 MemTxAttrs attrs)
3515 FlatView *fv;
3516 bool result;
3518 RCU_READ_LOCK_GUARD();
3519 fv = address_space_to_flatview(as);
3520 result = flatview_access_valid(fv, addr, len, is_write, attrs);
3521 return result;
3524 static hwaddr
3525 flatview_extend_translation(FlatView *fv, hwaddr addr,
3526 hwaddr target_len,
3527 MemoryRegion *mr, hwaddr base, hwaddr len,
3528 bool is_write, MemTxAttrs attrs)
3530 hwaddr done = 0;
3531 hwaddr xlat;
3532 MemoryRegion *this_mr;
3534 for (;;) {
3535 target_len -= len;
3536 addr += len;
3537 done += len;
3538 if (target_len == 0) {
3539 return done;
3542 len = target_len;
3543 this_mr = flatview_translate(fv, addr, &xlat,
3544 &len, is_write, attrs);
3545 if (this_mr != mr || xlat != base + done) {
3546 return done;
3551 /* Map a physical memory region into a host virtual address.
3552 * May map a subset of the requested range, given by and returned in *plen.
3553 * May return NULL if resources needed to perform the mapping are exhausted.
3554 * Use only for reads OR writes - not for read-modify-write operations.
3555 * Use cpu_register_map_client() to know when retrying the map operation is
3556 * likely to succeed.
3558 void *address_space_map(AddressSpace *as,
3559 hwaddr addr,
3560 hwaddr *plen,
3561 bool is_write,
3562 MemTxAttrs attrs)
3564 hwaddr len = *plen;
3565 hwaddr l, xlat;
3566 MemoryRegion *mr;
3567 void *ptr;
3568 FlatView *fv;
3570 if (len == 0) {
3571 return NULL;
3574 l = len;
3575 RCU_READ_LOCK_GUARD();
3576 fv = address_space_to_flatview(as);
3577 mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs);
3579 if (!memory_access_is_direct(mr, is_write)) {
3580 if (qatomic_xchg(&bounce.in_use, true)) {
3581 *plen = 0;
3582 return NULL;
3584 /* Avoid unbounded allocations */
3585 l = MIN(l, TARGET_PAGE_SIZE);
3586 bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, l);
3587 bounce.addr = addr;
3588 bounce.len = l;
3590 memory_region_ref(mr);
3591 bounce.mr = mr;
3592 if (!is_write) {
3593 flatview_read(fv, addr, MEMTXATTRS_UNSPECIFIED,
3594 bounce.buffer, l);
3597 *plen = l;
3598 return bounce.buffer;
3602 memory_region_ref(mr);
3603 *plen = flatview_extend_translation(fv, addr, len, mr, xlat,
3604 l, is_write, attrs);
3605 ptr = qemu_ram_ptr_length(mr->ram_block, xlat, plen, true);
3607 return ptr;
3610 /* Unmaps a memory region previously mapped by address_space_map().
3611 * Will also mark the memory as dirty if is_write is true. access_len gives
3612 * the amount of memory that was actually read or written by the caller.
3614 void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
3615 bool is_write, hwaddr access_len)
3617 if (buffer != bounce.buffer) {
3618 MemoryRegion *mr;
3619 ram_addr_t addr1;
3621 mr = memory_region_from_host(buffer, &addr1);
3622 assert(mr != NULL);
3623 if (is_write) {
3624 invalidate_and_set_dirty(mr, addr1, access_len);
3626 if (xen_enabled()) {
3627 xen_invalidate_map_cache_entry(buffer);
3629 memory_region_unref(mr);
3630 return;
3632 if (is_write) {
3633 address_space_write(as, bounce.addr, MEMTXATTRS_UNSPECIFIED,
3634 bounce.buffer, access_len);
3636 qemu_vfree(bounce.buffer);
3637 bounce.buffer = NULL;
3638 memory_region_unref(bounce.mr);
3639 qatomic_mb_set(&bounce.in_use, false);
3640 cpu_notify_map_clients();
3643 void *cpu_physical_memory_map(hwaddr addr,
3644 hwaddr *plen,
3645 bool is_write)
3647 return address_space_map(&address_space_memory, addr, plen, is_write,
3648 MEMTXATTRS_UNSPECIFIED);
3651 void cpu_physical_memory_unmap(void *buffer, hwaddr len,
3652 bool is_write, hwaddr access_len)
3654 return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len);
3657 #define ARG1_DECL AddressSpace *as
3658 #define ARG1 as
3659 #define SUFFIX
3660 #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3661 #define RCU_READ_LOCK(...) rcu_read_lock()
3662 #define RCU_READ_UNLOCK(...) rcu_read_unlock()
3663 #include "memory_ldst.c.inc"
3665 int64_t address_space_cache_init(MemoryRegionCache *cache,
3666 AddressSpace *as,
3667 hwaddr addr,
3668 hwaddr len,
3669 bool is_write)
3671 AddressSpaceDispatch *d;
3672 hwaddr l;
3673 MemoryRegion *mr;
3675 assert(len > 0);
3677 l = len;
3678 cache->fv = address_space_get_flatview(as);
3679 d = flatview_to_dispatch(cache->fv);
3680 cache->mrs = *address_space_translate_internal(d, addr, &cache->xlat, &l, true);
3682 mr = cache->mrs.mr;
3683 memory_region_ref(mr);
3684 if (memory_access_is_direct(mr, is_write)) {
3685 /* We don't care about the memory attributes here as we're only
3686 * doing this if we found actual RAM, which behaves the same
3687 * regardless of attributes; so UNSPECIFIED is fine.
3689 l = flatview_extend_translation(cache->fv, addr, len, mr,
3690 cache->xlat, l, is_write,
3691 MEMTXATTRS_UNSPECIFIED);
3692 cache->ptr = qemu_ram_ptr_length(mr->ram_block, cache->xlat, &l, true);
3693 } else {
3694 cache->ptr = NULL;
3697 cache->len = l;
3698 cache->is_write = is_write;
3699 return l;
3702 void address_space_cache_invalidate(MemoryRegionCache *cache,
3703 hwaddr addr,
3704 hwaddr access_len)
3706 assert(cache->is_write);
3707 if (likely(cache->ptr)) {
3708 invalidate_and_set_dirty(cache->mrs.mr, addr + cache->xlat, access_len);
3712 void address_space_cache_destroy(MemoryRegionCache *cache)
3714 if (!cache->mrs.mr) {
3715 return;
3718 if (xen_enabled()) {
3719 xen_invalidate_map_cache_entry(cache->ptr);
3721 memory_region_unref(cache->mrs.mr);
3722 flatview_unref(cache->fv);
3723 cache->mrs.mr = NULL;
3724 cache->fv = NULL;
3727 /* Called from RCU critical section. This function has the same
3728 * semantics as address_space_translate, but it only works on a
3729 * predefined range of a MemoryRegion that was mapped with
3730 * address_space_cache_init.
3732 static inline MemoryRegion *address_space_translate_cached(
3733 MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat,
3734 hwaddr *plen, bool is_write, MemTxAttrs attrs)
3736 MemoryRegionSection section;
3737 MemoryRegion *mr;
3738 IOMMUMemoryRegion *iommu_mr;
3739 AddressSpace *target_as;
3741 assert(!cache->ptr);
3742 *xlat = addr + cache->xlat;
3744 mr = cache->mrs.mr;
3745 iommu_mr = memory_region_get_iommu(mr);
3746 if (!iommu_mr) {
3747 /* MMIO region. */
3748 return mr;
3751 section = address_space_translate_iommu(iommu_mr, xlat, plen,
3752 NULL, is_write, true,
3753 &target_as, attrs);
3754 return section.mr;
3757 /* Called from RCU critical section. address_space_read_cached uses this
3758 * out of line function when the target is an MMIO or IOMMU region.
3760 MemTxResult
3761 address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr,
3762 void *buf, hwaddr len)
3764 hwaddr addr1, l;
3765 MemoryRegion *mr;
3767 l = len;
3768 mr = address_space_translate_cached(cache, addr, &addr1, &l, false,
3769 MEMTXATTRS_UNSPECIFIED);
3770 return flatview_read_continue(cache->fv,
3771 addr, MEMTXATTRS_UNSPECIFIED, buf, len,
3772 addr1, l, mr);
3775 /* Called from RCU critical section. address_space_write_cached uses this
3776 * out of line function when the target is an MMIO or IOMMU region.
3778 MemTxResult
3779 address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr,
3780 const void *buf, hwaddr len)
3782 hwaddr addr1, l;
3783 MemoryRegion *mr;
3785 l = len;
3786 mr = address_space_translate_cached(cache, addr, &addr1, &l, true,
3787 MEMTXATTRS_UNSPECIFIED);
3788 return flatview_write_continue(cache->fv,
3789 addr, MEMTXATTRS_UNSPECIFIED, buf, len,
3790 addr1, l, mr);
3793 #define ARG1_DECL MemoryRegionCache *cache
3794 #define ARG1 cache
3795 #define SUFFIX _cached_slow
3796 #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
3797 #define RCU_READ_LOCK() ((void)0)
3798 #define RCU_READ_UNLOCK() ((void)0)
3799 #include "memory_ldst.c.inc"
3801 /* virtual memory access for debug (includes writing to ROM) */
3802 int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
3803 void *ptr, target_ulong len, bool is_write)
3805 hwaddr phys_addr;
3806 target_ulong l, page;
3807 uint8_t *buf = ptr;
3809 cpu_synchronize_state(cpu);
3810 while (len > 0) {
3811 int asidx;
3812 MemTxAttrs attrs;
3813 MemTxResult res;
3815 page = addr & TARGET_PAGE_MASK;
3816 phys_addr = cpu_get_phys_page_attrs_debug(cpu, page, &attrs);
3817 asidx = cpu_asidx_from_attrs(cpu, attrs);
3818 /* if no physical page mapped, return an error */
3819 if (phys_addr == -1)
3820 return -1;
3821 l = (page + TARGET_PAGE_SIZE) - addr;
3822 if (l > len)
3823 l = len;
3824 phys_addr += (addr & ~TARGET_PAGE_MASK);
3825 if (is_write) {
3826 res = address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr,
3827 attrs, buf, l);
3828 } else {
3829 res = address_space_read(cpu->cpu_ases[asidx].as, phys_addr,
3830 attrs, buf, l);
3832 if (res != MEMTX_OK) {
3833 return -1;
3835 len -= l;
3836 buf += l;
3837 addr += l;
3839 return 0;
3843 * Allows code that needs to deal with migration bitmaps etc to still be built
3844 * target independent.
3846 size_t qemu_target_page_size(void)
3848 return TARGET_PAGE_SIZE;
3851 int qemu_target_page_bits(void)
3853 return TARGET_PAGE_BITS;
3856 int qemu_target_page_bits_min(void)
3858 return TARGET_PAGE_BITS_MIN;
3860 #endif
3862 bool target_words_bigendian(void)
3864 #if defined(TARGET_WORDS_BIGENDIAN)
3865 return true;
3866 #else
3867 return false;
3868 #endif
3871 #ifndef CONFIG_USER_ONLY
3872 bool cpu_physical_memory_is_io(hwaddr phys_addr)
3874 MemoryRegion*mr;
3875 hwaddr l = 1;
3876 bool res;
3878 RCU_READ_LOCK_GUARD();
3879 mr = address_space_translate(&address_space_memory,
3880 phys_addr, &phys_addr, &l, false,
3881 MEMTXATTRS_UNSPECIFIED);
3883 res = !(memory_region_is_ram(mr) || memory_region_is_romd(mr));
3884 return res;
3887 int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque)
3889 RAMBlock *block;
3890 int ret = 0;
3892 RCU_READ_LOCK_GUARD();
3893 RAMBLOCK_FOREACH(block) {
3894 ret = func(block, opaque);
3895 if (ret) {
3896 break;
3899 return ret;
3903 * Unmap pages of memory from start to start+length such that
3904 * they a) read as 0, b) Trigger whatever fault mechanism
3905 * the OS provides for postcopy.
3906 * The pages must be unmapped by the end of the function.
3907 * Returns: 0 on success, none-0 on failure
3910 int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length)
3912 int ret = -1;
3914 uint8_t *host_startaddr = rb->host + start;
3916 if (!QEMU_PTR_IS_ALIGNED(host_startaddr, rb->page_size)) {
3917 error_report("ram_block_discard_range: Unaligned start address: %p",
3918 host_startaddr);
3919 goto err;
3922 if ((start + length) <= rb->used_length) {
3923 bool need_madvise, need_fallocate;
3924 if (!QEMU_IS_ALIGNED(length, rb->page_size)) {
3925 error_report("ram_block_discard_range: Unaligned length: %zx",
3926 length);
3927 goto err;
3930 errno = ENOTSUP; /* If we are missing MADVISE etc */
3932 /* The logic here is messy;
3933 * madvise DONTNEED fails for hugepages
3934 * fallocate works on hugepages and shmem
3936 need_madvise = (rb->page_size == qemu_host_page_size);
3937 need_fallocate = rb->fd != -1;
3938 if (need_fallocate) {
3939 /* For a file, this causes the area of the file to be zero'd
3940 * if read, and for hugetlbfs also causes it to be unmapped
3941 * so a userfault will trigger.
3943 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3944 ret = fallocate(rb->fd, FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE,
3945 start, length);
3946 if (ret) {
3947 ret = -errno;
3948 error_report("ram_block_discard_range: Failed to fallocate "
3949 "%s:%" PRIx64 " +%zx (%d)",
3950 rb->idstr, start, length, ret);
3951 goto err;
3953 #else
3954 ret = -ENOSYS;
3955 error_report("ram_block_discard_range: fallocate not available/file"
3956 "%s:%" PRIx64 " +%zx (%d)",
3957 rb->idstr, start, length, ret);
3958 goto err;
3959 #endif
3961 if (need_madvise) {
3962 /* For normal RAM this causes it to be unmapped,
3963 * for shared memory it causes the local mapping to disappear
3964 * and to fall back on the file contents (which we just
3965 * fallocate'd away).
3967 #if defined(CONFIG_MADVISE)
3968 ret = madvise(host_startaddr, length, MADV_DONTNEED);
3969 if (ret) {
3970 ret = -errno;
3971 error_report("ram_block_discard_range: Failed to discard range "
3972 "%s:%" PRIx64 " +%zx (%d)",
3973 rb->idstr, start, length, ret);
3974 goto err;
3976 #else
3977 ret = -ENOSYS;
3978 error_report("ram_block_discard_range: MADVISE not available"
3979 "%s:%" PRIx64 " +%zx (%d)",
3980 rb->idstr, start, length, ret);
3981 goto err;
3982 #endif
3984 trace_ram_block_discard_range(rb->idstr, host_startaddr, length,
3985 need_madvise, need_fallocate, ret);
3986 } else {
3987 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
3988 "/%zx/" RAM_ADDR_FMT")",
3989 rb->idstr, start, length, rb->used_length);
3992 err:
3993 return ret;
3996 bool ramblock_is_pmem(RAMBlock *rb)
3998 return rb->flags & RAM_PMEM;
4001 #endif
4003 void page_size_init(void)
4005 /* NOTE: we can always suppose that qemu_host_page_size >=
4006 TARGET_PAGE_SIZE */
4007 if (qemu_host_page_size == 0) {
4008 qemu_host_page_size = qemu_real_host_page_size;
4010 if (qemu_host_page_size < TARGET_PAGE_SIZE) {
4011 qemu_host_page_size = TARGET_PAGE_SIZE;
4013 qemu_host_page_mask = -(intptr_t)qemu_host_page_size;
4016 #if !defined(CONFIG_USER_ONLY)
4018 static void mtree_print_phys_entries(int start, int end, int skip, int ptr)
4020 if (start == end - 1) {
4021 qemu_printf("\t%3d ", start);
4022 } else {
4023 qemu_printf("\t%3d..%-3d ", start, end - 1);
4025 qemu_printf(" skip=%d ", skip);
4026 if (ptr == PHYS_MAP_NODE_NIL) {
4027 qemu_printf(" ptr=NIL");
4028 } else if (!skip) {
4029 qemu_printf(" ptr=#%d", ptr);
4030 } else {
4031 qemu_printf(" ptr=[%d]", ptr);
4033 qemu_printf("\n");
4036 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
4037 int128_sub((size), int128_one())) : 0)
4039 void mtree_print_dispatch(AddressSpaceDispatch *d, MemoryRegion *root)
4041 int i;
4043 qemu_printf(" Dispatch\n");
4044 qemu_printf(" Physical sections\n");
4046 for (i = 0; i < d->map.sections_nb; ++i) {
4047 MemoryRegionSection *s = d->map.sections + i;
4048 const char *names[] = { " [unassigned]", " [not dirty]",
4049 " [ROM]", " [watch]" };
4051 qemu_printf(" #%d @" TARGET_FMT_plx ".." TARGET_FMT_plx
4052 " %s%s%s%s%s",
4054 s->offset_within_address_space,
4055 s->offset_within_address_space + MR_SIZE(s->mr->size),
4056 s->mr->name ? s->mr->name : "(noname)",
4057 i < ARRAY_SIZE(names) ? names[i] : "",
4058 s->mr == root ? " [ROOT]" : "",
4059 s == d->mru_section ? " [MRU]" : "",
4060 s->mr->is_iommu ? " [iommu]" : "");
4062 if (s->mr->alias) {
4063 qemu_printf(" alias=%s", s->mr->alias->name ?
4064 s->mr->alias->name : "noname");
4066 qemu_printf("\n");
4069 qemu_printf(" Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
4070 P_L2_BITS, P_L2_LEVELS, d->phys_map.ptr, d->phys_map.skip);
4071 for (i = 0; i < d->map.nodes_nb; ++i) {
4072 int j, jprev;
4073 PhysPageEntry prev;
4074 Node *n = d->map.nodes + i;
4076 qemu_printf(" [%d]\n", i);
4078 for (j = 0, jprev = 0, prev = *n[0]; j < ARRAY_SIZE(*n); ++j) {
4079 PhysPageEntry *pe = *n + j;
4081 if (pe->ptr == prev.ptr && pe->skip == prev.skip) {
4082 continue;
4085 mtree_print_phys_entries(jprev, j, prev.skip, prev.ptr);
4087 jprev = j;
4088 prev = *pe;
4091 if (jprev != ARRAY_SIZE(*n)) {
4092 mtree_print_phys_entries(jprev, j, prev.skip, prev.ptr);
4098 * If positive, discarding RAM is disabled. If negative, discarding RAM is
4099 * required to work and cannot be disabled.
4101 static int ram_block_discard_disabled;
4103 int ram_block_discard_disable(bool state)
4105 int old;
4107 if (!state) {
4108 qatomic_dec(&ram_block_discard_disabled);
4109 return 0;
4112 do {
4113 old = qatomic_read(&ram_block_discard_disabled);
4114 if (old < 0) {
4115 return -EBUSY;
4117 } while (qatomic_cmpxchg(&ram_block_discard_disabled,
4118 old, old + 1) != old);
4119 return 0;
4122 int ram_block_discard_require(bool state)
4124 int old;
4126 if (!state) {
4127 qatomic_inc(&ram_block_discard_disabled);
4128 return 0;
4131 do {
4132 old = qatomic_read(&ram_block_discard_disabled);
4133 if (old > 0) {
4134 return -EBUSY;
4136 } while (qatomic_cmpxchg(&ram_block_discard_disabled,
4137 old, old - 1) != old);
4138 return 0;
4141 bool ram_block_discard_is_disabled(void)
4143 return qatomic_read(&ram_block_discard_disabled) > 0;
4146 bool ram_block_discard_is_required(void)
4148 return qatomic_read(&ram_block_discard_disabled) < 0;
4151 #endif