2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
30 #include "vmware_vga.h"
33 #include "hpet_emul.h"
37 #include "multiboot.h"
38 #include "mc146818rtc.h"
47 #include "hw/block-common.h"
48 #include "ui/qemu-spice.h"
50 #include "exec-memory.h"
51 #include "arch_init.h"
54 /* output Bochs bios info messages */
57 /* debug PC/ISA interrupts */
61 #define DPRINTF(fmt, ...) \
62 do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
64 #define DPRINTF(fmt, ...)
67 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
68 #define ACPI_DATA_SIZE 0x10000
69 #define BIOS_CFG_IOPORT 0x510
70 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
71 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
72 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
73 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
74 #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
76 #define MSI_ADDR_BASE 0xfee00000
78 #define E820_NR_ENTRIES 16
84 } QEMU_PACKED
__attribute((__aligned__(4)));
88 struct e820_entry entry
[E820_NR_ENTRIES
];
89 } QEMU_PACKED
__attribute((__aligned__(4)));
91 static struct e820_table e820_table
;
92 struct hpet_fw_config hpet_cfg
= {.count
= UINT8_MAX
};
94 void gsi_handler(void *opaque
, int n
, int level
)
98 DPRINTF("pc: %s GSI %d\n", level
? "raising" : "lowering", n
);
99 if (n
< ISA_NUM_IRQS
) {
100 qemu_set_irq(s
->i8259_irq
[n
], level
);
102 qemu_set_irq(s
->ioapic_irq
[n
], level
);
105 static void ioport80_write(void *opaque
, uint32_t addr
, uint32_t data
)
109 /* MSDOS compatibility mode FPU exception support */
110 static qemu_irq ferr_irq
;
112 void pc_register_ferr_irq(qemu_irq irq
)
117 /* XXX: add IGNNE support */
118 void cpu_set_ferr(CPUX86State
*s
)
120 qemu_irq_raise(ferr_irq
);
123 static void ioportF0_write(void *opaque
, uint32_t addr
, uint32_t data
)
125 qemu_irq_lower(ferr_irq
);
129 uint64_t cpu_get_tsc(CPUX86State
*env
)
131 return cpu_get_ticks();
136 static cpu_set_smm_t smm_set
;
137 static void *smm_arg
;
139 void cpu_smm_register(cpu_set_smm_t callback
, void *arg
)
141 assert(smm_set
== NULL
);
142 assert(smm_arg
== NULL
);
147 void cpu_smm_update(CPUX86State
*env
)
149 if (smm_set
&& smm_arg
&& env
== first_cpu
)
150 smm_set(!!(env
->hflags
& HF_SMM_MASK
), smm_arg
);
155 int cpu_get_pic_interrupt(CPUX86State
*env
)
159 intno
= apic_get_interrupt(env
->apic_state
);
163 /* read the irq from the PIC */
164 if (!apic_accept_pic_intr(env
->apic_state
)) {
168 intno
= pic_read_irq(isa_pic
);
172 static void pic_irq_request(void *opaque
, int irq
, int level
)
174 CPUX86State
*env
= first_cpu
;
176 DPRINTF("pic_irqs: %s irq %d\n", level
? "raise" : "lower", irq
);
177 if (env
->apic_state
) {
179 if (apic_accept_pic_intr(env
->apic_state
)) {
180 apic_deliver_pic_intr(env
->apic_state
, level
);
186 cpu_interrupt(env
, CPU_INTERRUPT_HARD
);
188 cpu_reset_interrupt(env
, CPU_INTERRUPT_HARD
);
192 /* PC cmos mappings */
194 #define REG_EQUIPMENT_BYTE 0x14
196 static int cmos_get_fd_drive_type(FDriveType fd0
)
202 /* 1.44 Mb 3"5 drive */
206 /* 2.88 Mb 3"5 drive */
210 /* 1.2 Mb 5"5 drive */
213 case FDRIVE_DRV_NONE
:
221 static void cmos_init_hd(ISADevice
*s
, int type_ofs
, int info_ofs
,
222 int16_t cylinders
, int8_t heads
, int8_t sectors
)
224 rtc_set_memory(s
, type_ofs
, 47);
225 rtc_set_memory(s
, info_ofs
, cylinders
);
226 rtc_set_memory(s
, info_ofs
+ 1, cylinders
>> 8);
227 rtc_set_memory(s
, info_ofs
+ 2, heads
);
228 rtc_set_memory(s
, info_ofs
+ 3, 0xff);
229 rtc_set_memory(s
, info_ofs
+ 4, 0xff);
230 rtc_set_memory(s
, info_ofs
+ 5, 0xc0 | ((heads
> 8) << 3));
231 rtc_set_memory(s
, info_ofs
+ 6, cylinders
);
232 rtc_set_memory(s
, info_ofs
+ 7, cylinders
>> 8);
233 rtc_set_memory(s
, info_ofs
+ 8, sectors
);
236 /* convert boot_device letter to something recognizable by the bios */
237 static int boot_device2nibble(char boot_device
)
239 switch(boot_device
) {
242 return 0x01; /* floppy boot */
244 return 0x02; /* hard drive boot */
246 return 0x03; /* CD-ROM boot */
248 return 0x04; /* Network boot */
253 static int set_boot_dev(ISADevice
*s
, const char *boot_device
, int fd_bootchk
)
255 #define PC_MAX_BOOT_DEVICES 3
256 int nbds
, bds
[3] = { 0, };
259 nbds
= strlen(boot_device
);
260 if (nbds
> PC_MAX_BOOT_DEVICES
) {
261 error_report("Too many boot devices for PC");
264 for (i
= 0; i
< nbds
; i
++) {
265 bds
[i
] = boot_device2nibble(boot_device
[i
]);
267 error_report("Invalid boot device for PC: '%c'",
272 rtc_set_memory(s
, 0x3d, (bds
[1] << 4) | bds
[0]);
273 rtc_set_memory(s
, 0x38, (bds
[2] << 4) | (fd_bootchk
? 0x0 : 0x1));
277 static int pc_boot_set(void *opaque
, const char *boot_device
)
279 return set_boot_dev(opaque
, boot_device
, 0);
282 typedef struct pc_cmos_init_late_arg
{
283 ISADevice
*rtc_state
;
285 } pc_cmos_init_late_arg
;
287 static void pc_cmos_init_late(void *opaque
)
289 pc_cmos_init_late_arg
*arg
= opaque
;
290 ISADevice
*s
= arg
->rtc_state
;
292 int8_t heads
, sectors
;
297 if (ide_get_geometry(arg
->idebus
[0], 0,
298 &cylinders
, &heads
, §ors
) >= 0) {
299 cmos_init_hd(s
, 0x19, 0x1b, cylinders
, heads
, sectors
);
302 if (ide_get_geometry(arg
->idebus
[0], 1,
303 &cylinders
, &heads
, §ors
) >= 0) {
304 cmos_init_hd(s
, 0x1a, 0x24, cylinders
, heads
, sectors
);
307 rtc_set_memory(s
, 0x12, val
);
310 for (i
= 0; i
< 4; i
++) {
311 /* NOTE: ide_get_geometry() returns the physical
312 geometry. It is always such that: 1 <= sects <= 63, 1
313 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
314 geometry can be different if a translation is done. */
315 if (ide_get_geometry(arg
->idebus
[i
/ 2], i
% 2,
316 &cylinders
, &heads
, §ors
) >= 0) {
317 trans
= ide_get_bios_chs_trans(arg
->idebus
[i
/ 2], i
% 2) - 1;
318 assert((trans
& ~3) == 0);
319 val
|= trans
<< (i
* 2);
322 rtc_set_memory(s
, 0x39, val
);
324 qemu_unregister_reset(pc_cmos_init_late
, opaque
);
327 void pc_cmos_init(ram_addr_t ram_size
, ram_addr_t above_4g_mem_size
,
328 const char *boot_device
,
329 ISADevice
*floppy
, BusState
*idebus0
, BusState
*idebus1
,
333 FDriveType fd_type
[2] = { FDRIVE_DRV_NONE
, FDRIVE_DRV_NONE
};
334 static pc_cmos_init_late_arg arg
;
336 /* various important CMOS locations needed by PC/Bochs bios */
339 val
= 640; /* base memory in K */
340 rtc_set_memory(s
, 0x15, val
);
341 rtc_set_memory(s
, 0x16, val
>> 8);
343 val
= (ram_size
/ 1024) - 1024;
346 rtc_set_memory(s
, 0x17, val
);
347 rtc_set_memory(s
, 0x18, val
>> 8);
348 rtc_set_memory(s
, 0x30, val
);
349 rtc_set_memory(s
, 0x31, val
>> 8);
351 if (above_4g_mem_size
) {
352 rtc_set_memory(s
, 0x5b, (unsigned int)above_4g_mem_size
>> 16);
353 rtc_set_memory(s
, 0x5c, (unsigned int)above_4g_mem_size
>> 24);
354 rtc_set_memory(s
, 0x5d, (uint64_t)above_4g_mem_size
>> 32);
357 if (ram_size
> (16 * 1024 * 1024))
358 val
= (ram_size
/ 65536) - ((16 * 1024 * 1024) / 65536);
363 rtc_set_memory(s
, 0x34, val
);
364 rtc_set_memory(s
, 0x35, val
>> 8);
366 /* set the number of CPU */
367 rtc_set_memory(s
, 0x5f, smp_cpus
- 1);
369 /* set boot devices, and disable floppy signature check if requested */
370 if (set_boot_dev(s
, boot_device
, fd_bootchk
)) {
376 for (i
= 0; i
< 2; i
++) {
377 fd_type
[i
] = isa_fdc_get_drive_type(floppy
, i
);
380 val
= (cmos_get_fd_drive_type(fd_type
[0]) << 4) |
381 cmos_get_fd_drive_type(fd_type
[1]);
382 rtc_set_memory(s
, 0x10, val
);
386 if (fd_type
[0] < FDRIVE_DRV_NONE
) {
389 if (fd_type
[1] < FDRIVE_DRV_NONE
) {
396 val
|= 0x01; /* 1 drive, ready for boot */
399 val
|= 0x41; /* 2 drives, ready for boot */
402 val
|= 0x02; /* FPU is there */
403 val
|= 0x04; /* PS/2 mouse installed */
404 rtc_set_memory(s
, REG_EQUIPMENT_BYTE
, val
);
408 arg
.idebus
[0] = idebus0
;
409 arg
.idebus
[1] = idebus1
;
410 qemu_register_reset(pc_cmos_init_late
, &arg
);
413 /* port 92 stuff: could be split off */
414 typedef struct Port92State
{
421 static void port92_write(void *opaque
, uint32_t addr
, uint32_t val
)
423 Port92State
*s
= opaque
;
425 DPRINTF("port92: write 0x%02x\n", val
);
427 qemu_set_irq(*s
->a20_out
, (val
>> 1) & 1);
429 qemu_system_reset_request();
433 static uint32_t port92_read(void *opaque
, uint32_t addr
)
435 Port92State
*s
= opaque
;
439 DPRINTF("port92: read 0x%02x\n", ret
);
443 static void port92_init(ISADevice
*dev
, qemu_irq
*a20_out
)
445 Port92State
*s
= DO_UPCAST(Port92State
, dev
, dev
);
447 s
->a20_out
= a20_out
;
450 static const VMStateDescription vmstate_port92_isa
= {
453 .minimum_version_id
= 1,
454 .minimum_version_id_old
= 1,
455 .fields
= (VMStateField
[]) {
456 VMSTATE_UINT8(outport
, Port92State
),
457 VMSTATE_END_OF_LIST()
461 static void port92_reset(DeviceState
*d
)
463 Port92State
*s
= container_of(d
, Port92State
, dev
.qdev
);
468 static const MemoryRegionPortio port92_portio
[] = {
469 { 0, 1, 1, .read
= port92_read
, .write
= port92_write
},
470 PORTIO_END_OF_LIST(),
473 static const MemoryRegionOps port92_ops
= {
474 .old_portio
= port92_portio
477 static int port92_initfn(ISADevice
*dev
)
479 Port92State
*s
= DO_UPCAST(Port92State
, dev
, dev
);
481 memory_region_init_io(&s
->io
, &port92_ops
, s
, "port92", 1);
482 isa_register_ioport(dev
, &s
->io
, 0x92);
488 static void port92_class_initfn(ObjectClass
*klass
, void *data
)
490 DeviceClass
*dc
= DEVICE_CLASS(klass
);
491 ISADeviceClass
*ic
= ISA_DEVICE_CLASS(klass
);
492 ic
->init
= port92_initfn
;
494 dc
->reset
= port92_reset
;
495 dc
->vmsd
= &vmstate_port92_isa
;
498 static TypeInfo port92_info
= {
500 .parent
= TYPE_ISA_DEVICE
,
501 .instance_size
= sizeof(Port92State
),
502 .class_init
= port92_class_initfn
,
505 static void port92_register_types(void)
507 type_register_static(&port92_info
);
510 type_init(port92_register_types
)
512 static void handle_a20_line_change(void *opaque
, int irq
, int level
)
514 CPUX86State
*cpu
= opaque
;
516 /* XXX: send to all CPUs ? */
517 /* XXX: add logic to handle multiple A20 line sources */
518 cpu_x86_set_a20(cpu
, level
);
521 /***********************************************************/
522 /* Bochs BIOS debug ports */
524 static void bochs_bios_write(void *opaque
, uint32_t addr
, uint32_t val
)
526 static const char shutdown_str
[8] = "Shutdown";
527 static int shutdown_index
= 0;
530 /* Bochs BIOS messages */
533 /* used to be panic, now unused */
538 fprintf(stderr
, "%c", val
);
542 /* same as Bochs power off */
543 if (val
== shutdown_str
[shutdown_index
]) {
545 if (shutdown_index
== 8) {
547 qemu_system_shutdown_request();
554 /* LGPL'ed VGA BIOS messages */
557 exit((val
<< 1) | 1);
561 fprintf(stderr
, "%c", val
);
567 int e820_add_entry(uint64_t address
, uint64_t length
, uint32_t type
)
569 int index
= le32_to_cpu(e820_table
.count
);
570 struct e820_entry
*entry
;
572 if (index
>= E820_NR_ENTRIES
)
574 entry
= &e820_table
.entry
[index
++];
576 entry
->address
= cpu_to_le64(address
);
577 entry
->length
= cpu_to_le64(length
);
578 entry
->type
= cpu_to_le32(type
);
580 e820_table
.count
= cpu_to_le32(index
);
584 static void *bochs_bios_init(void)
587 uint8_t *smbios_table
;
589 uint64_t *numa_fw_cfg
;
592 register_ioport_write(0x400, 1, 2, bochs_bios_write
, NULL
);
593 register_ioport_write(0x401, 1, 2, bochs_bios_write
, NULL
);
594 register_ioport_write(0x402, 1, 1, bochs_bios_write
, NULL
);
595 register_ioport_write(0x403, 1, 1, bochs_bios_write
, NULL
);
596 register_ioport_write(0x8900, 1, 1, bochs_bios_write
, NULL
);
598 register_ioport_write(0x501, 1, 1, bochs_bios_write
, NULL
);
599 register_ioport_write(0x501, 1, 2, bochs_bios_write
, NULL
);
600 register_ioport_write(0x502, 1, 2, bochs_bios_write
, NULL
);
601 register_ioport_write(0x500, 1, 1, bochs_bios_write
, NULL
);
602 register_ioport_write(0x503, 1, 1, bochs_bios_write
, NULL
);
604 fw_cfg
= fw_cfg_init(BIOS_CFG_IOPORT
, BIOS_CFG_IOPORT
+ 1, 0, 0);
606 fw_cfg_add_i32(fw_cfg
, FW_CFG_ID
, 1);
607 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
608 fw_cfg_add_bytes(fw_cfg
, FW_CFG_ACPI_TABLES
, (uint8_t *)acpi_tables
,
610 fw_cfg_add_i32(fw_cfg
, FW_CFG_IRQ0_OVERRIDE
, kvm_allows_irq0_override());
612 smbios_table
= smbios_get_table(&smbios_len
);
614 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SMBIOS_ENTRIES
,
615 smbios_table
, smbios_len
);
616 fw_cfg_add_bytes(fw_cfg
, FW_CFG_E820_TABLE
, (uint8_t *)&e820_table
,
617 sizeof(struct e820_table
));
619 fw_cfg_add_bytes(fw_cfg
, FW_CFG_HPET
, (uint8_t *)&hpet_cfg
,
620 sizeof(struct hpet_fw_config
));
621 /* allocate memory for the NUMA channel: one (64bit) word for the number
622 * of nodes, one word for each VCPU->node and one word for each node to
623 * hold the amount of memory.
625 numa_fw_cfg
= g_malloc0((1 + max_cpus
+ nb_numa_nodes
) * 8);
626 numa_fw_cfg
[0] = cpu_to_le64(nb_numa_nodes
);
627 for (i
= 0; i
< max_cpus
; i
++) {
628 for (j
= 0; j
< nb_numa_nodes
; j
++) {
629 if (test_bit(i
, node_cpumask
[j
])) {
630 numa_fw_cfg
[i
+ 1] = cpu_to_le64(j
);
635 for (i
= 0; i
< nb_numa_nodes
; i
++) {
636 numa_fw_cfg
[max_cpus
+ 1 + i
] = cpu_to_le64(node_mem
[i
]);
638 fw_cfg_add_bytes(fw_cfg
, FW_CFG_NUMA
, (uint8_t *)numa_fw_cfg
,
639 (1 + max_cpus
+ nb_numa_nodes
) * 8);
644 static long get_file_size(FILE *f
)
648 /* XXX: on Unix systems, using fstat() probably makes more sense */
651 fseek(f
, 0, SEEK_END
);
653 fseek(f
, where
, SEEK_SET
);
658 static void load_linux(void *fw_cfg
,
659 const char *kernel_filename
,
660 const char *initrd_filename
,
661 const char *kernel_cmdline
,
662 target_phys_addr_t max_ram_size
)
665 int setup_size
, kernel_size
, initrd_size
= 0, cmdline_size
;
667 uint8_t header
[8192], *setup
, *kernel
, *initrd_data
;
668 target_phys_addr_t real_addr
, prot_addr
, cmdline_addr
, initrd_addr
= 0;
672 /* Align to 16 bytes as a paranoia measure */
673 cmdline_size
= (strlen(kernel_cmdline
)+16) & ~15;
675 /* load the kernel header */
676 f
= fopen(kernel_filename
, "rb");
677 if (!f
|| !(kernel_size
= get_file_size(f
)) ||
678 fread(header
, 1, MIN(ARRAY_SIZE(header
), kernel_size
), f
) !=
679 MIN(ARRAY_SIZE(header
), kernel_size
)) {
680 fprintf(stderr
, "qemu: could not load kernel '%s': %s\n",
681 kernel_filename
, strerror(errno
));
685 /* kernel protocol version */
687 fprintf(stderr
, "header magic: %#x\n", ldl_p(header
+0x202));
689 if (ldl_p(header
+0x202) == 0x53726448)
690 protocol
= lduw_p(header
+0x206);
692 /* This looks like a multiboot kernel. If it is, let's stop
693 treating it like a Linux kernel. */
694 if (load_multiboot(fw_cfg
, f
, kernel_filename
, initrd_filename
,
695 kernel_cmdline
, kernel_size
, header
))
700 if (protocol
< 0x200 || !(header
[0x211] & 0x01)) {
703 cmdline_addr
= 0x9a000 - cmdline_size
;
705 } else if (protocol
< 0x202) {
706 /* High but ancient kernel */
708 cmdline_addr
= 0x9a000 - cmdline_size
;
709 prot_addr
= 0x100000;
711 /* High and recent kernel */
713 cmdline_addr
= 0x20000;
714 prot_addr
= 0x100000;
719 "qemu: real_addr = 0x" TARGET_FMT_plx
"\n"
720 "qemu: cmdline_addr = 0x" TARGET_FMT_plx
"\n"
721 "qemu: prot_addr = 0x" TARGET_FMT_plx
"\n",
727 /* highest address for loading the initrd */
728 if (protocol
>= 0x203)
729 initrd_max
= ldl_p(header
+0x22c);
731 initrd_max
= 0x37ffffff;
733 if (initrd_max
>= max_ram_size
-ACPI_DATA_SIZE
)
734 initrd_max
= max_ram_size
-ACPI_DATA_SIZE
-1;
736 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_ADDR
, cmdline_addr
);
737 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
, strlen(kernel_cmdline
)+1);
738 fw_cfg_add_bytes(fw_cfg
, FW_CFG_CMDLINE_DATA
,
739 (uint8_t*)strdup(kernel_cmdline
),
740 strlen(kernel_cmdline
)+1);
742 if (protocol
>= 0x202) {
743 stl_p(header
+0x228, cmdline_addr
);
745 stw_p(header
+0x20, 0xA33F);
746 stw_p(header
+0x22, cmdline_addr
-real_addr
);
749 /* handle vga= parameter */
750 vmode
= strstr(kernel_cmdline
, "vga=");
752 unsigned int video_mode
;
755 if (!strncmp(vmode
, "normal", 6)) {
757 } else if (!strncmp(vmode
, "ext", 3)) {
759 } else if (!strncmp(vmode
, "ask", 3)) {
762 video_mode
= strtol(vmode
, NULL
, 0);
764 stw_p(header
+0x1fa, video_mode
);
768 /* High nybble = B reserved for QEMU; low nybble is revision number.
769 If this code is substantially changed, you may want to consider
770 incrementing the revision. */
771 if (protocol
>= 0x200)
772 header
[0x210] = 0xB0;
775 if (protocol
>= 0x201) {
776 header
[0x211] |= 0x80; /* CAN_USE_HEAP */
777 stw_p(header
+0x224, cmdline_addr
-real_addr
-0x200);
781 if (initrd_filename
) {
782 if (protocol
< 0x200) {
783 fprintf(stderr
, "qemu: linux kernel too old to load a ram disk\n");
787 initrd_size
= get_image_size(initrd_filename
);
788 if (initrd_size
< 0) {
789 fprintf(stderr
, "qemu: error reading initrd %s\n",
794 initrd_addr
= (initrd_max
-initrd_size
) & ~4095;
796 initrd_data
= g_malloc(initrd_size
);
797 load_image(initrd_filename
, initrd_data
);
799 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
800 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
801 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
, initrd_size
);
803 stl_p(header
+0x218, initrd_addr
);
804 stl_p(header
+0x21c, initrd_size
);
807 /* load kernel and setup */
808 setup_size
= header
[0x1f1];
811 setup_size
= (setup_size
+1)*512;
812 kernel_size
-= setup_size
;
814 setup
= g_malloc(setup_size
);
815 kernel
= g_malloc(kernel_size
);
816 fseek(f
, 0, SEEK_SET
);
817 if (fread(setup
, 1, setup_size
, f
) != setup_size
) {
818 fprintf(stderr
, "fread() failed\n");
821 if (fread(kernel
, 1, kernel_size
, f
) != kernel_size
) {
822 fprintf(stderr
, "fread() failed\n");
826 memcpy(setup
, header
, MIN(sizeof(header
), setup_size
));
828 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, prot_addr
);
829 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
830 fw_cfg_add_bytes(fw_cfg
, FW_CFG_KERNEL_DATA
, kernel
, kernel_size
);
832 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_ADDR
, real_addr
);
833 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, setup_size
);
834 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
, setup
, setup_size
);
836 option_rom
[nb_option_roms
].name
= "linuxboot.bin";
837 option_rom
[nb_option_roms
].bootindex
= 0;
841 #define NE2000_NB_MAX 6
843 static const int ne2000_io
[NE2000_NB_MAX
] = { 0x300, 0x320, 0x340, 0x360,
845 static const int ne2000_irq
[NE2000_NB_MAX
] = { 9, 10, 11, 3, 4, 5 };
847 static const int parallel_io
[MAX_PARALLEL_PORTS
] = { 0x378, 0x278, 0x3bc };
848 static const int parallel_irq
[MAX_PARALLEL_PORTS
] = { 7, 7, 7 };
850 void pc_init_ne2k_isa(ISABus
*bus
, NICInfo
*nd
)
852 static int nb_ne2k
= 0;
854 if (nb_ne2k
== NE2000_NB_MAX
)
856 isa_ne2000_init(bus
, ne2000_io
[nb_ne2k
],
857 ne2000_irq
[nb_ne2k
], nd
);
861 DeviceState
*cpu_get_current_apic(void)
863 if (cpu_single_env
) {
864 return cpu_single_env
->apic_state
;
870 static DeviceState
*apic_init(void *env
, uint8_t apic_id
)
873 static int apic_mapped
;
875 if (kvm_irqchip_in_kernel()) {
876 dev
= qdev_create(NULL
, "kvm-apic");
877 } else if (xen_enabled()) {
878 dev
= qdev_create(NULL
, "xen-apic");
880 dev
= qdev_create(NULL
, "apic");
883 qdev_prop_set_uint8(dev
, "id", apic_id
);
884 qdev_prop_set_ptr(dev
, "cpu_env", env
);
885 qdev_init_nofail(dev
);
887 /* XXX: mapping more APICs at the same memory location */
888 if (apic_mapped
== 0) {
889 /* NOTE: the APIC is directly connected to the CPU - it is not
890 on the global memory bus. */
891 /* XXX: what if the base changes? */
892 sysbus_mmio_map(sysbus_from_qdev(dev
), 0, MSI_ADDR_BASE
);
899 void pc_acpi_smi_interrupt(void *opaque
, int irq
, int level
)
901 CPUX86State
*s
= opaque
;
904 cpu_interrupt(s
, CPU_INTERRUPT_SMI
);
908 static X86CPU
*pc_new_cpu(const char *cpu_model
)
913 cpu
= cpu_x86_init(cpu_model
);
915 fprintf(stderr
, "Unable to find x86 CPU definition\n");
919 if ((env
->cpuid_features
& CPUID_APIC
) || smp_cpus
> 1) {
920 env
->apic_state
= apic_init(env
, env
->cpuid_apic_id
);
926 void pc_cpus_init(const char *cpu_model
)
931 if (cpu_model
== NULL
) {
933 cpu_model
= "qemu64";
935 cpu_model
= "qemu32";
939 for(i
= 0; i
< smp_cpus
; i
++) {
940 pc_new_cpu(cpu_model
);
944 void *pc_memory_init(MemoryRegion
*system_memory
,
945 const char *kernel_filename
,
946 const char *kernel_cmdline
,
947 const char *initrd_filename
,
948 ram_addr_t below_4g_mem_size
,
949 ram_addr_t above_4g_mem_size
,
950 MemoryRegion
*rom_memory
,
951 MemoryRegion
**ram_memory
)
954 MemoryRegion
*ram
, *option_rom_mr
;
955 MemoryRegion
*ram_below_4g
, *ram_above_4g
;
958 linux_boot
= (kernel_filename
!= NULL
);
960 /* Allocate RAM. We allocate it as a single memory region and use
961 * aliases to address portions of it, mostly for backwards compatibility
962 * with older qemus that used qemu_ram_alloc().
964 ram
= g_malloc(sizeof(*ram
));
965 memory_region_init_ram(ram
, "pc.ram",
966 below_4g_mem_size
+ above_4g_mem_size
);
967 vmstate_register_ram_global(ram
);
969 ram_below_4g
= g_malloc(sizeof(*ram_below_4g
));
970 memory_region_init_alias(ram_below_4g
, "ram-below-4g", ram
,
971 0, below_4g_mem_size
);
972 memory_region_add_subregion(system_memory
, 0, ram_below_4g
);
973 if (above_4g_mem_size
> 0) {
974 ram_above_4g
= g_malloc(sizeof(*ram_above_4g
));
975 memory_region_init_alias(ram_above_4g
, "ram-above-4g", ram
,
976 below_4g_mem_size
, above_4g_mem_size
);
977 memory_region_add_subregion(system_memory
, 0x100000000ULL
,
982 /* Initialize PC system firmware */
983 pc_system_firmware_init(rom_memory
);
985 option_rom_mr
= g_malloc(sizeof(*option_rom_mr
));
986 memory_region_init_ram(option_rom_mr
, "pc.rom", PC_ROM_SIZE
);
987 vmstate_register_ram_global(option_rom_mr
);
988 memory_region_add_subregion_overlap(rom_memory
,
993 fw_cfg
= bochs_bios_init();
997 load_linux(fw_cfg
, kernel_filename
, initrd_filename
, kernel_cmdline
, below_4g_mem_size
);
1000 for (i
= 0; i
< nb_option_roms
; i
++) {
1001 rom_add_option(option_rom
[i
].name
, option_rom
[i
].bootindex
);
1006 qemu_irq
*pc_allocate_cpu_irq(void)
1008 return qemu_allocate_irqs(pic_irq_request
, NULL
, 1);
1011 DeviceState
*pc_vga_init(ISABus
*isa_bus
, PCIBus
*pci_bus
)
1013 DeviceState
*dev
= NULL
;
1015 if (cirrus_vga_enabled
) {
1017 dev
= pci_cirrus_vga_init(pci_bus
);
1019 dev
= &isa_create_simple(isa_bus
, "isa-cirrus-vga")->qdev
;
1021 } else if (vmsvga_enabled
) {
1023 dev
= pci_vmsvga_init(pci_bus
);
1025 fprintf(stderr
, "%s: vmware_vga: no PCI bus\n", __FUNCTION__
);
1028 } else if (qxl_enabled
) {
1030 dev
= &pci_create_simple(pci_bus
, -1, "qxl-vga")->qdev
;
1032 fprintf(stderr
, "%s: qxl: no PCI bus\n", __FUNCTION__
);
1035 } else if (std_vga_enabled
) {
1037 dev
= pci_vga_init(pci_bus
);
1039 dev
= isa_vga_init(isa_bus
);
1046 static void cpu_request_exit(void *opaque
, int irq
, int level
)
1048 CPUX86State
*env
= cpu_single_env
;
1055 void pc_basic_device_init(ISABus
*isa_bus
, qemu_irq
*gsi
,
1056 ISADevice
**rtc_state
,
1061 DriveInfo
*fd
[MAX_FD
];
1062 DeviceState
*hpet
= NULL
;
1063 int pit_isa_irq
= 0;
1064 qemu_irq pit_alt_irq
= NULL
;
1065 qemu_irq rtc_irq
= NULL
;
1067 ISADevice
*i8042
, *port92
, *vmmouse
, *pit
= NULL
;
1068 qemu_irq
*cpu_exit_irq
;
1070 register_ioport_write(0x80, 1, 1, ioport80_write
, NULL
);
1072 register_ioport_write(0xf0, 1, 1, ioportF0_write
, NULL
);
1075 * Check if an HPET shall be created.
1077 * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT
1078 * when the HPET wants to take over. Thus we have to disable the latter.
1080 if (!no_hpet
&& (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
1081 hpet
= sysbus_try_create_simple("hpet", HPET_BASE
, NULL
);
1084 for (i
= 0; i
< GSI_NUM_PINS
; i
++) {
1085 sysbus_connect_irq(sysbus_from_qdev(hpet
), i
, gsi
[i
]);
1088 pit_alt_irq
= qdev_get_gpio_in(hpet
, HPET_LEGACY_PIT_INT
);
1089 rtc_irq
= qdev_get_gpio_in(hpet
, HPET_LEGACY_RTC_INT
);
1092 *rtc_state
= rtc_init(isa_bus
, 2000, rtc_irq
);
1094 qemu_register_boot_set(pc_boot_set
, *rtc_state
);
1096 if (!xen_enabled()) {
1097 if (kvm_irqchip_in_kernel()) {
1098 pit
= kvm_pit_init(isa_bus
, 0x40);
1100 pit
= pit_init(isa_bus
, 0x40, pit_isa_irq
, pit_alt_irq
);
1103 /* connect PIT to output control line of the HPET */
1104 qdev_connect_gpio_out(hpet
, 0, qdev_get_gpio_in(&pit
->qdev
, 0));
1106 pcspk_init(isa_bus
, pit
);
1109 for(i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1110 if (serial_hds
[i
]) {
1111 serial_isa_init(isa_bus
, i
, serial_hds
[i
]);
1115 for(i
= 0; i
< MAX_PARALLEL_PORTS
; i
++) {
1116 if (parallel_hds
[i
]) {
1117 parallel_init(isa_bus
, i
, parallel_hds
[i
]);
1121 a20_line
= qemu_allocate_irqs(handle_a20_line_change
, first_cpu
, 2);
1122 i8042
= isa_create_simple(isa_bus
, "i8042");
1123 i8042_setup_a20_line(i8042
, &a20_line
[0]);
1125 vmport_init(isa_bus
);
1126 vmmouse
= isa_try_create(isa_bus
, "vmmouse");
1131 qdev_prop_set_ptr(&vmmouse
->qdev
, "ps2_mouse", i8042
);
1132 qdev_init_nofail(&vmmouse
->qdev
);
1134 port92
= isa_create_simple(isa_bus
, "port92");
1135 port92_init(port92
, &a20_line
[1]);
1137 cpu_exit_irq
= qemu_allocate_irqs(cpu_request_exit
, NULL
, 1);
1138 DMA_init(0, cpu_exit_irq
);
1140 for(i
= 0; i
< MAX_FD
; i
++) {
1141 fd
[i
] = drive_get(IF_FLOPPY
, 0, i
);
1143 *floppy
= fdctrl_init_isa(isa_bus
, fd
);
1146 void pc_pci_device_init(PCIBus
*pci_bus
)
1151 max_bus
= drive_get_max_bus(IF_SCSI
);
1152 for (bus
= 0; bus
<= max_bus
; bus
++) {
1153 pci_create_simple(pci_bus
, -1, "lsi53c895a");