target/unicore32/ucf64_helper.c

   1 /*
   2  * UniCore-F64 simulation helpers for QEMU.
   3  *
   4  * Copyright (C) 2010-2012 Guan Xuetao
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation, or any later version.
   9  * See the COPYING file in the top-level directory.
  10  */
  11 #include "qemu/osdep.h"
  12 #include "cpu.h"
  13 #include "exec/helper-proto.h"
  14 #include "fpu/softfloat.h"
  15
  16 /*
  17  * The convention used for UniCore-F64 instructions:
  18  *  Single precition routines have a "s" suffix
  19  *  Double precision routines have a "d" suffix.
  20  */
  21
  22 /* Convert host exception flags to f64 form.  */
  23 static inline int ucf64_exceptbits_from_host(int host_bits)
  24 {
  25     int target_bits = 0;
  26
  27     if (host_bits & float_flag_invalid) {
  28         target_bits |= UCF64_FPSCR_FLAG_INVALID;
  29     }
  30     if (host_bits & float_flag_divbyzero) {
  31         target_bits |= UCF64_FPSCR_FLAG_DIVZERO;
  32     }
  33     if (host_bits & float_flag_overflow) {
  34         target_bits |= UCF64_FPSCR_FLAG_OVERFLOW;
  35     }
  36     if (host_bits & float_flag_underflow) {
  37         target_bits |= UCF64_FPSCR_FLAG_UNDERFLOW;
  38     }
  39     if (host_bits & float_flag_inexact) {
  40         target_bits |= UCF64_FPSCR_FLAG_INEXACT;
  41     }
  42     return target_bits;
  43 }
  44
  45 uint32_t HELPER(ucf64_get_fpscr)(CPUUniCore32State *env)
  46 {
  47     int i;
  48     uint32_t fpscr;
  49
  50     fpscr = (env->ucf64.xregs[UC32_UCF64_FPSCR] & UCF64_FPSCR_MASK);
  51     i = get_float_exception_flags(&env->ucf64.fp_status);
  52     fpscr |= ucf64_exceptbits_from_host(i);
  53     return fpscr;
  54 }
  55
  56 /* Convert ucf64 exception flags to target form.  */
  57 static inline int ucf64_exceptbits_to_host(int target_bits)
  58 {
  59     int host_bits = 0;
  60
  61     if (target_bits & UCF64_FPSCR_FLAG_INVALID) {
  62         host_bits |= float_flag_invalid;
  63     }
  64     if (target_bits & UCF64_FPSCR_FLAG_DIVZERO) {
  65         host_bits |= float_flag_divbyzero;
  66     }
  67     if (target_bits & UCF64_FPSCR_FLAG_OVERFLOW) {
  68         host_bits |= float_flag_overflow;
  69     }
  70     if (target_bits & UCF64_FPSCR_FLAG_UNDERFLOW) {
  71         host_bits |= float_flag_underflow;
  72     }
  73     if (target_bits & UCF64_FPSCR_FLAG_INEXACT) {
  74         host_bits |= float_flag_inexact;
  75     }
  76     return host_bits;
  77 }
  78
  79 void HELPER(ucf64_set_fpscr)(CPUUniCore32State *env, uint32_t val)
  80 {
  81     UniCore32CPU *cpu = env_archcpu(env);
  82     int i;
  83     uint32_t changed;
  84
  85     changed = env->ucf64.xregs[UC32_UCF64_FPSCR];
  86     env->ucf64.xregs[UC32_UCF64_FPSCR] = (val & UCF64_FPSCR_MASK);
  87
  88     changed ^= val;
  89     if (changed & (UCF64_FPSCR_RND_MASK)) {
  90         i = UCF64_FPSCR_RND(val);
  91         switch (i) {
  92         case 0:
  93             i = float_round_nearest_even;
  94             break;
  95         case 1:
  96             i = float_round_to_zero;
  97             break;
  98         case 2:
  99             i = float_round_up;
 100             break;
 101         case 3:
 102             i = float_round_down;
 103             break;
 104         default: /* 100 and 101 not implement */
 105             cpu_abort(CPU(cpu), "Unsupported UniCore-F64 round mode");
 106         }
 107         set_float_rounding_mode(i, &env->ucf64.fp_status);
 108     }
 109
 110     i = ucf64_exceptbits_to_host(UCF64_FPSCR_TRAPEN(val));
 111     set_float_exception_flags(i, &env->ucf64.fp_status);
 112 }
 113
 114 float32 HELPER(ucf64_adds)(float32 a, float32 b, CPUUniCore32State *env)
 115 {
 116     return float32_add(a, b, &env->ucf64.fp_status);
 117 }
 118
 119 float64 HELPER(ucf64_addd)(float64 a, float64 b, CPUUniCore32State *env)
 120 {
 121     return float64_add(a, b, &env->ucf64.fp_status);
 122 }
 123
 124 float32 HELPER(ucf64_subs)(float32 a, float32 b, CPUUniCore32State *env)
 125 {
 126     return float32_sub(a, b, &env->ucf64.fp_status);
 127 }
 128
 129 float64 HELPER(ucf64_subd)(float64 a, float64 b, CPUUniCore32State *env)
 130 {
 131     return float64_sub(a, b, &env->ucf64.fp_status);
 132 }
 133
 134 float32 HELPER(ucf64_muls)(float32 a, float32 b, CPUUniCore32State *env)
 135 {
 136     return float32_mul(a, b, &env->ucf64.fp_status);
 137 }
 138
 139 float64 HELPER(ucf64_muld)(float64 a, float64 b, CPUUniCore32State *env)
 140 {
 141     return float64_mul(a, b, &env->ucf64.fp_status);
 142 }
 143
 144 float32 HELPER(ucf64_divs)(float32 a, float32 b, CPUUniCore32State *env)
 145 {
 146     return float32_div(a, b, &env->ucf64.fp_status);
 147 }
 148
 149 float64 HELPER(ucf64_divd)(float64 a, float64 b, CPUUniCore32State *env)
 150 {
 151     return float64_div(a, b, &env->ucf64.fp_status);
 152 }
 153
 154 float32 HELPER(ucf64_negs)(float32 a)
 155 {
 156     return float32_chs(a);
 157 }
 158
 159 float64 HELPER(ucf64_negd)(float64 a)
 160 {
 161     return float64_chs(a);
 162 }
 163
 164 float32 HELPER(ucf64_abss)(float32 a)
 165 {
 166     return float32_abs(a);
 167 }
 168
 169 float64 HELPER(ucf64_absd)(float64 a)
 170 {
 171     return float64_abs(a);
 172 }
 173
 174 void HELPER(ucf64_cmps)(float32 a, float32 b, uint32_t c,
 175         CPUUniCore32State *env)
 176 {
 177     FloatRelation flag = float32_compare_quiet(a, b, &env->ucf64.fp_status);
 178     env->CF = 0;
 179     switch (c & 0x7) {
 180     case 0: /* F */
 181         break;
 182     case 1: /* UN */
 183         if (flag == 2) {
 184             env->CF = 1;
 185         }
 186         break;
 187     case 2: /* EQ */
 188         if (flag == 0) {
 189             env->CF = 1;
 190         }
 191         break;
 192     case 3: /* UEQ */
 193         if ((flag == 0) || (flag == 2)) {
 194             env->CF = 1;
 195         }
 196         break;
 197     case 4: /* OLT */
 198         if (flag == -1) {
 199             env->CF = 1;
 200         }
 201         break;
 202     case 5: /* ULT */
 203         if ((flag == -1) || (flag == 2)) {
 204             env->CF = 1;
 205         }
 206         break;
 207     case 6: /* OLE */
 208         if ((flag == -1) || (flag == 0)) {
 209             env->CF = 1;
 210         }
 211         break;
 212     case 7: /* ULE */
 213         if (flag != 1) {
 214             env->CF = 1;
 215         }
 216         break;
 217     }
 218     env->ucf64.xregs[UC32_UCF64_FPSCR] = (env->CF << 29)
 219                     | (env->ucf64.xregs[UC32_UCF64_FPSCR] & 0x0fffffff);
 220 }
 221
 222 void HELPER(ucf64_cmpd)(float64 a, float64 b, uint32_t c,
 223         CPUUniCore32State *env)
 224 {
 225     FloatRelation flag = float64_compare_quiet(a, b, &env->ucf64.fp_status);
 226     env->CF = 0;
 227     switch (c & 0x7) {
 228     case 0: /* F */
 229         break;
 230     case 1: /* UN */
 231         if (flag == 2) {
 232             env->CF = 1;
 233         }
 234         break;
 235     case 2: /* EQ */
 236         if (flag == 0) {
 237             env->CF = 1;
 238         }
 239         break;
 240     case 3: /* UEQ */
 241         if ((flag == 0) || (flag == 2)) {
 242             env->CF = 1;
 243         }
 244         break;
 245     case 4: /* OLT */
 246         if (flag == -1) {
 247             env->CF = 1;
 248         }
 249         break;
 250     case 5: /* ULT */
 251         if ((flag == -1) || (flag == 2)) {
 252             env->CF = 1;
 253         }
 254         break;
 255     case 6: /* OLE */
 256         if ((flag == -1) || (flag == 0)) {
 257             env->CF = 1;
 258         }
 259         break;
 260     case 7: /* ULE */
 261         if (flag != 1) {
 262             env->CF = 1;
 263         }
 264         break;
 265     }
 266     env->ucf64.xregs[UC32_UCF64_FPSCR] = (env->CF << 29)
 267                     | (env->ucf64.xregs[UC32_UCF64_FPSCR] & 0x0fffffff);
 268 }
 269
 270 /* Helper routines to perform bitwise copies between float and int.  */
 271 static inline float32 ucf64_itos(uint32_t i)
 272 {
 273     union {
 274         uint32_t i;
 275         float32 s;
 276     } v;
 277
 278     v.i = i;
 279     return v.s;
 280 }
 281
 282 static inline uint32_t ucf64_stoi(float32 s)
 283 {
 284     union {
 285         uint32_t i;
 286         float32 s;
 287     } v;
 288
 289     v.s = s;
 290     return v.i;
 291 }
 292
 293 /* Integer to float conversion.  */
 294 float32 HELPER(ucf64_si2sf)(float32 x, CPUUniCore32State *env)
 295 {
 296     return int32_to_float32(ucf64_stoi(x), &env->ucf64.fp_status);
 297 }
 298
 299 float64 HELPER(ucf64_si2df)(float32 x, CPUUniCore32State *env)
 300 {
 301     return int32_to_float64(ucf64_stoi(x), &env->ucf64.fp_status);
 302 }
 303
 304 /* Float to integer conversion.  */
 305 float32 HELPER(ucf64_sf2si)(float32 x, CPUUniCore32State *env)
 306 {
 307     return ucf64_itos(float32_to_int32(x, &env->ucf64.fp_status));
 308 }
 309
 310 float32 HELPER(ucf64_df2si)(float64 x, CPUUniCore32State *env)
 311 {
 312     return ucf64_itos(float64_to_int32(x, &env->ucf64.fp_status));
 313 }
 314
 315 /* floating point conversion */
 316 float64 HELPER(ucf64_sf2df)(float32 x, CPUUniCore32State *env)
 317 {
 318     return float32_to_float64(x, &env->ucf64.fp_status);
 319 }
 320
 321 float32 HELPER(ucf64_df2sf)(float64 x, CPUUniCore32State *env)
 322 {
 323     return float64_to_float32(x, &env->ucf64.fp_status);
 324 }