hw/timer/sse-timer: Model the SSE Subsystem System Timer
[qemu/ar7.git] / target / i386 / tcg / helper-tcg.h
blobc133c63555e70ef1a597b017c3d70ca0a8cdb8cd
1 /*
2 * TCG specific prototypes for helpers
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #ifndef I386_HELPER_TCG_H
21 #define I386_HELPER_TCG_H
23 #include "exec/exec-all.h"
25 /* Maximum instruction code size */
26 #define TARGET_MAX_INSN_SIZE 16
29 * XXX: This value should match the one returned by CPUID
30 * and in exec.c
32 # if defined(TARGET_X86_64)
33 # define TCG_PHYS_ADDR_BITS 40
34 # else
35 # define TCG_PHYS_ADDR_BITS 36
36 # endif
38 #define PHYS_ADDR_MASK MAKE_64BIT_MASK(0, TCG_PHYS_ADDR_BITS)
40 /**
41 * x86_cpu_do_interrupt:
42 * @cpu: vCPU the interrupt is to be handled by.
44 void x86_cpu_do_interrupt(CPUState *cpu);
45 bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req);
47 /* helper.c */
48 bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
49 MMUAccessType access_type, int mmu_idx,
50 bool probe, uintptr_t retaddr);
52 void breakpoint_handler(CPUState *cs);
54 /* n must be a constant to be efficient */
55 static inline target_long lshift(target_long x, int n)
57 if (n >= 0) {
58 return x << n;
59 } else {
60 return x >> (-n);
64 /* translate.c */
65 void tcg_x86_init(void);
67 /* excp_helper.c */
68 void QEMU_NORETURN raise_exception(CPUX86State *env, int exception_index);
69 void QEMU_NORETURN raise_exception_ra(CPUX86State *env, int exception_index,
70 uintptr_t retaddr);
71 void QEMU_NORETURN raise_exception_err(CPUX86State *env, int exception_index,
72 int error_code);
73 void QEMU_NORETURN raise_exception_err_ra(CPUX86State *env, int exception_index,
74 int error_code, uintptr_t retaddr);
75 void QEMU_NORETURN raise_interrupt(CPUX86State *nenv, int intno, int is_int,
76 int error_code, int next_eip_addend);
78 /* cc_helper.c */
79 extern const uint8_t parity_table[256];
81 /* misc_helper.c */
82 void cpu_load_eflags(CPUX86State *env, int eflags, int update_mask);
84 /* svm_helper.c */
85 void QEMU_NORETURN cpu_vmexit(CPUX86State *nenv, uint32_t exit_code,
86 uint64_t exit_info_1, uintptr_t retaddr);
87 void do_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1);
89 /* seg_helper.c */
90 void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw);
92 /* smm_helper.c */
93 void do_smm_enter(X86CPU *cpu);
95 #endif /* I386_HELPER_TCG_H */