hw/timer/sse-timer: Model the SSE Subsystem System Timer
[qemu/ar7.git] / include / hw / timer / sse-timer.h
blobb4ee8e7f6c40b7198a56b14d500a2cd959d5c4f7
1 /*
2 * Arm SSE Subsystem System Timer
4 * Copyright (c) 2020 Linaro Limited
5 * Written by Peter Maydell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 or
9 * (at your option) any later version.
13 * This is a model of the "System timer" which is documented in
14 * the Arm SSE-123 Example Subsystem Technical Reference Manual:
15 * https://developer.arm.com/documentation/101370/latest/
17 * QEMU interface:
18 * + QOM property "counter": link property to be set to the
19 * TYPE_SSE_COUNTER timestamp counter device this timer runs off
20 * + sysbus MMIO region 0: the register bank
21 * + sysbus IRQ 0: timer interrupt
24 #ifndef SSE_TIMER_H
25 #define SSE_TIMER_H
27 #include "hw/sysbus.h"
28 #include "qom/object.h"
29 #include "hw/timer/sse-counter.h"
31 #define TYPE_SSE_TIMER "sse-timer"
32 OBJECT_DECLARE_SIMPLE_TYPE(SSETimer, SSE_TIMER)
34 struct SSETimer {
35 /*< private >*/
36 SysBusDevice parent_obj;
38 /*< public >*/
39 MemoryRegion iomem;
40 qemu_irq irq;
41 SSECounter *counter;
42 QEMUTimer timer;
43 Notifier counter_notifier;
45 uint32_t cntfrq;
46 uint32_t cntp_ctl;
47 uint64_t cntp_cval;
48 uint64_t cntp_aival;
49 uint32_t cntp_aival_ctl;
50 uint32_t cntp_aival_reload;
53 #endif