include/hw/timer/avr_timer16.h

   1 /*
   2  * AVR 16-bit timer
   3  *
   4  * Copyright (c) 2018 University of Kent
   5  * Author: Ed Robbins
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2.1 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see
  19  * <http://www.gnu.org/licenses/lgpl-2.1.html>
  20  */
  21
  22 /*
  23  * Driver for 16 bit timers on 8 bit AVR devices.
  24  * Note:
  25  * On ATmega640/V-1280/V-1281/V-2560/V-2561/V timers 1, 3, 4 and 5 are 16 bit
  26  */
  27
  28 #ifndef HW_TIMER_AVR_TIMER16_H
  29 #define HW_TIMER_AVR_TIMER16_H
  30
  31 #include "hw/sysbus.h"
  32 #include "qemu/timer.h"
  33 #include "hw/hw.h"
  34 #include "qom/object.h"
  35
  36 enum NextInterrupt {
  37     OVERFLOW,
  38     COMPA,
  39     COMPB,
  40     COMPC,
  41     CAPT
  42 };
  43
  44 #define TYPE_AVR_TIMER16 "avr-timer16"
  45 OBJECT_DECLARE_SIMPLE_TYPE(AVRTimer16State, AVR_TIMER16)
  46
  47 struct AVRTimer16State {
  48     /* <private> */
  49     SysBusDevice parent_obj;
  50
  51     /* <public> */
  52     MemoryRegion iomem;
  53     MemoryRegion imsk_iomem;
  54     MemoryRegion ifr_iomem;
  55     QEMUTimer *timer;
  56     qemu_irq capt_irq;
  57     qemu_irq compa_irq;
  58     qemu_irq compb_irq;
  59     qemu_irq compc_irq;
  60     qemu_irq ovf_irq;
  61
  62     bool enabled;
  63
  64     /* registers */
  65     uint8_t cra;
  66     uint8_t crb;
  67     uint8_t crc;
  68     uint8_t cntl;
  69     uint8_t cnth;
  70     uint8_t icrl;
  71     uint8_t icrh;
  72     uint8_t ocral;
  73     uint8_t ocrah;
  74     uint8_t ocrbl;
  75     uint8_t ocrbh;
  76     uint8_t ocrcl;
  77     uint8_t ocrch;
  78     /*
  79      * Reads and writes to CNT and ICR utilise a bizarre temporary
  80      * register, which we emulate
  81      */
  82     uint8_t rtmp;
  83     uint8_t imsk;
  84     uint8_t ifr;
  85
  86     uint8_t id;
  87     uint64_t cpu_freq_hz;
  88     uint64_t freq_hz;
  89     uint64_t period_ns;
  90     uint64_t reset_time_ns;
  91     enum NextInterrupt next_interrupt;
  92 };
  93
  94 #endif /* HW_TIMER_AVR_TIMER16_H */