4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
20 #include "qemu-version.h"
21 #include <sys/syscall.h>
22 #include <sys/resource.h>
24 #include "qapi/error.h"
26 #include "qemu/path.h"
27 #include "qemu/config-file.h"
28 #include "qemu/cutils.h"
29 #include "qemu/help_option.h"
31 #include "exec/exec-all.h"
33 #include "qemu/timer.h"
34 #include "qemu/envlist.h"
37 #include "trace/control.h"
38 #include "glib-compat.h"
43 static const char *filename
;
44 static const char *argv0
;
45 static int gdbstub_port
;
46 static envlist_t
*envlist
;
47 static const char *cpu_model
;
48 unsigned long mmap_min_addr
;
49 unsigned long guest_base
;
52 #define EXCP_DUMP(env, fmt, ...) \
54 CPUState *cs = ENV_GET_CPU(env); \
55 fprintf(stderr, fmt , ## __VA_ARGS__); \
56 cpu_dump_state(cs, stderr, fprintf, 0); \
57 if (qemu_log_separate()) { \
58 qemu_log(fmt, ## __VA_ARGS__); \
59 log_cpu_state(cs, 0); \
63 #if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64)
65 * When running 32-on-64 we should make sure we can fit all of the possible
66 * guest address space into a contiguous chunk of virtual host memory.
68 * This way we will never overlap with our own libraries or binaries or stack
69 * or anything else that QEMU maps.
71 # if defined(TARGET_MIPS) || defined(TARGET_NIOS2)
73 * MIPS only supports 31 bits of virtual address space for user space.
74 * Nios2 also only supports 31 bits.
76 unsigned long reserved_va
= 0x77000000;
78 unsigned long reserved_va
= 0xf7000000;
81 unsigned long reserved_va
;
84 static void usage(int exitcode
);
86 static const char *interp_prefix
= CONFIG_QEMU_INTERP_PREFIX
;
87 const char *qemu_uname_release
;
89 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
90 we allocate a bigger stack. Need a better solution, for example
91 by remapping the process stack directly at the right place */
92 unsigned long guest_stack_size
= 8 * 1024 * 1024UL;
94 void gemu_log(const char *fmt
, ...)
99 vfprintf(stderr
, fmt
, ap
);
103 #if defined(TARGET_I386)
104 int cpu_get_pic_interrupt(CPUX86State
*env
)
110 /***********************************************************/
111 /* Helper routines for implementing atomic operations. */
113 /* Make sure everything is in a consistent state for calling fork(). */
114 void fork_start(void)
117 qemu_mutex_lock(&tcg_ctx
.tb_ctx
.tb_lock
);
121 void fork_end(int child
)
123 mmap_fork_end(child
);
125 CPUState
*cpu
, *next_cpu
;
126 /* Child processes created by fork() only have a single thread.
127 Discard information about the parent threads. */
128 CPU_FOREACH_SAFE(cpu
, next_cpu
) {
129 if (cpu
!= thread_cpu
) {
130 QTAILQ_REMOVE(&cpus
, cpu
, node
);
133 qemu_mutex_init(&tcg_ctx
.tb_ctx
.tb_lock
);
134 qemu_init_cpu_list();
135 gdbserver_fork(thread_cpu
);
137 qemu_mutex_unlock(&tcg_ctx
.tb_ctx
.tb_lock
);
143 /***********************************************************/
144 /* CPUX86 core interface */
146 uint64_t cpu_get_tsc(CPUX86State
*env
)
148 return cpu_get_host_ticks();
151 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
156 e1
= (addr
<< 16) | (limit
& 0xffff);
157 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
164 static uint64_t *idt_table
;
166 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
167 uint64_t addr
, unsigned int sel
)
170 e1
= (addr
& 0xffff) | (sel
<< 16);
171 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
175 p
[2] = tswap32(addr
>> 32);
178 /* only dpl matters as we do only user space emulation */
179 static void set_idt(int n
, unsigned int dpl
)
181 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
184 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
185 uint32_t addr
, unsigned int sel
)
188 e1
= (addr
& 0xffff) | (sel
<< 16);
189 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
195 /* only dpl matters as we do only user space emulation */
196 static void set_idt(int n
, unsigned int dpl
)
198 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
202 void cpu_loop(CPUX86State
*env
)
204 CPUState
*cs
= CPU(x86_env_get_cpu(env
));
208 target_siginfo_t info
;
212 trapnr
= cpu_exec(cs
);
214 process_queued_cpu_work(cs
);
218 /* linux syscall from int $0x80 */
219 ret
= do_syscall(env
,
228 if (ret
== -TARGET_ERESTARTSYS
) {
230 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
231 env
->regs
[R_EAX
] = ret
;
236 /* linux syscall from syscall instruction */
237 ret
= do_syscall(env
,
246 if (ret
== -TARGET_ERESTARTSYS
) {
248 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
249 env
->regs
[R_EAX
] = ret
;
255 info
.si_signo
= TARGET_SIGBUS
;
257 info
.si_code
= TARGET_SI_KERNEL
;
258 info
._sifields
._sigfault
._addr
= 0;
259 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
262 /* XXX: potential problem if ABI32 */
263 #ifndef TARGET_X86_64
264 if (env
->eflags
& VM_MASK
) {
265 handle_vm86_fault(env
);
269 info
.si_signo
= TARGET_SIGSEGV
;
271 info
.si_code
= TARGET_SI_KERNEL
;
272 info
._sifields
._sigfault
._addr
= 0;
273 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
277 info
.si_signo
= TARGET_SIGSEGV
;
279 if (!(env
->error_code
& 1))
280 info
.si_code
= TARGET_SEGV_MAPERR
;
282 info
.si_code
= TARGET_SEGV_ACCERR
;
283 info
._sifields
._sigfault
._addr
= env
->cr
[2];
284 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
287 #ifndef TARGET_X86_64
288 if (env
->eflags
& VM_MASK
) {
289 handle_vm86_trap(env
, trapnr
);
293 /* division by zero */
294 info
.si_signo
= TARGET_SIGFPE
;
296 info
.si_code
= TARGET_FPE_INTDIV
;
297 info
._sifields
._sigfault
._addr
= env
->eip
;
298 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
303 #ifndef TARGET_X86_64
304 if (env
->eflags
& VM_MASK
) {
305 handle_vm86_trap(env
, trapnr
);
309 info
.si_signo
= TARGET_SIGTRAP
;
311 if (trapnr
== EXCP01_DB
) {
312 info
.si_code
= TARGET_TRAP_BRKPT
;
313 info
._sifields
._sigfault
._addr
= env
->eip
;
315 info
.si_code
= TARGET_SI_KERNEL
;
316 info
._sifields
._sigfault
._addr
= 0;
318 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
323 #ifndef TARGET_X86_64
324 if (env
->eflags
& VM_MASK
) {
325 handle_vm86_trap(env
, trapnr
);
329 info
.si_signo
= TARGET_SIGSEGV
;
331 info
.si_code
= TARGET_SI_KERNEL
;
332 info
._sifields
._sigfault
._addr
= 0;
333 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
337 info
.si_signo
= TARGET_SIGILL
;
339 info
.si_code
= TARGET_ILL_ILLOPN
;
340 info
._sifields
._sigfault
._addr
= env
->eip
;
341 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
344 /* just indicate that signals should be handled asap */
350 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
355 info
.si_code
= TARGET_TRAP_BRKPT
;
356 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
361 cpu_exec_step_atomic(cs
);
364 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
365 EXCP_DUMP(env
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
369 process_pending_signals(env
);
376 #define get_user_code_u32(x, gaddr, env) \
377 ({ abi_long __r = get_user_u32((x), (gaddr)); \
378 if (!__r && bswap_code(arm_sctlr_b(env))) { \
384 #define get_user_code_u16(x, gaddr, env) \
385 ({ abi_long __r = get_user_u16((x), (gaddr)); \
386 if (!__r && bswap_code(arm_sctlr_b(env))) { \
392 #define get_user_data_u32(x, gaddr, env) \
393 ({ abi_long __r = get_user_u32((x), (gaddr)); \
394 if (!__r && arm_cpu_bswap_data(env)) { \
400 #define get_user_data_u16(x, gaddr, env) \
401 ({ abi_long __r = get_user_u16((x), (gaddr)); \
402 if (!__r && arm_cpu_bswap_data(env)) { \
408 #define put_user_data_u32(x, gaddr, env) \
409 ({ typeof(x) __x = (x); \
410 if (arm_cpu_bswap_data(env)) { \
411 __x = bswap32(__x); \
413 put_user_u32(__x, (gaddr)); \
416 #define put_user_data_u16(x, gaddr, env) \
417 ({ typeof(x) __x = (x); \
418 if (arm_cpu_bswap_data(env)) { \
419 __x = bswap16(__x); \
421 put_user_u16(__x, (gaddr)); \
425 /* Commpage handling -- there is no commpage for AArch64 */
428 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
430 * r0 = pointer to oldval
431 * r1 = pointer to newval
432 * r2 = pointer to target value
435 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
436 * C set if *ptr was changed, clear if no exchange happened
438 * Note segv's in kernel helpers are a bit tricky, we can set the
439 * data address sensibly but the PC address is just the entry point.
441 static void arm_kernel_cmpxchg64_helper(CPUARMState
*env
)
443 uint64_t oldval
, newval
, val
;
445 target_siginfo_t info
;
447 /* Based on the 32 bit code in do_kernel_trap */
449 /* XXX: This only works between threads, not between processes.
450 It's probably possible to implement this with native host
451 operations. However things like ldrex/strex are much harder so
452 there's not much point trying. */
454 cpsr
= cpsr_read(env
);
457 if (get_user_u64(oldval
, env
->regs
[0])) {
458 env
->exception
.vaddress
= env
->regs
[0];
462 if (get_user_u64(newval
, env
->regs
[1])) {
463 env
->exception
.vaddress
= env
->regs
[1];
467 if (get_user_u64(val
, addr
)) {
468 env
->exception
.vaddress
= addr
;
475 if (put_user_u64(val
, addr
)) {
476 env
->exception
.vaddress
= addr
;
486 cpsr_write(env
, cpsr
, CPSR_C
, CPSRWriteByInstr
);
492 /* We get the PC of the entry address - which is as good as anything,
493 on a real kernel what you get depends on which mode it uses. */
494 info
.si_signo
= TARGET_SIGSEGV
;
496 /* XXX: check env->error_code */
497 info
.si_code
= TARGET_SEGV_MAPERR
;
498 info
._sifields
._sigfault
._addr
= env
->exception
.vaddress
;
499 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
502 /* Handle a jump to the kernel code page. */
504 do_kernel_trap(CPUARMState
*env
)
510 switch (env
->regs
[15]) {
511 case 0xffff0fa0: /* __kernel_memory_barrier */
512 /* ??? No-op. Will need to do better for SMP. */
514 case 0xffff0fc0: /* __kernel_cmpxchg */
515 /* XXX: This only works between threads, not between processes.
516 It's probably possible to implement this with native host
517 operations. However things like ldrex/strex are much harder so
518 there's not much point trying. */
520 cpsr
= cpsr_read(env
);
522 /* FIXME: This should SEGV if the access fails. */
523 if (get_user_u32(val
, addr
))
525 if (val
== env
->regs
[0]) {
527 /* FIXME: Check for segfaults. */
528 put_user_u32(val
, addr
);
535 cpsr_write(env
, cpsr
, CPSR_C
, CPSRWriteByInstr
);
538 case 0xffff0fe0: /* __kernel_get_tls */
539 env
->regs
[0] = cpu_get_tls(env
);
541 case 0xffff0f60: /* __kernel_cmpxchg64 */
542 arm_kernel_cmpxchg64_helper(env
);
548 /* Jump back to the caller. */
549 addr
= env
->regs
[14];
554 env
->regs
[15] = addr
;
559 void cpu_loop(CPUARMState
*env
)
561 CPUState
*cs
= CPU(arm_env_get_cpu(env
));
563 unsigned int n
, insn
;
564 target_siginfo_t info
;
570 trapnr
= cpu_exec(cs
);
572 process_queued_cpu_work(cs
);
577 TaskState
*ts
= cs
->opaque
;
581 /* we handle the FPU emulation here, as Linux */
582 /* we get the opcode */
583 /* FIXME - what to do if get_user() fails? */
584 get_user_code_u32(opcode
, env
->regs
[15], env
);
586 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
587 if (rc
== 0) { /* illegal instruction */
588 info
.si_signo
= TARGET_SIGILL
;
590 info
.si_code
= TARGET_ILL_ILLOPN
;
591 info
._sifields
._sigfault
._addr
= env
->regs
[15];
592 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
593 } else if (rc
< 0) { /* FP exception */
596 /* translate softfloat flags to FPSR flags */
597 if (-rc
& float_flag_invalid
)
599 if (-rc
& float_flag_divbyzero
)
601 if (-rc
& float_flag_overflow
)
603 if (-rc
& float_flag_underflow
)
605 if (-rc
& float_flag_inexact
)
608 FPSR fpsr
= ts
->fpa
.fpsr
;
609 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
611 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
612 info
.si_signo
= TARGET_SIGFPE
;
615 /* ordered by priority, least first */
616 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
617 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
618 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
619 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
620 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
622 info
._sifields
._sigfault
._addr
= env
->regs
[15];
623 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
628 /* accumulate unenabled exceptions */
629 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
631 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
633 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
635 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
637 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
640 } else { /* everything OK */
651 if (trapnr
== EXCP_BKPT
) {
653 /* FIXME - what to do if get_user() fails? */
654 get_user_code_u16(insn
, env
->regs
[15], env
);
658 /* FIXME - what to do if get_user() fails? */
659 get_user_code_u32(insn
, env
->regs
[15], env
);
660 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
665 /* FIXME - what to do if get_user() fails? */
666 get_user_code_u16(insn
, env
->regs
[15] - 2, env
);
669 /* FIXME - what to do if get_user() fails? */
670 get_user_code_u32(insn
, env
->regs
[15] - 4, env
);
675 if (n
== ARM_NR_cacheflush
) {
677 } else if (n
== ARM_NR_semihosting
678 || n
== ARM_NR_thumb_semihosting
) {
679 env
->regs
[0] = do_arm_semihosting (env
);
680 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
|| env
->thumb
) {
682 if (env
->thumb
|| n
== 0) {
685 n
-= ARM_SYSCALL_BASE
;
688 if ( n
> ARM_NR_BASE
) {
690 case ARM_NR_cacheflush
:
694 cpu_set_tls(env
, env
->regs
[0]);
697 case ARM_NR_breakpoint
:
698 env
->regs
[15] -= env
->thumb
? 2 : 4;
701 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
703 env
->regs
[0] = -TARGET_ENOSYS
;
707 ret
= do_syscall(env
,
716 if (ret
== -TARGET_ERESTARTSYS
) {
717 env
->regs
[15] -= env
->thumb
? 2 : 4;
718 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
728 env
->regs
[0] = do_arm_semihosting(env
);
731 /* just indicate that signals should be handled asap */
733 case EXCP_PREFETCH_ABORT
:
734 case EXCP_DATA_ABORT
:
735 addr
= env
->exception
.vaddress
;
737 info
.si_signo
= TARGET_SIGSEGV
;
739 /* XXX: check env->error_code */
740 info
.si_code
= TARGET_SEGV_MAPERR
;
741 info
._sifields
._sigfault
._addr
= addr
;
742 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
750 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
755 info
.si_code
= TARGET_TRAP_BRKPT
;
756 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
760 case EXCP_KERNEL_TRAP
:
761 if (do_kernel_trap(env
))
765 /* nothing to do here for user-mode, just resume guest code */
768 cpu_exec_step_atomic(cs
);
772 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
775 process_pending_signals(env
);
781 /* AArch64 main loop */
782 void cpu_loop(CPUARMState
*env
)
784 CPUState
*cs
= CPU(arm_env_get_cpu(env
));
787 target_siginfo_t info
;
791 trapnr
= cpu_exec(cs
);
793 process_queued_cpu_work(cs
);
797 ret
= do_syscall(env
,
806 if (ret
== -TARGET_ERESTARTSYS
) {
808 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
813 /* just indicate that signals should be handled asap */
816 info
.si_signo
= TARGET_SIGILL
;
818 info
.si_code
= TARGET_ILL_ILLOPN
;
819 info
._sifields
._sigfault
._addr
= env
->pc
;
820 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
822 case EXCP_PREFETCH_ABORT
:
823 case EXCP_DATA_ABORT
:
824 info
.si_signo
= TARGET_SIGSEGV
;
826 /* XXX: check env->error_code */
827 info
.si_code
= TARGET_SEGV_MAPERR
;
828 info
._sifields
._sigfault
._addr
= env
->exception
.vaddress
;
829 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
833 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
837 info
.si_code
= TARGET_TRAP_BRKPT
;
838 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
842 env
->xregs
[0] = do_arm_semihosting(env
);
845 /* nothing to do here for user-mode, just resume guest code */
848 cpu_exec_step_atomic(cs
);
851 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
854 process_pending_signals(env
);
855 /* Exception return on AArch64 always clears the exclusive monitor,
856 * so any return to running guest code implies this.
858 env
->exclusive_addr
= -1;
861 #endif /* ndef TARGET_ABI32 */
865 #ifdef TARGET_UNICORE32
867 void cpu_loop(CPUUniCore32State
*env
)
869 CPUState
*cs
= CPU(uc32_env_get_cpu(env
));
871 unsigned int n
, insn
;
872 target_siginfo_t info
;
876 trapnr
= cpu_exec(cs
);
878 process_queued_cpu_work(cs
);
884 get_user_u32(insn
, env
->regs
[31] - 4);
887 if (n
>= UC32_SYSCALL_BASE
) {
889 n
-= UC32_SYSCALL_BASE
;
890 if (n
== UC32_SYSCALL_NR_set_tls
) {
891 cpu_set_tls(env
, env
->regs
[0]);
894 abi_long ret
= do_syscall(env
,
903 if (ret
== -TARGET_ERESTARTSYS
) {
905 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
914 case UC32_EXCP_DTRAP
:
915 case UC32_EXCP_ITRAP
:
916 info
.si_signo
= TARGET_SIGSEGV
;
918 /* XXX: check env->error_code */
919 info
.si_code
= TARGET_SEGV_MAPERR
;
920 info
._sifields
._sigfault
._addr
= env
->cp0
.c4_faultaddr
;
921 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
924 /* just indicate that signals should be handled asap */
930 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
934 info
.si_code
= TARGET_TRAP_BRKPT
;
935 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
940 cpu_exec_step_atomic(cs
);
945 process_pending_signals(env
);
949 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
955 #define SPARC64_STACK_BIAS 2047
959 /* WARNING: dealing with register windows _is_ complicated. More info
960 can be found at http://www.sics.se/~psm/sparcstack.html */
961 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
963 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
964 /* wrap handling : if cwp is on the last window, then we use the
965 registers 'after' the end */
966 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
967 index
+= 16 * env
->nwindows
;
971 /* save the register window 'cwp1' */
972 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
977 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
978 #ifdef TARGET_SPARC64
980 sp_ptr
+= SPARC64_STACK_BIAS
;
982 #if defined(DEBUG_WIN)
983 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" save_cwp=%d\n",
986 for(i
= 0; i
< 16; i
++) {
987 /* FIXME - what to do if put_user() fails? */
988 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
989 sp_ptr
+= sizeof(abi_ulong
);
993 static void save_window(CPUSPARCState
*env
)
995 #ifndef TARGET_SPARC64
996 unsigned int new_wim
;
997 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
998 ((1LL << env
->nwindows
) - 1);
999 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1002 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1008 static void restore_window(CPUSPARCState
*env
)
1010 #ifndef TARGET_SPARC64
1011 unsigned int new_wim
;
1013 unsigned int i
, cwp1
;
1016 #ifndef TARGET_SPARC64
1017 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
1018 ((1LL << env
->nwindows
) - 1);
1021 /* restore the invalid window */
1022 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1023 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
1024 #ifdef TARGET_SPARC64
1026 sp_ptr
+= SPARC64_STACK_BIAS
;
1028 #if defined(DEBUG_WIN)
1029 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" load_cwp=%d\n",
1032 for(i
= 0; i
< 16; i
++) {
1033 /* FIXME - what to do if get_user() fails? */
1034 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
1035 sp_ptr
+= sizeof(abi_ulong
);
1037 #ifdef TARGET_SPARC64
1039 if (env
->cleanwin
< env
->nwindows
- 1)
1047 static void flush_windows(CPUSPARCState
*env
)
1053 /* if restore would invoke restore_window(), then we can stop */
1054 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
1055 #ifndef TARGET_SPARC64
1056 if (env
->wim
& (1 << cwp1
))
1059 if (env
->canrestore
== 0)
1064 save_window_offset(env
, cwp1
);
1067 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1068 #ifndef TARGET_SPARC64
1069 /* set wim so that restore will reload the registers */
1070 env
->wim
= 1 << cwp1
;
1072 #if defined(DEBUG_WIN)
1073 printf("flush_windows: nb=%d\n", offset
- 1);
1077 void cpu_loop (CPUSPARCState
*env
)
1079 CPUState
*cs
= CPU(sparc_env_get_cpu(env
));
1082 target_siginfo_t info
;
1086 trapnr
= cpu_exec(cs
);
1088 process_queued_cpu_work(cs
);
1090 /* Compute PSR before exposing state. */
1091 if (env
->cc_op
!= CC_OP_FLAGS
) {
1096 #ifndef TARGET_SPARC64
1103 ret
= do_syscall (env
, env
->gregs
[1],
1104 env
->regwptr
[0], env
->regwptr
[1],
1105 env
->regwptr
[2], env
->regwptr
[3],
1106 env
->regwptr
[4], env
->regwptr
[5],
1108 if (ret
== -TARGET_ERESTARTSYS
|| ret
== -TARGET_QEMU_ESIGRETURN
) {
1111 if ((abi_ulong
)ret
>= (abi_ulong
)(-515)) {
1112 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1113 env
->xcc
|= PSR_CARRY
;
1115 env
->psr
|= PSR_CARRY
;
1119 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1120 env
->xcc
&= ~PSR_CARRY
;
1122 env
->psr
&= ~PSR_CARRY
;
1125 env
->regwptr
[0] = ret
;
1126 /* next instruction */
1128 env
->npc
= env
->npc
+ 4;
1130 case 0x83: /* flush windows */
1135 /* next instruction */
1137 env
->npc
= env
->npc
+ 4;
1139 #ifndef TARGET_SPARC64
1140 case TT_WIN_OVF
: /* window overflow */
1143 case TT_WIN_UNF
: /* window underflow */
1144 restore_window(env
);
1149 info
.si_signo
= TARGET_SIGSEGV
;
1151 /* XXX: check env->error_code */
1152 info
.si_code
= TARGET_SEGV_MAPERR
;
1153 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
1154 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1158 case TT_SPILL
: /* window overflow */
1161 case TT_FILL
: /* window underflow */
1162 restore_window(env
);
1167 info
.si_signo
= TARGET_SIGSEGV
;
1169 /* XXX: check env->error_code */
1170 info
.si_code
= TARGET_SEGV_MAPERR
;
1171 if (trapnr
== TT_DFAULT
)
1172 info
._sifields
._sigfault
._addr
= env
->dmmu
.mmuregs
[4];
1174 info
._sifields
._sigfault
._addr
= cpu_tsptr(env
)->tpc
;
1175 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1178 #ifndef TARGET_ABI32
1181 sparc64_get_context(env
);
1185 sparc64_set_context(env
);
1189 case EXCP_INTERRUPT
:
1190 /* just indicate that signals should be handled asap */
1194 info
.si_signo
= TARGET_SIGILL
;
1196 info
.si_code
= TARGET_ILL_ILLOPC
;
1197 info
._sifields
._sigfault
._addr
= env
->pc
;
1198 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1205 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
1208 info
.si_signo
= sig
;
1210 info
.si_code
= TARGET_TRAP_BRKPT
;
1211 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1216 cpu_exec_step_atomic(cs
);
1219 printf ("Unhandled trap: 0x%x\n", trapnr
);
1220 cpu_dump_state(cs
, stderr
, fprintf
, 0);
1223 process_pending_signals (env
);
1230 static inline uint64_t cpu_ppc_get_tb(CPUPPCState
*env
)
1232 return cpu_get_host_ticks();
1235 uint64_t cpu_ppc_load_tbl(CPUPPCState
*env
)
1237 return cpu_ppc_get_tb(env
);
1240 uint32_t cpu_ppc_load_tbu(CPUPPCState
*env
)
1242 return cpu_ppc_get_tb(env
) >> 32;
1245 uint64_t cpu_ppc_load_atbl(CPUPPCState
*env
)
1247 return cpu_ppc_get_tb(env
);
1250 uint32_t cpu_ppc_load_atbu(CPUPPCState
*env
)
1252 return cpu_ppc_get_tb(env
) >> 32;
1255 uint32_t cpu_ppc601_load_rtcu(CPUPPCState
*env
)
1256 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1258 uint32_t cpu_ppc601_load_rtcl(CPUPPCState
*env
)
1260 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1263 /* XXX: to be fixed */
1264 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t *valp
)
1269 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t val
)
1274 static int do_store_exclusive(CPUPPCState
*env
)
1277 target_ulong page_addr
;
1278 target_ulong val
, val2
__attribute__((unused
)) = 0;
1282 addr
= env
->reserve_ea
;
1283 page_addr
= addr
& TARGET_PAGE_MASK
;
1286 flags
= page_get_flags(page_addr
);
1287 if ((flags
& PAGE_READ
) == 0) {
1290 int reg
= env
->reserve_info
& 0x1f;
1291 int size
= env
->reserve_info
>> 5;
1294 if (addr
== env
->reserve_addr
) {
1296 case 1: segv
= get_user_u8(val
, addr
); break;
1297 case 2: segv
= get_user_u16(val
, addr
); break;
1298 case 4: segv
= get_user_u32(val
, addr
); break;
1299 #if defined(TARGET_PPC64)
1300 case 8: segv
= get_user_u64(val
, addr
); break;
1302 segv
= get_user_u64(val
, addr
);
1304 segv
= get_user_u64(val2
, addr
+ 8);
1311 if (!segv
&& val
== env
->reserve_val
) {
1312 val
= env
->gpr
[reg
];
1314 case 1: segv
= put_user_u8(val
, addr
); break;
1315 case 2: segv
= put_user_u16(val
, addr
); break;
1316 case 4: segv
= put_user_u32(val
, addr
); break;
1317 #if defined(TARGET_PPC64)
1318 case 8: segv
= put_user_u64(val
, addr
); break;
1320 if (val2
== env
->reserve_val2
) {
1323 val
= env
->gpr
[reg
+1];
1325 val2
= env
->gpr
[reg
+1];
1327 segv
= put_user_u64(val
, addr
);
1329 segv
= put_user_u64(val2
, addr
+ 8);
1342 env
->crf
[0] = (stored
<< 1) | xer_so
;
1343 env
->reserve_addr
= (target_ulong
)-1;
1353 void cpu_loop(CPUPPCState
*env
)
1355 CPUState
*cs
= CPU(ppc_env_get_cpu(env
));
1356 target_siginfo_t info
;
1362 trapnr
= cpu_exec(cs
);
1364 process_queued_cpu_work(cs
);
1367 case POWERPC_EXCP_NONE
:
1370 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1371 cpu_abort(cs
, "Critical interrupt while in user mode. "
1374 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1375 cpu_abort(cs
, "Machine check exception while in user mode. "
1378 case POWERPC_EXCP_DSI
: /* Data storage exception */
1379 /* XXX: check this. Seems bugged */
1380 switch (env
->error_code
& 0xFF000000) {
1383 info
.si_signo
= TARGET_SIGSEGV
;
1385 info
.si_code
= TARGET_SEGV_MAPERR
;
1388 info
.si_signo
= TARGET_SIGILL
;
1390 info
.si_code
= TARGET_ILL_ILLADR
;
1393 info
.si_signo
= TARGET_SIGSEGV
;
1395 info
.si_code
= TARGET_SEGV_ACCERR
;
1398 /* Let's send a regular segfault... */
1399 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1401 info
.si_signo
= TARGET_SIGSEGV
;
1403 info
.si_code
= TARGET_SEGV_MAPERR
;
1406 info
._sifields
._sigfault
._addr
= env
->nip
;
1407 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1409 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1410 /* XXX: check this */
1411 switch (env
->error_code
& 0xFF000000) {
1413 info
.si_signo
= TARGET_SIGSEGV
;
1415 info
.si_code
= TARGET_SEGV_MAPERR
;
1419 info
.si_signo
= TARGET_SIGSEGV
;
1421 info
.si_code
= TARGET_SEGV_ACCERR
;
1424 /* Let's send a regular segfault... */
1425 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1427 info
.si_signo
= TARGET_SIGSEGV
;
1429 info
.si_code
= TARGET_SEGV_MAPERR
;
1432 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1433 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1435 case POWERPC_EXCP_EXTERNAL
: /* External input */
1436 cpu_abort(cs
, "External interrupt while in user mode. "
1439 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1440 /* XXX: check this */
1441 info
.si_signo
= TARGET_SIGBUS
;
1443 info
.si_code
= TARGET_BUS_ADRALN
;
1444 info
._sifields
._sigfault
._addr
= env
->nip
;
1445 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1447 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1448 case POWERPC_EXCP_HV_EMU
: /* HV emulation */
1449 /* XXX: check this */
1450 switch (env
->error_code
& ~0xF) {
1451 case POWERPC_EXCP_FP
:
1452 info
.si_signo
= TARGET_SIGFPE
;
1454 switch (env
->error_code
& 0xF) {
1455 case POWERPC_EXCP_FP_OX
:
1456 info
.si_code
= TARGET_FPE_FLTOVF
;
1458 case POWERPC_EXCP_FP_UX
:
1459 info
.si_code
= TARGET_FPE_FLTUND
;
1461 case POWERPC_EXCP_FP_ZX
:
1462 case POWERPC_EXCP_FP_VXZDZ
:
1463 info
.si_code
= TARGET_FPE_FLTDIV
;
1465 case POWERPC_EXCP_FP_XX
:
1466 info
.si_code
= TARGET_FPE_FLTRES
;
1468 case POWERPC_EXCP_FP_VXSOFT
:
1469 info
.si_code
= TARGET_FPE_FLTINV
;
1471 case POWERPC_EXCP_FP_VXSNAN
:
1472 case POWERPC_EXCP_FP_VXISI
:
1473 case POWERPC_EXCP_FP_VXIDI
:
1474 case POWERPC_EXCP_FP_VXIMZ
:
1475 case POWERPC_EXCP_FP_VXVC
:
1476 case POWERPC_EXCP_FP_VXSQRT
:
1477 case POWERPC_EXCP_FP_VXCVI
:
1478 info
.si_code
= TARGET_FPE_FLTSUB
;
1481 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1486 case POWERPC_EXCP_INVAL
:
1487 info
.si_signo
= TARGET_SIGILL
;
1489 switch (env
->error_code
& 0xF) {
1490 case POWERPC_EXCP_INVAL_INVAL
:
1491 info
.si_code
= TARGET_ILL_ILLOPC
;
1493 case POWERPC_EXCP_INVAL_LSWX
:
1494 info
.si_code
= TARGET_ILL_ILLOPN
;
1496 case POWERPC_EXCP_INVAL_SPR
:
1497 info
.si_code
= TARGET_ILL_PRVREG
;
1499 case POWERPC_EXCP_INVAL_FP
:
1500 info
.si_code
= TARGET_ILL_COPROC
;
1503 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1504 env
->error_code
& 0xF);
1505 info
.si_code
= TARGET_ILL_ILLADR
;
1509 case POWERPC_EXCP_PRIV
:
1510 info
.si_signo
= TARGET_SIGILL
;
1512 switch (env
->error_code
& 0xF) {
1513 case POWERPC_EXCP_PRIV_OPC
:
1514 info
.si_code
= TARGET_ILL_PRVOPC
;
1516 case POWERPC_EXCP_PRIV_REG
:
1517 info
.si_code
= TARGET_ILL_PRVREG
;
1520 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1521 env
->error_code
& 0xF);
1522 info
.si_code
= TARGET_ILL_PRVOPC
;
1526 case POWERPC_EXCP_TRAP
:
1527 cpu_abort(cs
, "Tried to call a TRAP\n");
1530 /* Should not happen ! */
1531 cpu_abort(cs
, "Unknown program exception (%02x)\n",
1535 info
._sifields
._sigfault
._addr
= env
->nip
;
1536 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1538 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1539 info
.si_signo
= TARGET_SIGILL
;
1541 info
.si_code
= TARGET_ILL_COPROC
;
1542 info
._sifields
._sigfault
._addr
= env
->nip
;
1543 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1545 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1546 cpu_abort(cs
, "Syscall exception while in user mode. "
1549 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1550 info
.si_signo
= TARGET_SIGILL
;
1552 info
.si_code
= TARGET_ILL_COPROC
;
1553 info
._sifields
._sigfault
._addr
= env
->nip
;
1554 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1556 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1557 cpu_abort(cs
, "Decrementer interrupt while in user mode. "
1560 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1561 cpu_abort(cs
, "Fix interval timer interrupt while in user mode. "
1564 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1565 cpu_abort(cs
, "Watchdog timer interrupt while in user mode. "
1568 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1569 cpu_abort(cs
, "Data TLB exception while in user mode. "
1572 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1573 cpu_abort(cs
, "Instruction TLB exception while in user mode. "
1576 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1577 info
.si_signo
= TARGET_SIGILL
;
1579 info
.si_code
= TARGET_ILL_COPROC
;
1580 info
._sifields
._sigfault
._addr
= env
->nip
;
1581 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1583 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1584 cpu_abort(cs
, "Embedded floating-point data IRQ not handled\n");
1586 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1587 cpu_abort(cs
, "Embedded floating-point round IRQ not handled\n");
1589 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1590 cpu_abort(cs
, "Performance monitor exception not handled\n");
1592 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1593 cpu_abort(cs
, "Doorbell interrupt while in user mode. "
1596 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1597 cpu_abort(cs
, "Doorbell critical interrupt while in user mode. "
1600 case POWERPC_EXCP_RESET
: /* System reset exception */
1601 cpu_abort(cs
, "Reset interrupt while in user mode. "
1604 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1605 cpu_abort(cs
, "Data segment exception while in user mode. "
1608 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1609 cpu_abort(cs
, "Instruction segment exception "
1610 "while in user mode. Aborting\n");
1612 /* PowerPC 64 with hypervisor mode support */
1613 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1614 cpu_abort(cs
, "Hypervisor decrementer interrupt "
1615 "while in user mode. Aborting\n");
1617 case POWERPC_EXCP_TRACE
: /* Trace exception */
1619 * we use this exception to emulate step-by-step execution mode.
1622 /* PowerPC 64 with hypervisor mode support */
1623 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1624 cpu_abort(cs
, "Hypervisor data storage exception "
1625 "while in user mode. Aborting\n");
1627 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1628 cpu_abort(cs
, "Hypervisor instruction storage exception "
1629 "while in user mode. Aborting\n");
1631 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1632 cpu_abort(cs
, "Hypervisor data segment exception "
1633 "while in user mode. Aborting\n");
1635 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1636 cpu_abort(cs
, "Hypervisor instruction segment exception "
1637 "while in user mode. Aborting\n");
1639 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1640 info
.si_signo
= TARGET_SIGILL
;
1642 info
.si_code
= TARGET_ILL_COPROC
;
1643 info
._sifields
._sigfault
._addr
= env
->nip
;
1644 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1646 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1647 cpu_abort(cs
, "Programmable interval timer interrupt "
1648 "while in user mode. Aborting\n");
1650 case POWERPC_EXCP_IO
: /* IO error exception */
1651 cpu_abort(cs
, "IO error exception while in user mode. "
1654 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1655 cpu_abort(cs
, "Run mode exception while in user mode. "
1658 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1659 cpu_abort(cs
, "Emulation trap exception not handled\n");
1661 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1662 cpu_abort(cs
, "Instruction fetch TLB exception "
1663 "while in user-mode. Aborting");
1665 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1666 cpu_abort(cs
, "Data load TLB exception while in user-mode. "
1669 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1670 cpu_abort(cs
, "Data store TLB exception while in user-mode. "
1673 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1674 cpu_abort(cs
, "Floating-point assist exception not handled\n");
1676 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1677 cpu_abort(cs
, "Instruction address breakpoint exception "
1680 case POWERPC_EXCP_SMI
: /* System management interrupt */
1681 cpu_abort(cs
, "System management interrupt while in user mode. "
1684 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1685 cpu_abort(cs
, "Thermal interrupt interrupt while in user mode. "
1688 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1689 cpu_abort(cs
, "Performance monitor exception not handled\n");
1691 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1692 cpu_abort(cs
, "Vector assist exception not handled\n");
1694 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1695 cpu_abort(cs
, "Soft patch exception not handled\n");
1697 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1698 cpu_abort(cs
, "Maintenance exception while in user mode. "
1701 case POWERPC_EXCP_STOP
: /* stop translation */
1702 /* We did invalidate the instruction cache. Go on */
1704 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1705 /* We just stopped because of a branch. Go on */
1707 case POWERPC_EXCP_SYSCALL_USER
:
1708 /* system call in user-mode emulation */
1710 * PPC ABI uses overflow flag in cr0 to signal an error
1713 env
->crf
[0] &= ~0x1;
1714 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1715 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1717 if (ret
== -TARGET_ERESTARTSYS
) {
1720 if (ret
== (target_ulong
)(-TARGET_QEMU_ESIGRETURN
)) {
1721 /* Returning from a successful sigreturn syscall.
1722 Avoid corrupting register state. */
1726 if (ret
> (target_ulong
)(-515)) {
1732 case POWERPC_EXCP_STCX
:
1733 if (do_store_exclusive(env
)) {
1734 info
.si_signo
= TARGET_SIGSEGV
;
1736 info
.si_code
= TARGET_SEGV_MAPERR
;
1737 info
._sifields
._sigfault
._addr
= env
->nip
;
1738 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1745 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
1747 info
.si_signo
= sig
;
1749 info
.si_code
= TARGET_TRAP_BRKPT
;
1750 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1754 case EXCP_INTERRUPT
:
1755 /* just indicate that signals should be handled asap */
1758 cpu_exec_step_atomic(cs
);
1761 cpu_abort(cs
, "Unknown exception 0x%x. Aborting\n", trapnr
);
1764 process_pending_signals(env
);
1771 # ifdef TARGET_ABI_MIPSO32
1772 # define MIPS_SYS(name, args) args,
1773 static const uint8_t mips_syscall_args
[] = {
1774 MIPS_SYS(sys_syscall
, 8) /* 4000 */
1775 MIPS_SYS(sys_exit
, 1)
1776 MIPS_SYS(sys_fork
, 0)
1777 MIPS_SYS(sys_read
, 3)
1778 MIPS_SYS(sys_write
, 3)
1779 MIPS_SYS(sys_open
, 3) /* 4005 */
1780 MIPS_SYS(sys_close
, 1)
1781 MIPS_SYS(sys_waitpid
, 3)
1782 MIPS_SYS(sys_creat
, 2)
1783 MIPS_SYS(sys_link
, 2)
1784 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1785 MIPS_SYS(sys_execve
, 0)
1786 MIPS_SYS(sys_chdir
, 1)
1787 MIPS_SYS(sys_time
, 1)
1788 MIPS_SYS(sys_mknod
, 3)
1789 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1790 MIPS_SYS(sys_lchown
, 3)
1791 MIPS_SYS(sys_ni_syscall
, 0)
1792 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1793 MIPS_SYS(sys_lseek
, 3)
1794 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1795 MIPS_SYS(sys_mount
, 5)
1796 MIPS_SYS(sys_umount
, 1)
1797 MIPS_SYS(sys_setuid
, 1)
1798 MIPS_SYS(sys_getuid
, 0)
1799 MIPS_SYS(sys_stime
, 1) /* 4025 */
1800 MIPS_SYS(sys_ptrace
, 4)
1801 MIPS_SYS(sys_alarm
, 1)
1802 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1803 MIPS_SYS(sys_pause
, 0)
1804 MIPS_SYS(sys_utime
, 2) /* 4030 */
1805 MIPS_SYS(sys_ni_syscall
, 0)
1806 MIPS_SYS(sys_ni_syscall
, 0)
1807 MIPS_SYS(sys_access
, 2)
1808 MIPS_SYS(sys_nice
, 1)
1809 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1810 MIPS_SYS(sys_sync
, 0)
1811 MIPS_SYS(sys_kill
, 2)
1812 MIPS_SYS(sys_rename
, 2)
1813 MIPS_SYS(sys_mkdir
, 2)
1814 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1815 MIPS_SYS(sys_dup
, 1)
1816 MIPS_SYS(sys_pipe
, 0)
1817 MIPS_SYS(sys_times
, 1)
1818 MIPS_SYS(sys_ni_syscall
, 0)
1819 MIPS_SYS(sys_brk
, 1) /* 4045 */
1820 MIPS_SYS(sys_setgid
, 1)
1821 MIPS_SYS(sys_getgid
, 0)
1822 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1823 MIPS_SYS(sys_geteuid
, 0)
1824 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1825 MIPS_SYS(sys_acct
, 0)
1826 MIPS_SYS(sys_umount2
, 2)
1827 MIPS_SYS(sys_ni_syscall
, 0)
1828 MIPS_SYS(sys_ioctl
, 3)
1829 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1830 MIPS_SYS(sys_ni_syscall
, 2)
1831 MIPS_SYS(sys_setpgid
, 2)
1832 MIPS_SYS(sys_ni_syscall
, 0)
1833 MIPS_SYS(sys_olduname
, 1)
1834 MIPS_SYS(sys_umask
, 1) /* 4060 */
1835 MIPS_SYS(sys_chroot
, 1)
1836 MIPS_SYS(sys_ustat
, 2)
1837 MIPS_SYS(sys_dup2
, 2)
1838 MIPS_SYS(sys_getppid
, 0)
1839 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1840 MIPS_SYS(sys_setsid
, 0)
1841 MIPS_SYS(sys_sigaction
, 3)
1842 MIPS_SYS(sys_sgetmask
, 0)
1843 MIPS_SYS(sys_ssetmask
, 1)
1844 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1845 MIPS_SYS(sys_setregid
, 2)
1846 MIPS_SYS(sys_sigsuspend
, 0)
1847 MIPS_SYS(sys_sigpending
, 1)
1848 MIPS_SYS(sys_sethostname
, 2)
1849 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1850 MIPS_SYS(sys_getrlimit
, 2)
1851 MIPS_SYS(sys_getrusage
, 2)
1852 MIPS_SYS(sys_gettimeofday
, 2)
1853 MIPS_SYS(sys_settimeofday
, 2)
1854 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1855 MIPS_SYS(sys_setgroups
, 2)
1856 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1857 MIPS_SYS(sys_symlink
, 2)
1858 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1859 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1860 MIPS_SYS(sys_uselib
, 1)
1861 MIPS_SYS(sys_swapon
, 2)
1862 MIPS_SYS(sys_reboot
, 3)
1863 MIPS_SYS(old_readdir
, 3)
1864 MIPS_SYS(old_mmap
, 6) /* 4090 */
1865 MIPS_SYS(sys_munmap
, 2)
1866 MIPS_SYS(sys_truncate
, 2)
1867 MIPS_SYS(sys_ftruncate
, 2)
1868 MIPS_SYS(sys_fchmod
, 2)
1869 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1870 MIPS_SYS(sys_getpriority
, 2)
1871 MIPS_SYS(sys_setpriority
, 3)
1872 MIPS_SYS(sys_ni_syscall
, 0)
1873 MIPS_SYS(sys_statfs
, 2)
1874 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1875 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1876 MIPS_SYS(sys_socketcall
, 2)
1877 MIPS_SYS(sys_syslog
, 3)
1878 MIPS_SYS(sys_setitimer
, 3)
1879 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1880 MIPS_SYS(sys_newstat
, 2)
1881 MIPS_SYS(sys_newlstat
, 2)
1882 MIPS_SYS(sys_newfstat
, 2)
1883 MIPS_SYS(sys_uname
, 1)
1884 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1885 MIPS_SYS(sys_vhangup
, 0)
1886 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1887 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1888 MIPS_SYS(sys_wait4
, 4)
1889 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1890 MIPS_SYS(sys_sysinfo
, 1)
1891 MIPS_SYS(sys_ipc
, 6)
1892 MIPS_SYS(sys_fsync
, 1)
1893 MIPS_SYS(sys_sigreturn
, 0)
1894 MIPS_SYS(sys_clone
, 6) /* 4120 */
1895 MIPS_SYS(sys_setdomainname
, 2)
1896 MIPS_SYS(sys_newuname
, 1)
1897 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1898 MIPS_SYS(sys_adjtimex
, 1)
1899 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1900 MIPS_SYS(sys_sigprocmask
, 3)
1901 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1902 MIPS_SYS(sys_init_module
, 5)
1903 MIPS_SYS(sys_delete_module
, 1)
1904 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1905 MIPS_SYS(sys_quotactl
, 0)
1906 MIPS_SYS(sys_getpgid
, 1)
1907 MIPS_SYS(sys_fchdir
, 1)
1908 MIPS_SYS(sys_bdflush
, 2)
1909 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1910 MIPS_SYS(sys_personality
, 1)
1911 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1912 MIPS_SYS(sys_setfsuid
, 1)
1913 MIPS_SYS(sys_setfsgid
, 1)
1914 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1915 MIPS_SYS(sys_getdents
, 3)
1916 MIPS_SYS(sys_select
, 5)
1917 MIPS_SYS(sys_flock
, 2)
1918 MIPS_SYS(sys_msync
, 3)
1919 MIPS_SYS(sys_readv
, 3) /* 4145 */
1920 MIPS_SYS(sys_writev
, 3)
1921 MIPS_SYS(sys_cacheflush
, 3)
1922 MIPS_SYS(sys_cachectl
, 3)
1923 MIPS_SYS(sys_sysmips
, 4)
1924 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1925 MIPS_SYS(sys_getsid
, 1)
1926 MIPS_SYS(sys_fdatasync
, 0)
1927 MIPS_SYS(sys_sysctl
, 1)
1928 MIPS_SYS(sys_mlock
, 2)
1929 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1930 MIPS_SYS(sys_mlockall
, 1)
1931 MIPS_SYS(sys_munlockall
, 0)
1932 MIPS_SYS(sys_sched_setparam
, 2)
1933 MIPS_SYS(sys_sched_getparam
, 2)
1934 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1935 MIPS_SYS(sys_sched_getscheduler
, 1)
1936 MIPS_SYS(sys_sched_yield
, 0)
1937 MIPS_SYS(sys_sched_get_priority_max
, 1)
1938 MIPS_SYS(sys_sched_get_priority_min
, 1)
1939 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
1940 MIPS_SYS(sys_nanosleep
, 2)
1941 MIPS_SYS(sys_mremap
, 5)
1942 MIPS_SYS(sys_accept
, 3)
1943 MIPS_SYS(sys_bind
, 3)
1944 MIPS_SYS(sys_connect
, 3) /* 4170 */
1945 MIPS_SYS(sys_getpeername
, 3)
1946 MIPS_SYS(sys_getsockname
, 3)
1947 MIPS_SYS(sys_getsockopt
, 5)
1948 MIPS_SYS(sys_listen
, 2)
1949 MIPS_SYS(sys_recv
, 4) /* 4175 */
1950 MIPS_SYS(sys_recvfrom
, 6)
1951 MIPS_SYS(sys_recvmsg
, 3)
1952 MIPS_SYS(sys_send
, 4)
1953 MIPS_SYS(sys_sendmsg
, 3)
1954 MIPS_SYS(sys_sendto
, 6) /* 4180 */
1955 MIPS_SYS(sys_setsockopt
, 5)
1956 MIPS_SYS(sys_shutdown
, 2)
1957 MIPS_SYS(sys_socket
, 3)
1958 MIPS_SYS(sys_socketpair
, 4)
1959 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
1960 MIPS_SYS(sys_getresuid
, 3)
1961 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
1962 MIPS_SYS(sys_poll
, 3)
1963 MIPS_SYS(sys_nfsservctl
, 3)
1964 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
1965 MIPS_SYS(sys_getresgid
, 3)
1966 MIPS_SYS(sys_prctl
, 5)
1967 MIPS_SYS(sys_rt_sigreturn
, 0)
1968 MIPS_SYS(sys_rt_sigaction
, 4)
1969 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
1970 MIPS_SYS(sys_rt_sigpending
, 2)
1971 MIPS_SYS(sys_rt_sigtimedwait
, 4)
1972 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
1973 MIPS_SYS(sys_rt_sigsuspend
, 0)
1974 MIPS_SYS(sys_pread64
, 6) /* 4200 */
1975 MIPS_SYS(sys_pwrite64
, 6)
1976 MIPS_SYS(sys_chown
, 3)
1977 MIPS_SYS(sys_getcwd
, 2)
1978 MIPS_SYS(sys_capget
, 2)
1979 MIPS_SYS(sys_capset
, 2) /* 4205 */
1980 MIPS_SYS(sys_sigaltstack
, 2)
1981 MIPS_SYS(sys_sendfile
, 4)
1982 MIPS_SYS(sys_ni_syscall
, 0)
1983 MIPS_SYS(sys_ni_syscall
, 0)
1984 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
1985 MIPS_SYS(sys_truncate64
, 4)
1986 MIPS_SYS(sys_ftruncate64
, 4)
1987 MIPS_SYS(sys_stat64
, 2)
1988 MIPS_SYS(sys_lstat64
, 2)
1989 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
1990 MIPS_SYS(sys_pivot_root
, 2)
1991 MIPS_SYS(sys_mincore
, 3)
1992 MIPS_SYS(sys_madvise
, 3)
1993 MIPS_SYS(sys_getdents64
, 3)
1994 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
1995 MIPS_SYS(sys_ni_syscall
, 0)
1996 MIPS_SYS(sys_gettid
, 0)
1997 MIPS_SYS(sys_readahead
, 5)
1998 MIPS_SYS(sys_setxattr
, 5)
1999 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
2000 MIPS_SYS(sys_fsetxattr
, 5)
2001 MIPS_SYS(sys_getxattr
, 4)
2002 MIPS_SYS(sys_lgetxattr
, 4)
2003 MIPS_SYS(sys_fgetxattr
, 4)
2004 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
2005 MIPS_SYS(sys_llistxattr
, 3)
2006 MIPS_SYS(sys_flistxattr
, 3)
2007 MIPS_SYS(sys_removexattr
, 2)
2008 MIPS_SYS(sys_lremovexattr
, 2)
2009 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
2010 MIPS_SYS(sys_tkill
, 2)
2011 MIPS_SYS(sys_sendfile64
, 5)
2012 MIPS_SYS(sys_futex
, 6)
2013 MIPS_SYS(sys_sched_setaffinity
, 3)
2014 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
2015 MIPS_SYS(sys_io_setup
, 2)
2016 MIPS_SYS(sys_io_destroy
, 1)
2017 MIPS_SYS(sys_io_getevents
, 5)
2018 MIPS_SYS(sys_io_submit
, 3)
2019 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
2020 MIPS_SYS(sys_exit_group
, 1)
2021 MIPS_SYS(sys_lookup_dcookie
, 3)
2022 MIPS_SYS(sys_epoll_create
, 1)
2023 MIPS_SYS(sys_epoll_ctl
, 4)
2024 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
2025 MIPS_SYS(sys_remap_file_pages
, 5)
2026 MIPS_SYS(sys_set_tid_address
, 1)
2027 MIPS_SYS(sys_restart_syscall
, 0)
2028 MIPS_SYS(sys_fadvise64_64
, 7)
2029 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
2030 MIPS_SYS(sys_fstatfs64
, 2)
2031 MIPS_SYS(sys_timer_create
, 3)
2032 MIPS_SYS(sys_timer_settime
, 4)
2033 MIPS_SYS(sys_timer_gettime
, 2)
2034 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
2035 MIPS_SYS(sys_timer_delete
, 1)
2036 MIPS_SYS(sys_clock_settime
, 2)
2037 MIPS_SYS(sys_clock_gettime
, 2)
2038 MIPS_SYS(sys_clock_getres
, 2)
2039 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
2040 MIPS_SYS(sys_tgkill
, 3)
2041 MIPS_SYS(sys_utimes
, 2)
2042 MIPS_SYS(sys_mbind
, 4)
2043 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
2044 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
2045 MIPS_SYS(sys_mq_open
, 4)
2046 MIPS_SYS(sys_mq_unlink
, 1)
2047 MIPS_SYS(sys_mq_timedsend
, 5)
2048 MIPS_SYS(sys_mq_timedreceive
, 5)
2049 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
2050 MIPS_SYS(sys_mq_getsetattr
, 3)
2051 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
2052 MIPS_SYS(sys_waitid
, 4)
2053 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
2054 MIPS_SYS(sys_add_key
, 5)
2055 MIPS_SYS(sys_request_key
, 4)
2056 MIPS_SYS(sys_keyctl
, 5)
2057 MIPS_SYS(sys_set_thread_area
, 1)
2058 MIPS_SYS(sys_inotify_init
, 0)
2059 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
2060 MIPS_SYS(sys_inotify_rm_watch
, 2)
2061 MIPS_SYS(sys_migrate_pages
, 4)
2062 MIPS_SYS(sys_openat
, 4)
2063 MIPS_SYS(sys_mkdirat
, 3)
2064 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
2065 MIPS_SYS(sys_fchownat
, 5)
2066 MIPS_SYS(sys_futimesat
, 3)
2067 MIPS_SYS(sys_fstatat64
, 4)
2068 MIPS_SYS(sys_unlinkat
, 3)
2069 MIPS_SYS(sys_renameat
, 4) /* 4295 */
2070 MIPS_SYS(sys_linkat
, 5)
2071 MIPS_SYS(sys_symlinkat
, 3)
2072 MIPS_SYS(sys_readlinkat
, 4)
2073 MIPS_SYS(sys_fchmodat
, 3)
2074 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
2075 MIPS_SYS(sys_pselect6
, 6)
2076 MIPS_SYS(sys_ppoll
, 5)
2077 MIPS_SYS(sys_unshare
, 1)
2078 MIPS_SYS(sys_splice
, 6)
2079 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
2080 MIPS_SYS(sys_tee
, 4)
2081 MIPS_SYS(sys_vmsplice
, 4)
2082 MIPS_SYS(sys_move_pages
, 6)
2083 MIPS_SYS(sys_set_robust_list
, 2)
2084 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
2085 MIPS_SYS(sys_kexec_load
, 4)
2086 MIPS_SYS(sys_getcpu
, 3)
2087 MIPS_SYS(sys_epoll_pwait
, 6)
2088 MIPS_SYS(sys_ioprio_set
, 3)
2089 MIPS_SYS(sys_ioprio_get
, 2)
2090 MIPS_SYS(sys_utimensat
, 4)
2091 MIPS_SYS(sys_signalfd
, 3)
2092 MIPS_SYS(sys_ni_syscall
, 0) /* was timerfd */
2093 MIPS_SYS(sys_eventfd
, 1)
2094 MIPS_SYS(sys_fallocate
, 6) /* 4320 */
2095 MIPS_SYS(sys_timerfd_create
, 2)
2096 MIPS_SYS(sys_timerfd_gettime
, 2)
2097 MIPS_SYS(sys_timerfd_settime
, 4)
2098 MIPS_SYS(sys_signalfd4
, 4)
2099 MIPS_SYS(sys_eventfd2
, 2) /* 4325 */
2100 MIPS_SYS(sys_epoll_create1
, 1)
2101 MIPS_SYS(sys_dup3
, 3)
2102 MIPS_SYS(sys_pipe2
, 2)
2103 MIPS_SYS(sys_inotify_init1
, 1)
2104 MIPS_SYS(sys_preadv
, 5) /* 4330 */
2105 MIPS_SYS(sys_pwritev
, 5)
2106 MIPS_SYS(sys_rt_tgsigqueueinfo
, 4)
2107 MIPS_SYS(sys_perf_event_open
, 5)
2108 MIPS_SYS(sys_accept4
, 4)
2109 MIPS_SYS(sys_recvmmsg
, 5) /* 4335 */
2110 MIPS_SYS(sys_fanotify_init
, 2)
2111 MIPS_SYS(sys_fanotify_mark
, 6)
2112 MIPS_SYS(sys_prlimit64
, 4)
2113 MIPS_SYS(sys_name_to_handle_at
, 5)
2114 MIPS_SYS(sys_open_by_handle_at
, 3) /* 4340 */
2115 MIPS_SYS(sys_clock_adjtime
, 2)
2116 MIPS_SYS(sys_syncfs
, 1)
2117 MIPS_SYS(sys_sendmmsg
, 4)
2118 MIPS_SYS(sys_setns
, 2)
2119 MIPS_SYS(sys_process_vm_readv
, 6) /* 345 */
2120 MIPS_SYS(sys_process_vm_writev
, 6)
2121 MIPS_SYS(sys_kcmp
, 5)
2122 MIPS_SYS(sys_finit_module
, 3)
2123 MIPS_SYS(sys_sched_setattr
, 2)
2124 MIPS_SYS(sys_sched_getattr
, 3) /* 350 */
2125 MIPS_SYS(sys_renameat2
, 5)
2126 MIPS_SYS(sys_seccomp
, 3)
2127 MIPS_SYS(sys_getrandom
, 3)
2128 MIPS_SYS(sys_memfd_create
, 2)
2129 MIPS_SYS(sys_bpf
, 3) /* 355 */
2130 MIPS_SYS(sys_execveat
, 5)
2131 MIPS_SYS(sys_userfaultfd
, 1)
2132 MIPS_SYS(sys_membarrier
, 2)
2133 MIPS_SYS(sys_mlock2
, 3)
2134 MIPS_SYS(sys_copy_file_range
, 6) /* 360 */
2135 MIPS_SYS(sys_preadv2
, 6)
2136 MIPS_SYS(sys_pwritev2
, 6)
2141 static int do_store_exclusive(CPUMIPSState
*env
)
2144 target_ulong page_addr
;
2152 page_addr
= addr
& TARGET_PAGE_MASK
;
2155 flags
= page_get_flags(page_addr
);
2156 if ((flags
& PAGE_READ
) == 0) {
2159 reg
= env
->llreg
& 0x1f;
2160 d
= (env
->llreg
& 0x20) != 0;
2162 segv
= get_user_s64(val
, addr
);
2164 segv
= get_user_s32(val
, addr
);
2167 if (val
!= env
->llval
) {
2168 env
->active_tc
.gpr
[reg
] = 0;
2171 segv
= put_user_u64(env
->llnewval
, addr
);
2173 segv
= put_user_u32(env
->llnewval
, addr
);
2176 env
->active_tc
.gpr
[reg
] = 1;
2183 env
->active_tc
.PC
+= 4;
2196 static int do_break(CPUMIPSState
*env
, target_siginfo_t
*info
,
2204 info
->si_signo
= TARGET_SIGFPE
;
2206 info
->si_code
= (code
== BRK_OVERFLOW
) ? FPE_INTOVF
: FPE_INTDIV
;
2207 queue_signal(env
, info
->si_signo
, QEMU_SI_FAULT
, &*info
);
2211 info
->si_signo
= TARGET_SIGTRAP
;
2213 queue_signal(env
, info
->si_signo
, QEMU_SI_FAULT
, &*info
);
2221 void cpu_loop(CPUMIPSState
*env
)
2223 CPUState
*cs
= CPU(mips_env_get_cpu(env
));
2224 target_siginfo_t info
;
2227 # ifdef TARGET_ABI_MIPSO32
2228 unsigned int syscall_num
;
2233 trapnr
= cpu_exec(cs
);
2235 process_queued_cpu_work(cs
);
2239 env
->active_tc
.PC
+= 4;
2240 # ifdef TARGET_ABI_MIPSO32
2241 syscall_num
= env
->active_tc
.gpr
[2] - 4000;
2242 if (syscall_num
>= sizeof(mips_syscall_args
)) {
2243 ret
= -TARGET_ENOSYS
;
2247 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
2249 nb_args
= mips_syscall_args
[syscall_num
];
2250 sp_reg
= env
->active_tc
.gpr
[29];
2252 /* these arguments are taken from the stack */
2254 if ((ret
= get_user_ual(arg8
, sp_reg
+ 28)) != 0) {
2258 if ((ret
= get_user_ual(arg7
, sp_reg
+ 24)) != 0) {
2262 if ((ret
= get_user_ual(arg6
, sp_reg
+ 20)) != 0) {
2266 if ((ret
= get_user_ual(arg5
, sp_reg
+ 16)) != 0) {
2272 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2273 env
->active_tc
.gpr
[4],
2274 env
->active_tc
.gpr
[5],
2275 env
->active_tc
.gpr
[6],
2276 env
->active_tc
.gpr
[7],
2277 arg5
, arg6
, arg7
, arg8
);
2281 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2282 env
->active_tc
.gpr
[4], env
->active_tc
.gpr
[5],
2283 env
->active_tc
.gpr
[6], env
->active_tc
.gpr
[7],
2284 env
->active_tc
.gpr
[8], env
->active_tc
.gpr
[9],
2285 env
->active_tc
.gpr
[10], env
->active_tc
.gpr
[11]);
2287 if (ret
== -TARGET_ERESTARTSYS
) {
2288 env
->active_tc
.PC
-= 4;
2291 if (ret
== -TARGET_QEMU_ESIGRETURN
) {
2292 /* Returning from a successful sigreturn syscall.
2293 Avoid clobbering register state. */
2296 if ((abi_ulong
)ret
>= (abi_ulong
)-1133) {
2297 env
->active_tc
.gpr
[7] = 1; /* error flag */
2300 env
->active_tc
.gpr
[7] = 0; /* error flag */
2302 env
->active_tc
.gpr
[2] = ret
;
2308 info
.si_signo
= TARGET_SIGSEGV
;
2310 /* XXX: check env->error_code */
2311 info
.si_code
= TARGET_SEGV_MAPERR
;
2312 info
._sifields
._sigfault
._addr
= env
->CP0_BadVAddr
;
2313 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2317 info
.si_signo
= TARGET_SIGILL
;
2320 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2322 case EXCP_INTERRUPT
:
2323 /* just indicate that signals should be handled asap */
2329 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2332 info
.si_signo
= sig
;
2334 info
.si_code
= TARGET_TRAP_BRKPT
;
2335 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2340 if (do_store_exclusive(env
)) {
2341 info
.si_signo
= TARGET_SIGSEGV
;
2343 info
.si_code
= TARGET_SEGV_MAPERR
;
2344 info
._sifields
._sigfault
._addr
= env
->active_tc
.PC
;
2345 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2349 info
.si_signo
= TARGET_SIGILL
;
2351 info
.si_code
= TARGET_ILL_ILLOPC
;
2352 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2354 /* The code below was inspired by the MIPS Linux kernel trap
2355 * handling code in arch/mips/kernel/traps.c.
2359 abi_ulong trap_instr
;
2362 if (env
->hflags
& MIPS_HFLAG_M16
) {
2363 if (env
->insn_flags
& ASE_MICROMIPS
) {
2364 /* microMIPS mode */
2365 ret
= get_user_u16(trap_instr
, env
->active_tc
.PC
);
2370 if ((trap_instr
>> 10) == 0x11) {
2371 /* 16-bit instruction */
2372 code
= trap_instr
& 0xf;
2374 /* 32-bit instruction */
2377 ret
= get_user_u16(instr_lo
,
2378 env
->active_tc
.PC
+ 2);
2382 trap_instr
= (trap_instr
<< 16) | instr_lo
;
2383 code
= ((trap_instr
>> 6) & ((1 << 20) - 1));
2384 /* Unfortunately, microMIPS also suffers from
2385 the old assembler bug... */
2386 if (code
>= (1 << 10)) {
2392 ret
= get_user_u16(trap_instr
, env
->active_tc
.PC
);
2396 code
= (trap_instr
>> 6) & 0x3f;
2399 ret
= get_user_u32(trap_instr
, env
->active_tc
.PC
);
2404 /* As described in the original Linux kernel code, the
2405 * below checks on 'code' are to work around an old
2408 code
= ((trap_instr
>> 6) & ((1 << 20) - 1));
2409 if (code
>= (1 << 10)) {
2414 if (do_break(env
, &info
, code
) != 0) {
2421 abi_ulong trap_instr
;
2422 unsigned int code
= 0;
2424 if (env
->hflags
& MIPS_HFLAG_M16
) {
2425 /* microMIPS mode */
2428 ret
= get_user_u16(instr
[0], env
->active_tc
.PC
) ||
2429 get_user_u16(instr
[1], env
->active_tc
.PC
+ 2);
2431 trap_instr
= (instr
[0] << 16) | instr
[1];
2433 ret
= get_user_u32(trap_instr
, env
->active_tc
.PC
);
2440 /* The immediate versions don't provide a code. */
2441 if (!(trap_instr
& 0xFC000000)) {
2442 if (env
->hflags
& MIPS_HFLAG_M16
) {
2443 /* microMIPS mode */
2444 code
= ((trap_instr
>> 12) & ((1 << 4) - 1));
2446 code
= ((trap_instr
>> 6) & ((1 << 10) - 1));
2450 if (do_break(env
, &info
, code
) != 0) {
2456 cpu_exec_step_atomic(cs
);
2460 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
2463 process_pending_signals(env
);
2470 void cpu_loop(CPUNios2State
*env
)
2472 CPUState
*cs
= ENV_GET_CPU(env
);
2473 Nios2CPU
*cpu
= NIOS2_CPU(cs
);
2474 target_siginfo_t info
;
2475 int trapnr
, gdbsig
, ret
;
2479 trapnr
= cpu_exec(cs
);
2484 case EXCP_INTERRUPT
:
2485 /* just indicate that signals should be handled asap */
2488 if (env
->regs
[R_AT
] == 0) {
2490 qemu_log_mask(CPU_LOG_INT
, "\nSyscall\n");
2492 ret
= do_syscall(env
, env
->regs
[2],
2493 env
->regs
[4], env
->regs
[5], env
->regs
[6],
2494 env
->regs
[7], env
->regs
[8], env
->regs
[9],
2497 if (env
->regs
[2] == 0) { /* FIXME: syscall 0 workaround */
2501 env
->regs
[2] = abs(ret
);
2502 /* Return value is 0..4096 */
2503 env
->regs
[7] = (ret
> 0xfffffffffffff000ULL
);
2504 env
->regs
[CR_ESTATUS
] = env
->regs
[CR_STATUS
];
2505 env
->regs
[CR_STATUS
] &= ~0x3;
2506 env
->regs
[R_EA
] = env
->regs
[R_PC
] + 4;
2507 env
->regs
[R_PC
] += 4;
2510 qemu_log_mask(CPU_LOG_INT
, "\nTrap\n");
2512 env
->regs
[CR_ESTATUS
] = env
->regs
[CR_STATUS
];
2513 env
->regs
[CR_STATUS
] &= ~0x3;
2514 env
->regs
[R_EA
] = env
->regs
[R_PC
] + 4;
2515 env
->regs
[R_PC
] = cpu
->exception_addr
;
2517 gdbsig
= TARGET_SIGTRAP
;
2521 switch (env
->regs
[R_PC
]) {
2522 /*case 0x1000:*/ /* TODO:__kuser_helper_version */
2523 case 0x1004: /* __kuser_cmpxchg */
2525 if (env
->regs
[4] & 0x3) {
2528 ret
= get_user_u32(env
->regs
[2], env
->regs
[4]);
2533 env
->regs
[2] -= env
->regs
[5];
2534 if (env
->regs
[2] == 0) {
2535 put_user_u32(env
->regs
[6], env
->regs
[4]);
2538 env
->regs
[R_PC
] = env
->regs
[R_RA
];
2540 /*case 0x1040:*/ /* TODO:__kuser_sigtramp */
2544 info
.si_signo
= TARGET_SIGSEGV
;
2546 /* TODO: check env->error_code */
2547 info
.si_code
= TARGET_SEGV_MAPERR
;
2548 info
._sifields
._sigfault
._addr
= env
->regs
[R_PC
];
2549 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2553 EXCP_DUMP(env
, "\nqemu: unhandled CPU exception %#x - aborting\n",
2555 gdbsig
= TARGET_SIGILL
;
2559 gdb_handlesig(cs
, gdbsig
);
2560 if (gdbsig
!= TARGET_SIGTRAP
) {
2565 process_pending_signals(env
);
2569 #endif /* TARGET_NIOS2 */
2571 #ifdef TARGET_OPENRISC
2573 void cpu_loop(CPUOpenRISCState
*env
)
2575 CPUState
*cs
= CPU(openrisc_env_get_cpu(env
));
2581 trapnr
= cpu_exec(cs
);
2583 process_queued_cpu_work(cs
);
2588 qemu_log_mask(CPU_LOG_INT
, "\nReset request, exit, pc is %#x\n", env
->pc
);
2592 qemu_log_mask(CPU_LOG_INT
, "\nBus error, exit, pc is %#x\n", env
->pc
);
2593 gdbsig
= TARGET_SIGBUS
;
2597 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2598 gdbsig
= TARGET_SIGSEGV
;
2601 qemu_log_mask(CPU_LOG_INT
, "\nTick time interrupt pc is %#x\n", env
->pc
);
2604 qemu_log_mask(CPU_LOG_INT
, "\nAlignment pc is %#x\n", env
->pc
);
2605 gdbsig
= TARGET_SIGBUS
;
2608 qemu_log_mask(CPU_LOG_INT
, "\nIllegal instructionpc is %#x\n", env
->pc
);
2609 gdbsig
= TARGET_SIGILL
;
2612 qemu_log_mask(CPU_LOG_INT
, "\nExternal interruptpc is %#x\n", env
->pc
);
2616 qemu_log_mask(CPU_LOG_INT
, "\nTLB miss\n");
2619 qemu_log_mask(CPU_LOG_INT
, "\nRange\n");
2620 gdbsig
= TARGET_SIGSEGV
;
2623 env
->pc
+= 4; /* 0xc00; */
2624 ret
= do_syscall(env
,
2625 env
->gpr
[11], /* return value */
2626 env
->gpr
[3], /* r3 - r7 are params */
2632 if (ret
== -TARGET_ERESTARTSYS
) {
2634 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2639 qemu_log_mask(CPU_LOG_INT
, "\nFloating point error\n");
2642 qemu_log_mask(CPU_LOG_INT
, "\nTrap\n");
2643 gdbsig
= TARGET_SIGTRAP
;
2646 qemu_log_mask(CPU_LOG_INT
, "\nNR\n");
2649 cpu_exec_step_atomic(cs
);
2652 EXCP_DUMP(env
, "\nqemu: unhandled CPU exception %#x - aborting\n",
2654 gdbsig
= TARGET_SIGILL
;
2658 gdb_handlesig(cs
, gdbsig
);
2659 if (gdbsig
!= TARGET_SIGTRAP
) {
2664 process_pending_signals(env
);
2668 #endif /* TARGET_OPENRISC */
2671 void cpu_loop(CPUSH4State
*env
)
2673 CPUState
*cs
= CPU(sh_env_get_cpu(env
));
2675 target_siginfo_t info
;
2679 trapnr
= cpu_exec(cs
);
2681 process_queued_cpu_work(cs
);
2686 ret
= do_syscall(env
,
2695 if (ret
== -TARGET_ERESTARTSYS
) {
2697 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2698 env
->gregs
[0] = ret
;
2701 case EXCP_INTERRUPT
:
2702 /* just indicate that signals should be handled asap */
2708 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2711 info
.si_signo
= sig
;
2713 info
.si_code
= TARGET_TRAP_BRKPT
;
2714 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2720 info
.si_signo
= TARGET_SIGSEGV
;
2722 info
.si_code
= TARGET_SEGV_MAPERR
;
2723 info
._sifields
._sigfault
._addr
= env
->tea
;
2724 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2728 cpu_exec_step_atomic(cs
);
2731 printf ("Unhandled trap: 0x%x\n", trapnr
);
2732 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2735 process_pending_signals (env
);
2741 void cpu_loop(CPUCRISState
*env
)
2743 CPUState
*cs
= CPU(cris_env_get_cpu(env
));
2745 target_siginfo_t info
;
2749 trapnr
= cpu_exec(cs
);
2751 process_queued_cpu_work(cs
);
2756 info
.si_signo
= TARGET_SIGSEGV
;
2758 /* XXX: check env->error_code */
2759 info
.si_code
= TARGET_SEGV_MAPERR
;
2760 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
2761 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2764 case EXCP_INTERRUPT
:
2765 /* just indicate that signals should be handled asap */
2768 ret
= do_syscall(env
,
2777 if (ret
== -TARGET_ERESTARTSYS
) {
2779 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2780 env
->regs
[10] = ret
;
2787 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2790 info
.si_signo
= sig
;
2792 info
.si_code
= TARGET_TRAP_BRKPT
;
2793 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2798 cpu_exec_step_atomic(cs
);
2801 printf ("Unhandled trap: 0x%x\n", trapnr
);
2802 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2805 process_pending_signals (env
);
2810 #ifdef TARGET_MICROBLAZE
2811 void cpu_loop(CPUMBState
*env
)
2813 CPUState
*cs
= CPU(mb_env_get_cpu(env
));
2815 target_siginfo_t info
;
2819 trapnr
= cpu_exec(cs
);
2821 process_queued_cpu_work(cs
);
2826 info
.si_signo
= TARGET_SIGSEGV
;
2828 /* XXX: check env->error_code */
2829 info
.si_code
= TARGET_SEGV_MAPERR
;
2830 info
._sifields
._sigfault
._addr
= 0;
2831 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2834 case EXCP_INTERRUPT
:
2835 /* just indicate that signals should be handled asap */
2838 /* Return address is 4 bytes after the call. */
2840 env
->sregs
[SR_PC
] = env
->regs
[14];
2841 ret
= do_syscall(env
,
2850 if (ret
== -TARGET_ERESTARTSYS
) {
2851 /* Wind back to before the syscall. */
2852 env
->sregs
[SR_PC
] -= 4;
2853 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2856 /* All syscall exits result in guest r14 being equal to the
2857 * PC we return to, because the kernel syscall exit "rtbd" does
2858 * this. (This is true even for sigreturn(); note that r14 is
2859 * not a userspace-usable register, as the kernel may clobber it
2862 env
->regs
[14] = env
->sregs
[SR_PC
];
2865 env
->regs
[17] = env
->sregs
[SR_PC
] + 4;
2866 if (env
->iflags
& D_FLAG
) {
2867 env
->sregs
[SR_ESR
] |= 1 << 12;
2868 env
->sregs
[SR_PC
] -= 4;
2869 /* FIXME: if branch was immed, replay the imm as well. */
2872 env
->iflags
&= ~(IMM_FLAG
| D_FLAG
);
2874 switch (env
->sregs
[SR_ESR
] & 31) {
2875 case ESR_EC_DIVZERO
:
2876 info
.si_signo
= TARGET_SIGFPE
;
2878 info
.si_code
= TARGET_FPE_FLTDIV
;
2879 info
._sifields
._sigfault
._addr
= 0;
2880 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2883 info
.si_signo
= TARGET_SIGFPE
;
2885 if (env
->sregs
[SR_FSR
] & FSR_IO
) {
2886 info
.si_code
= TARGET_FPE_FLTINV
;
2888 if (env
->sregs
[SR_FSR
] & FSR_DZ
) {
2889 info
.si_code
= TARGET_FPE_FLTDIV
;
2891 info
._sifields
._sigfault
._addr
= 0;
2892 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2895 printf ("Unhandled hw-exception: 0x%x\n",
2896 env
->sregs
[SR_ESR
] & ESR_EC_MASK
);
2897 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2906 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2909 info
.si_signo
= sig
;
2911 info
.si_code
= TARGET_TRAP_BRKPT
;
2912 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2917 cpu_exec_step_atomic(cs
);
2920 printf ("Unhandled trap: 0x%x\n", trapnr
);
2921 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2924 process_pending_signals (env
);
2931 void cpu_loop(CPUM68KState
*env
)
2933 CPUState
*cs
= CPU(m68k_env_get_cpu(env
));
2936 target_siginfo_t info
;
2937 TaskState
*ts
= cs
->opaque
;
2941 trapnr
= cpu_exec(cs
);
2943 process_queued_cpu_work(cs
);
2948 if (ts
->sim_syscalls
) {
2950 get_user_u16(nr
, env
->pc
+ 2);
2952 do_m68k_simcall(env
, nr
);
2958 case EXCP_HALT_INSN
:
2959 /* Semihosing syscall. */
2961 do_m68k_semihosting(env
, env
->dregs
[0]);
2965 case EXCP_UNSUPPORTED
:
2967 info
.si_signo
= TARGET_SIGILL
;
2969 info
.si_code
= TARGET_ILL_ILLOPN
;
2970 info
._sifields
._sigfault
._addr
= env
->pc
;
2971 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2974 info
.si_signo
= TARGET_SIGFPE
;
2976 info
.si_code
= TARGET_FPE_INTDIV
;
2977 info
._sifields
._sigfault
._addr
= env
->pc
;
2978 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2983 ts
->sim_syscalls
= 0;
2986 ret
= do_syscall(env
,
2995 if (ret
== -TARGET_ERESTARTSYS
) {
2997 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2998 env
->dregs
[0] = ret
;
3002 case EXCP_INTERRUPT
:
3003 /* just indicate that signals should be handled asap */
3007 info
.si_signo
= TARGET_SIGSEGV
;
3009 /* XXX: check env->error_code */
3010 info
.si_code
= TARGET_SEGV_MAPERR
;
3011 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
3012 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3019 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3022 info
.si_signo
= sig
;
3024 info
.si_code
= TARGET_TRAP_BRKPT
;
3025 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3030 cpu_exec_step_atomic(cs
);
3033 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
3036 process_pending_signals(env
);
3039 #endif /* TARGET_M68K */
3042 void cpu_loop(CPUAlphaState
*env
)
3044 CPUState
*cs
= CPU(alpha_env_get_cpu(env
));
3046 target_siginfo_t info
;
3051 trapnr
= cpu_exec(cs
);
3053 process_queued_cpu_work(cs
);
3055 /* All of the traps imply a transition through PALcode, which
3056 implies an REI instruction has been executed. Which means
3057 that the intr_flag should be cleared. */
3062 fprintf(stderr
, "Reset requested. Exit\n");
3066 fprintf(stderr
, "Machine check exception. Exit\n");
3069 case EXCP_SMP_INTERRUPT
:
3070 case EXCP_CLK_INTERRUPT
:
3071 case EXCP_DEV_INTERRUPT
:
3072 fprintf(stderr
, "External interrupt. Exit\n");
3076 env
->lock_addr
= -1;
3077 info
.si_signo
= TARGET_SIGSEGV
;
3079 info
.si_code
= (page_get_flags(env
->trap_arg0
) & PAGE_VALID
3080 ? TARGET_SEGV_ACCERR
: TARGET_SEGV_MAPERR
);
3081 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
3082 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3085 env
->lock_addr
= -1;
3086 info
.si_signo
= TARGET_SIGBUS
;
3088 info
.si_code
= TARGET_BUS_ADRALN
;
3089 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
3090 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3094 env
->lock_addr
= -1;
3095 info
.si_signo
= TARGET_SIGILL
;
3097 info
.si_code
= TARGET_ILL_ILLOPC
;
3098 info
._sifields
._sigfault
._addr
= env
->pc
;
3099 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3102 env
->lock_addr
= -1;
3103 info
.si_signo
= TARGET_SIGFPE
;
3105 info
.si_code
= TARGET_FPE_FLTINV
;
3106 info
._sifields
._sigfault
._addr
= env
->pc
;
3107 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3110 /* No-op. Linux simply re-enables the FPU. */
3113 env
->lock_addr
= -1;
3114 switch (env
->error_code
) {
3117 info
.si_signo
= TARGET_SIGTRAP
;
3119 info
.si_code
= TARGET_TRAP_BRKPT
;
3120 info
._sifields
._sigfault
._addr
= env
->pc
;
3121 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3125 info
.si_signo
= TARGET_SIGTRAP
;
3128 info
._sifields
._sigfault
._addr
= env
->pc
;
3129 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3133 trapnr
= env
->ir
[IR_V0
];
3134 sysret
= do_syscall(env
, trapnr
,
3135 env
->ir
[IR_A0
], env
->ir
[IR_A1
],
3136 env
->ir
[IR_A2
], env
->ir
[IR_A3
],
3137 env
->ir
[IR_A4
], env
->ir
[IR_A5
],
3139 if (sysret
== -TARGET_ERESTARTSYS
) {
3143 if (sysret
== -TARGET_QEMU_ESIGRETURN
) {
3146 /* Syscall writes 0 to V0 to bypass error check, similar
3147 to how this is handled internal to Linux kernel.
3148 (Ab)use trapnr temporarily as boolean indicating error. */
3149 trapnr
= (env
->ir
[IR_V0
] != 0 && sysret
< 0);
3150 env
->ir
[IR_V0
] = (trapnr
? -sysret
: sysret
);
3151 env
->ir
[IR_A3
] = trapnr
;
3155 /* ??? We can probably elide the code using page_unprotect
3156 that is checking for self-modifying code. Instead we
3157 could simply call tb_flush here. Until we work out the
3158 changes required to turn off the extra write protection,
3159 this can be a no-op. */
3163 /* Handled in the translator for usermode. */
3167 /* Handled in the translator for usermode. */
3171 info
.si_signo
= TARGET_SIGFPE
;
3172 switch (env
->ir
[IR_A0
]) {
3173 case TARGET_GEN_INTOVF
:
3174 info
.si_code
= TARGET_FPE_INTOVF
;
3176 case TARGET_GEN_INTDIV
:
3177 info
.si_code
= TARGET_FPE_INTDIV
;
3179 case TARGET_GEN_FLTOVF
:
3180 info
.si_code
= TARGET_FPE_FLTOVF
;
3182 case TARGET_GEN_FLTUND
:
3183 info
.si_code
= TARGET_FPE_FLTUND
;
3185 case TARGET_GEN_FLTINV
:
3186 info
.si_code
= TARGET_FPE_FLTINV
;
3188 case TARGET_GEN_FLTINE
:
3189 info
.si_code
= TARGET_FPE_FLTRES
;
3191 case TARGET_GEN_ROPRAND
:
3195 info
.si_signo
= TARGET_SIGTRAP
;
3200 info
._sifields
._sigfault
._addr
= env
->pc
;
3201 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3208 info
.si_signo
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3209 if (info
.si_signo
) {
3210 env
->lock_addr
= -1;
3212 info
.si_code
= TARGET_TRAP_BRKPT
;
3213 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3216 case EXCP_INTERRUPT
:
3217 /* Just indicate that signals should be handled asap. */
3220 cpu_exec_step_atomic(cs
);
3223 printf ("Unhandled trap: 0x%x\n", trapnr
);
3224 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3227 process_pending_signals (env
);
3230 #endif /* TARGET_ALPHA */
3233 void cpu_loop(CPUS390XState
*env
)
3235 CPUState
*cs
= CPU(s390_env_get_cpu(env
));
3237 target_siginfo_t info
;
3243 trapnr
= cpu_exec(cs
);
3245 process_queued_cpu_work(cs
);
3248 case EXCP_INTERRUPT
:
3249 /* Just indicate that signals should be handled asap. */
3253 n
= env
->int_svc_code
;
3255 /* syscalls > 255 */
3258 env
->psw
.addr
+= env
->int_svc_ilen
;
3259 ret
= do_syscall(env
, n
, env
->regs
[2], env
->regs
[3],
3260 env
->regs
[4], env
->regs
[5],
3261 env
->regs
[6], env
->regs
[7], 0, 0);
3262 if (ret
== -TARGET_ERESTARTSYS
) {
3263 env
->psw
.addr
-= env
->int_svc_ilen
;
3264 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
3270 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3272 n
= TARGET_TRAP_BRKPT
;
3277 n
= env
->int_pgm_code
;
3280 case PGM_PRIVILEGED
:
3281 sig
= TARGET_SIGILL
;
3282 n
= TARGET_ILL_ILLOPC
;
3284 case PGM_PROTECTION
:
3285 case PGM_ADDRESSING
:
3286 sig
= TARGET_SIGSEGV
;
3287 /* XXX: check env->error_code */
3288 n
= TARGET_SEGV_MAPERR
;
3289 addr
= env
->__excp_addr
;
3292 case PGM_SPECIFICATION
:
3293 case PGM_SPECIAL_OP
:
3296 sig
= TARGET_SIGILL
;
3297 n
= TARGET_ILL_ILLOPN
;
3300 case PGM_FIXPT_OVERFLOW
:
3301 sig
= TARGET_SIGFPE
;
3302 n
= TARGET_FPE_INTOVF
;
3304 case PGM_FIXPT_DIVIDE
:
3305 sig
= TARGET_SIGFPE
;
3306 n
= TARGET_FPE_INTDIV
;
3310 n
= (env
->fpc
>> 8) & 0xff;
3312 /* compare-and-trap */
3315 /* An IEEE exception, simulated or otherwise. */
3317 n
= TARGET_FPE_FLTINV
;
3318 } else if (n
& 0x40) {
3319 n
= TARGET_FPE_FLTDIV
;
3320 } else if (n
& 0x20) {
3321 n
= TARGET_FPE_FLTOVF
;
3322 } else if (n
& 0x10) {
3323 n
= TARGET_FPE_FLTUND
;
3324 } else if (n
& 0x08) {
3325 n
= TARGET_FPE_FLTRES
;
3327 /* ??? Quantum exception; BFP, DFP error. */
3330 sig
= TARGET_SIGFPE
;
3335 fprintf(stderr
, "Unhandled program exception: %#x\n", n
);
3336 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3342 addr
= env
->psw
.addr
;
3344 info
.si_signo
= sig
;
3347 info
._sifields
._sigfault
._addr
= addr
;
3348 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3352 cpu_exec_step_atomic(cs
);
3355 fprintf(stderr
, "Unhandled trap: 0x%x\n", trapnr
);
3356 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3359 process_pending_signals (env
);
3363 #endif /* TARGET_S390X */
3365 #ifdef TARGET_TILEGX
3367 static void gen_sigill_reg(CPUTLGState
*env
)
3369 target_siginfo_t info
;
3371 info
.si_signo
= TARGET_SIGILL
;
3373 info
.si_code
= TARGET_ILL_PRVREG
;
3374 info
._sifields
._sigfault
._addr
= env
->pc
;
3375 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3378 static void do_signal(CPUTLGState
*env
, int signo
, int sigcode
)
3380 target_siginfo_t info
;
3382 info
.si_signo
= signo
;
3384 info
._sifields
._sigfault
._addr
= env
->pc
;
3386 if (signo
== TARGET_SIGSEGV
) {
3387 /* The passed in sigcode is a dummy; check for a page mapping
3388 and pass either MAPERR or ACCERR. */
3389 target_ulong addr
= env
->excaddr
;
3390 info
._sifields
._sigfault
._addr
= addr
;
3391 if (page_check_range(addr
, 1, PAGE_VALID
) < 0) {
3392 sigcode
= TARGET_SEGV_MAPERR
;
3394 sigcode
= TARGET_SEGV_ACCERR
;
3397 info
.si_code
= sigcode
;
3399 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3402 static void gen_sigsegv_maperr(CPUTLGState
*env
, target_ulong addr
)
3404 env
->excaddr
= addr
;
3405 do_signal(env
, TARGET_SIGSEGV
, 0);
3408 static void set_regval(CPUTLGState
*env
, uint8_t reg
, uint64_t val
)
3410 if (unlikely(reg
>= TILEGX_R_COUNT
)) {
3421 gen_sigill_reg(env
);
3424 g_assert_not_reached();
3427 env
->regs
[reg
] = val
;
3431 * Compare the 8-byte contents of the CmpValue SPR with the 8-byte value in
3432 * memory at the address held in the first source register. If the values are
3433 * not equal, then no memory operation is performed. If the values are equal,
3434 * the 8-byte quantity from the second source register is written into memory
3435 * at the address held in the first source register. In either case, the result
3436 * of the instruction is the value read from memory. The compare and write to
3437 * memory are atomic and thus can be used for synchronization purposes. This
3438 * instruction only operates for addresses aligned to a 8-byte boundary.
3439 * Unaligned memory access causes an Unaligned Data Reference interrupt.
3441 * Functional Description (64-bit)
3442 * uint64_t memVal = memoryReadDoubleWord (rf[SrcA]);
3443 * rf[Dest] = memVal;
3444 * if (memVal == SPR[CmpValueSPR])
3445 * memoryWriteDoubleWord (rf[SrcA], rf[SrcB]);
3447 * Functional Description (32-bit)
3448 * uint64_t memVal = signExtend32 (memoryReadWord (rf[SrcA]));
3449 * rf[Dest] = memVal;
3450 * if (memVal == signExtend32 (SPR[CmpValueSPR]))
3451 * memoryWriteWord (rf[SrcA], rf[SrcB]);
3454 * This function also processes exch and exch4 which need not process SPR.
3456 static void do_exch(CPUTLGState
*env
, bool quad
, bool cmp
)
3459 target_long val
, sprval
;
3463 addr
= env
->atomic_srca
;
3464 if (quad
? get_user_s64(val
, addr
) : get_user_s32(val
, addr
)) {
3465 goto sigsegv_maperr
;
3470 sprval
= env
->spregs
[TILEGX_SPR_CMPEXCH
];
3472 sprval
= sextract64(env
->spregs
[TILEGX_SPR_CMPEXCH
], 0, 32);
3476 if (!cmp
|| val
== sprval
) {
3477 target_long valb
= env
->atomic_srcb
;
3478 if (quad
? put_user_u64(valb
, addr
) : put_user_u32(valb
, addr
)) {
3479 goto sigsegv_maperr
;
3483 set_regval(env
, env
->atomic_dstr
, val
);
3489 gen_sigsegv_maperr(env
, addr
);
3492 static void do_fetch(CPUTLGState
*env
, int trapnr
, bool quad
)
3496 target_long val
, valb
;
3500 addr
= env
->atomic_srca
;
3501 valb
= env
->atomic_srcb
;
3502 if (quad
? get_user_s64(val
, addr
) : get_user_s32(val
, addr
)) {
3503 goto sigsegv_maperr
;
3507 case TILEGX_EXCP_OPCODE_FETCHADD
:
3508 case TILEGX_EXCP_OPCODE_FETCHADD4
:
3511 case TILEGX_EXCP_OPCODE_FETCHADDGEZ
:
3517 case TILEGX_EXCP_OPCODE_FETCHADDGEZ4
:
3519 if ((int32_t)valb
< 0) {
3523 case TILEGX_EXCP_OPCODE_FETCHAND
:
3524 case TILEGX_EXCP_OPCODE_FETCHAND4
:
3527 case TILEGX_EXCP_OPCODE_FETCHOR
:
3528 case TILEGX_EXCP_OPCODE_FETCHOR4
:
3532 g_assert_not_reached();
3536 if (quad
? put_user_u64(valb
, addr
) : put_user_u32(valb
, addr
)) {
3537 goto sigsegv_maperr
;
3541 set_regval(env
, env
->atomic_dstr
, val
);
3547 gen_sigsegv_maperr(env
, addr
);
3550 void cpu_loop(CPUTLGState
*env
)
3552 CPUState
*cs
= CPU(tilegx_env_get_cpu(env
));
3557 trapnr
= cpu_exec(cs
);
3559 process_queued_cpu_work(cs
);
3562 case TILEGX_EXCP_SYSCALL
:
3564 abi_ulong ret
= do_syscall(env
, env
->regs
[TILEGX_R_NR
],
3565 env
->regs
[0], env
->regs
[1],
3566 env
->regs
[2], env
->regs
[3],
3567 env
->regs
[4], env
->regs
[5],
3568 env
->regs
[6], env
->regs
[7]);
3569 if (ret
== -TARGET_ERESTARTSYS
) {
3571 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
3572 env
->regs
[TILEGX_R_RE
] = ret
;
3573 env
->regs
[TILEGX_R_ERR
] = TILEGX_IS_ERRNO(ret
) ? -ret
: 0;
3577 case TILEGX_EXCP_OPCODE_EXCH
:
3578 do_exch(env
, true, false);
3580 case TILEGX_EXCP_OPCODE_EXCH4
:
3581 do_exch(env
, false, false);
3583 case TILEGX_EXCP_OPCODE_CMPEXCH
:
3584 do_exch(env
, true, true);
3586 case TILEGX_EXCP_OPCODE_CMPEXCH4
:
3587 do_exch(env
, false, true);
3589 case TILEGX_EXCP_OPCODE_FETCHADD
:
3590 case TILEGX_EXCP_OPCODE_FETCHADDGEZ
:
3591 case TILEGX_EXCP_OPCODE_FETCHAND
:
3592 case TILEGX_EXCP_OPCODE_FETCHOR
:
3593 do_fetch(env
, trapnr
, true);
3595 case TILEGX_EXCP_OPCODE_FETCHADD4
:
3596 case TILEGX_EXCP_OPCODE_FETCHADDGEZ4
:
3597 case TILEGX_EXCP_OPCODE_FETCHAND4
:
3598 case TILEGX_EXCP_OPCODE_FETCHOR4
:
3599 do_fetch(env
, trapnr
, false);
3601 case TILEGX_EXCP_SIGNAL
:
3602 do_signal(env
, env
->signo
, env
->sigcode
);
3604 case TILEGX_EXCP_REG_IDN_ACCESS
:
3605 case TILEGX_EXCP_REG_UDN_ACCESS
:
3606 gen_sigill_reg(env
);
3609 cpu_exec_step_atomic(cs
);
3612 fprintf(stderr
, "trapnr is %d[0x%x].\n", trapnr
, trapnr
);
3613 g_assert_not_reached();
3615 process_pending_signals(env
);
3623 static abi_ulong
hppa_lws(CPUHPPAState
*env
)
3625 uint32_t which
= env
->gr
[20];
3626 abi_ulong addr
= env
->gr
[26];
3627 abi_ulong old
= env
->gr
[25];
3628 abi_ulong
new = env
->gr
[24];
3629 abi_ulong size
, ret
;
3633 return -TARGET_ENOSYS
;
3635 case 0: /* elf32 atomic 32bit cmpxchg */
3636 if ((addr
& 3) || !access_ok(VERIFY_WRITE
, addr
, 4)) {
3637 return -TARGET_EFAULT
;
3641 ret
= atomic_cmpxchg((uint32_t *)g2h(addr
), old
, new);
3645 case 2: /* elf32 atomic "new" cmpxchg */
3648 return -TARGET_ENOSYS
;
3650 if (((addr
| old
| new) & ((1 << size
) - 1))
3651 || !access_ok(VERIFY_WRITE
, addr
, 1 << size
)
3652 || !access_ok(VERIFY_READ
, old
, 1 << size
)
3653 || !access_ok(VERIFY_READ
, new, 1 << size
)) {
3654 return -TARGET_EFAULT
;
3656 /* Note that below we use host-endian loads so that the cmpxchg
3657 can be host-endian as well. */
3660 old
= *(uint8_t *)g2h(old
);
3661 new = *(uint8_t *)g2h(new);
3662 ret
= atomic_cmpxchg((uint8_t *)g2h(addr
), old
, new);
3666 old
= *(uint16_t *)g2h(old
);
3667 new = *(uint16_t *)g2h(new);
3668 ret
= atomic_cmpxchg((uint16_t *)g2h(addr
), old
, new);
3672 old
= *(uint32_t *)g2h(old
);
3673 new = *(uint32_t *)g2h(new);
3674 ret
= atomic_cmpxchg((uint32_t *)g2h(addr
), old
, new);
3679 uint64_t o64
, n64
, r64
;
3680 o64
= *(uint64_t *)g2h(old
);
3681 n64
= *(uint64_t *)g2h(new);
3682 #ifdef CONFIG_ATOMIC64
3683 r64
= atomic_cmpxchg__nocheck((uint64_t *)g2h(addr
), o64
, n64
);
3687 r64
= *(uint64_t *)g2h(addr
);
3690 *(uint64_t *)g2h(addr
) = n64
;
3705 void cpu_loop(CPUHPPAState
*env
)
3707 CPUState
*cs
= CPU(hppa_env_get_cpu(env
));
3708 target_siginfo_t info
;
3714 trapnr
= cpu_exec(cs
);
3716 process_queued_cpu_work(cs
);
3720 ret
= do_syscall(env
, env
->gr
[20],
3721 env
->gr
[26], env
->gr
[25],
3722 env
->gr
[24], env
->gr
[23],
3723 env
->gr
[22], env
->gr
[21], 0, 0);
3727 /* We arrived here by faking the gateway page. Return. */
3728 env
->iaoq_f
= env
->gr
[31];
3729 env
->iaoq_b
= env
->gr
[31] + 4;
3731 case -TARGET_ERESTARTSYS
:
3732 case -TARGET_QEMU_ESIGRETURN
:
3736 case EXCP_SYSCALL_LWS
:
3737 env
->gr
[21] = hppa_lws(env
);
3738 /* We arrived here by faking the gateway page. Return. */
3739 env
->iaoq_f
= env
->gr
[31];
3740 env
->iaoq_b
= env
->gr
[31] + 4;
3743 info
.si_signo
= TARGET_SIGSEGV
;
3745 info
.si_code
= TARGET_SEGV_ACCERR
;
3746 info
._sifields
._sigfault
._addr
= env
->ior
;
3747 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3750 info
.si_signo
= TARGET_SIGILL
;
3752 info
.si_code
= TARGET_ILL_ILLOPN
;
3753 info
._sifields
._sigfault
._addr
= env
->iaoq_f
;
3754 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3757 info
.si_signo
= TARGET_SIGFPE
;
3760 info
._sifields
._sigfault
._addr
= env
->iaoq_f
;
3761 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3764 trapnr
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3766 info
.si_signo
= trapnr
;
3768 info
.si_code
= TARGET_TRAP_BRKPT
;
3769 queue_signal(env
, trapnr
, QEMU_SI_FAULT
, &info
);
3772 case EXCP_INTERRUPT
:
3773 /* just indicate that signals should be handled asap */
3776 g_assert_not_reached();
3778 process_pending_signals(env
);
3782 #endif /* TARGET_HPPA */
3784 THREAD CPUState
*thread_cpu
;
3786 bool qemu_cpu_is_self(CPUState
*cpu
)
3788 return thread_cpu
== cpu
;
3791 void qemu_cpu_kick(CPUState
*cpu
)
3796 void task_settid(TaskState
*ts
)
3798 if (ts
->ts_tid
== 0) {
3799 ts
->ts_tid
= (pid_t
)syscall(SYS_gettid
);
3803 void stop_all_tasks(void)
3806 * We trust that when using NPTL, start_exclusive()
3807 * handles thread stopping correctly.
3812 /* Assumes contents are already zeroed. */
3813 void init_task_state(TaskState
*ts
)
3818 CPUArchState
*cpu_copy(CPUArchState
*env
)
3820 CPUState
*cpu
= ENV_GET_CPU(env
);
3821 CPUState
*new_cpu
= cpu_init(cpu_model
);
3822 CPUArchState
*new_env
= new_cpu
->env_ptr
;
3826 /* Reset non arch specific state */
3829 memcpy(new_env
, env
, sizeof(CPUArchState
));
3831 /* Clone all break/watchpoints.
3832 Note: Once we support ptrace with hw-debug register access, make sure
3833 BP_CPU break/watchpoints are handled correctly on clone. */
3834 QTAILQ_INIT(&new_cpu
->breakpoints
);
3835 QTAILQ_INIT(&new_cpu
->watchpoints
);
3836 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
3837 cpu_breakpoint_insert(new_cpu
, bp
->pc
, bp
->flags
, NULL
);
3839 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
3840 cpu_watchpoint_insert(new_cpu
, wp
->vaddr
, wp
->len
, wp
->flags
, NULL
);
3846 static void handle_arg_help(const char *arg
)
3848 usage(EXIT_SUCCESS
);
3851 static void handle_arg_log(const char *arg
)
3855 mask
= qemu_str_to_log_mask(arg
);
3857 qemu_print_log_usage(stdout
);
3860 qemu_log_needs_buffers();
3864 static void handle_arg_log_filename(const char *arg
)
3866 qemu_set_log_filename(arg
, &error_fatal
);
3869 static void handle_arg_set_env(const char *arg
)
3871 char *r
, *p
, *token
;
3872 r
= p
= strdup(arg
);
3873 while ((token
= strsep(&p
, ",")) != NULL
) {
3874 if (envlist_setenv(envlist
, token
) != 0) {
3875 usage(EXIT_FAILURE
);
3881 static void handle_arg_unset_env(const char *arg
)
3883 char *r
, *p
, *token
;
3884 r
= p
= strdup(arg
);
3885 while ((token
= strsep(&p
, ",")) != NULL
) {
3886 if (envlist_unsetenv(envlist
, token
) != 0) {
3887 usage(EXIT_FAILURE
);
3893 static void handle_arg_argv0(const char *arg
)
3895 argv0
= strdup(arg
);
3898 static void handle_arg_stack_size(const char *arg
)
3901 guest_stack_size
= strtoul(arg
, &p
, 0);
3902 if (guest_stack_size
== 0) {
3903 usage(EXIT_FAILURE
);
3907 guest_stack_size
*= 1024 * 1024;
3908 } else if (*p
== 'k' || *p
== 'K') {
3909 guest_stack_size
*= 1024;
3913 static void handle_arg_ld_prefix(const char *arg
)
3915 interp_prefix
= strdup(arg
);
3918 static void handle_arg_pagesize(const char *arg
)
3920 qemu_host_page_size
= atoi(arg
);
3921 if (qemu_host_page_size
== 0 ||
3922 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
3923 fprintf(stderr
, "page size must be a power of two\n");
3928 static void handle_arg_randseed(const char *arg
)
3930 unsigned long long seed
;
3932 if (parse_uint_full(arg
, &seed
, 0) != 0 || seed
> UINT_MAX
) {
3933 fprintf(stderr
, "Invalid seed number: %s\n", arg
);
3939 static void handle_arg_gdb(const char *arg
)
3941 gdbstub_port
= atoi(arg
);
3944 static void handle_arg_uname(const char *arg
)
3946 qemu_uname_release
= strdup(arg
);
3949 static void handle_arg_cpu(const char *arg
)
3951 cpu_model
= strdup(arg
);
3952 if (cpu_model
== NULL
|| is_help_option(cpu_model
)) {
3953 /* XXX: implement xxx_cpu_list for targets that still miss it */
3954 #if defined(cpu_list)
3955 cpu_list(stdout
, &fprintf
);
3961 static void handle_arg_guest_base(const char *arg
)
3963 guest_base
= strtol(arg
, NULL
, 0);
3964 have_guest_base
= 1;
3967 static void handle_arg_reserved_va(const char *arg
)
3971 reserved_va
= strtoul(arg
, &p
, 0);
3985 unsigned long unshifted
= reserved_va
;
3987 reserved_va
<<= shift
;
3988 if (((reserved_va
>> shift
) != unshifted
)
3989 #if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3990 || (reserved_va
> (1ul << TARGET_VIRT_ADDR_SPACE_BITS
))
3993 fprintf(stderr
, "Reserved virtual address too big\n");
3998 fprintf(stderr
, "Unrecognised -R size suffix '%s'\n", p
);
4003 static void handle_arg_singlestep(const char *arg
)
4008 static void handle_arg_strace(const char *arg
)
4013 static void handle_arg_version(const char *arg
)
4015 printf("qemu-" TARGET_NAME
" version " QEMU_VERSION QEMU_PKGVERSION
4016 "\n" QEMU_COPYRIGHT
"\n");
4020 static char *trace_file
;
4021 static void handle_arg_trace(const char *arg
)
4024 trace_file
= trace_opt_parse(arg
);
4027 struct qemu_argument
{
4031 void (*handle_opt
)(const char *arg
);
4032 const char *example
;
4036 static const struct qemu_argument arg_table
[] = {
4037 {"h", "", false, handle_arg_help
,
4038 "", "print this help"},
4039 {"help", "", false, handle_arg_help
,
4041 {"g", "QEMU_GDB", true, handle_arg_gdb
,
4042 "port", "wait gdb connection to 'port'"},
4043 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix
,
4044 "path", "set the elf interpreter prefix to 'path'"},
4045 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size
,
4046 "size", "set the stack size to 'size' bytes"},
4047 {"cpu", "QEMU_CPU", true, handle_arg_cpu
,
4048 "model", "select CPU (-cpu help for list)"},
4049 {"E", "QEMU_SET_ENV", true, handle_arg_set_env
,
4050 "var=value", "sets targets environment variable (see below)"},
4051 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env
,
4052 "var", "unsets targets environment variable (see below)"},
4053 {"0", "QEMU_ARGV0", true, handle_arg_argv0
,
4054 "argv0", "forces target process argv[0] to be 'argv0'"},
4055 {"r", "QEMU_UNAME", true, handle_arg_uname
,
4056 "uname", "set qemu uname release string to 'uname'"},
4057 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base
,
4058 "address", "set guest_base address to 'address'"},
4059 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va
,
4060 "size", "reserve 'size' bytes for guest virtual address space"},
4061 {"d", "QEMU_LOG", true, handle_arg_log
,
4062 "item[,...]", "enable logging of specified items "
4063 "(use '-d help' for a list of items)"},
4064 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename
,
4065 "logfile", "write logs to 'logfile' (default stderr)"},
4066 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize
,
4067 "pagesize", "set the host page size to 'pagesize'"},
4068 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep
,
4069 "", "run in singlestep mode"},
4070 {"strace", "QEMU_STRACE", false, handle_arg_strace
,
4071 "", "log system calls"},
4072 {"seed", "QEMU_RAND_SEED", true, handle_arg_randseed
,
4073 "", "Seed for pseudo-random number generator"},
4074 {"trace", "QEMU_TRACE", true, handle_arg_trace
,
4075 "", "[[enable=]<pattern>][,events=<file>][,file=<file>]"},
4076 {"version", "QEMU_VERSION", false, handle_arg_version
,
4077 "", "display version information and exit"},
4078 {NULL
, NULL
, false, NULL
, NULL
, NULL
}
4081 static void usage(int exitcode
)
4083 const struct qemu_argument
*arginfo
;
4087 printf("usage: qemu-" TARGET_NAME
" [options] program [arguments...]\n"
4088 "Linux CPU emulator (compiled for " TARGET_NAME
" emulation)\n"
4090 "Options and associated environment variables:\n"
4093 /* Calculate column widths. We must always have at least enough space
4094 * for the column header.
4096 maxarglen
= strlen("Argument");
4097 maxenvlen
= strlen("Env-variable");
4099 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4100 int arglen
= strlen(arginfo
->argv
);
4101 if (arginfo
->has_arg
) {
4102 arglen
+= strlen(arginfo
->example
) + 1;
4104 if (strlen(arginfo
->env
) > maxenvlen
) {
4105 maxenvlen
= strlen(arginfo
->env
);
4107 if (arglen
> maxarglen
) {
4112 printf("%-*s %-*s Description\n", maxarglen
+1, "Argument",
4113 maxenvlen
, "Env-variable");
4115 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4116 if (arginfo
->has_arg
) {
4117 printf("-%s %-*s %-*s %s\n", arginfo
->argv
,
4118 (int)(maxarglen
- strlen(arginfo
->argv
) - 1),
4119 arginfo
->example
, maxenvlen
, arginfo
->env
, arginfo
->help
);
4121 printf("-%-*s %-*s %s\n", maxarglen
, arginfo
->argv
,
4122 maxenvlen
, arginfo
->env
,
4129 "QEMU_LD_PREFIX = %s\n"
4130 "QEMU_STACK_SIZE = %ld byte\n",
4135 "You can use -E and -U options or the QEMU_SET_ENV and\n"
4136 "QEMU_UNSET_ENV environment variables to set and unset\n"
4137 "environment variables for the target process.\n"
4138 "It is possible to provide several variables by separating them\n"
4139 "by commas in getsubopt(3) style. Additionally it is possible to\n"
4140 "provide the -E and -U options multiple times.\n"
4141 "The following lines are equivalent:\n"
4142 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
4143 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
4144 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
4145 "Note that if you provide several changes to a single variable\n"
4146 "the last change will stay in effect.\n");
4151 static int parse_args(int argc
, char **argv
)
4155 const struct qemu_argument
*arginfo
;
4157 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4158 if (arginfo
->env
== NULL
) {
4162 r
= getenv(arginfo
->env
);
4164 arginfo
->handle_opt(r
);
4170 if (optind
>= argc
) {
4179 if (!strcmp(r
, "-")) {
4182 /* Treat --foo the same as -foo. */
4187 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4188 if (!strcmp(r
, arginfo
->argv
)) {
4189 if (arginfo
->has_arg
) {
4190 if (optind
>= argc
) {
4191 (void) fprintf(stderr
,
4192 "qemu: missing argument for option '%s'\n", r
);
4195 arginfo
->handle_opt(argv
[optind
]);
4198 arginfo
->handle_opt(NULL
);
4204 /* no option matched the current argv */
4205 if (arginfo
->handle_opt
== NULL
) {
4206 (void) fprintf(stderr
, "qemu: unknown option '%s'\n", r
);
4211 if (optind
>= argc
) {
4212 (void) fprintf(stderr
, "qemu: no user program specified\n");
4216 filename
= argv
[optind
];
4217 exec_path
= argv
[optind
];
4222 int main(int argc
, char **argv
, char **envp
)
4224 struct target_pt_regs regs1
, *regs
= ®s1
;
4225 struct image_info info1
, *info
= &info1
;
4226 struct linux_binprm bprm
;
4231 char **target_environ
, **wrk
;
4238 module_call_init(MODULE_INIT_TRACE
);
4239 qemu_init_cpu_list();
4240 module_call_init(MODULE_INIT_QOM
);
4242 if ((envlist
= envlist_create()) == NULL
) {
4243 (void) fprintf(stderr
, "Unable to allocate envlist\n");
4247 /* add current environment into the list */
4248 for (wrk
= environ
; *wrk
!= NULL
; wrk
++) {
4249 (void) envlist_setenv(envlist
, *wrk
);
4252 /* Read the stack limit from the kernel. If it's "unlimited",
4253 then we can do little else besides use the default. */
4256 if (getrlimit(RLIMIT_STACK
, &lim
) == 0
4257 && lim
.rlim_cur
!= RLIM_INFINITY
4258 && lim
.rlim_cur
== (target_long
)lim
.rlim_cur
) {
4259 guest_stack_size
= lim
.rlim_cur
;
4267 qemu_add_opts(&qemu_trace_opts
);
4269 optind
= parse_args(argc
, argv
);
4271 if (!trace_init_backends()) {
4274 trace_init_file(trace_file
);
4277 memset(regs
, 0, sizeof(struct target_pt_regs
));
4279 /* Zero out image_info */
4280 memset(info
, 0, sizeof(struct image_info
));
4282 memset(&bprm
, 0, sizeof (bprm
));
4284 /* Scan interp_prefix dir for replacement files. */
4285 init_paths(interp_prefix
);
4287 init_qemu_uname_release();
4289 if (cpu_model
== NULL
) {
4290 #if defined(TARGET_I386)
4291 #ifdef TARGET_X86_64
4292 cpu_model
= "qemu64";
4294 cpu_model
= "qemu32";
4296 #elif defined(TARGET_ARM)
4298 #elif defined(TARGET_UNICORE32)
4300 #elif defined(TARGET_M68K)
4302 #elif defined(TARGET_SPARC)
4303 #ifdef TARGET_SPARC64
4304 cpu_model
= "TI UltraSparc II";
4306 cpu_model
= "Fujitsu MB86904";
4308 #elif defined(TARGET_MIPS)
4309 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
4314 #elif defined TARGET_OPENRISC
4315 cpu_model
= "or1200";
4316 #elif defined(TARGET_PPC)
4317 # ifdef TARGET_PPC64
4318 cpu_model
= "POWER8";
4322 #elif defined TARGET_SH4
4323 cpu_model
= TYPE_SH7785_CPU
;
4329 /* NOTE: we need to init the CPU at this stage to get
4330 qemu_host_page_size */
4331 cpu
= cpu_init(cpu_model
);
4333 fprintf(stderr
, "Unable to find CPU definition\n");
4341 if (getenv("QEMU_STRACE")) {
4345 if (getenv("QEMU_RAND_SEED")) {
4346 handle_arg_randseed(getenv("QEMU_RAND_SEED"));
4349 target_environ
= envlist_to_environ(envlist
, NULL
);
4350 envlist_free(envlist
);
4353 * Now that page sizes are configured in cpu_init() we can do
4354 * proper page alignment for guest_base.
4356 guest_base
= HOST_PAGE_ALIGN(guest_base
);
4358 if (reserved_va
|| have_guest_base
) {
4359 guest_base
= init_guest_space(guest_base
, reserved_va
, 0,
4361 if (guest_base
== (unsigned long)-1) {
4362 fprintf(stderr
, "Unable to reserve 0x%lx bytes of virtual address "
4363 "space for use as guest address space (check your virtual "
4364 "memory ulimit setting or reserve less using -R option)\n",
4370 mmap_next_start
= reserved_va
;
4375 * Read in mmap_min_addr kernel parameter. This value is used
4376 * When loading the ELF image to determine whether guest_base
4377 * is needed. It is also used in mmap_find_vma.
4382 if ((fp
= fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL
) {
4384 if (fscanf(fp
, "%lu", &tmp
) == 1) {
4385 mmap_min_addr
= tmp
;
4386 qemu_log_mask(CPU_LOG_PAGE
, "host mmap_min_addr=0x%lx\n", mmap_min_addr
);
4393 * Prepare copy of argv vector for target.
4395 target_argc
= argc
- optind
;
4396 target_argv
= calloc(target_argc
+ 1, sizeof (char *));
4397 if (target_argv
== NULL
) {
4398 (void) fprintf(stderr
, "Unable to allocate memory for target_argv\n");
4403 * If argv0 is specified (using '-0' switch) we replace
4404 * argv[0] pointer with the given one.
4407 if (argv0
!= NULL
) {
4408 target_argv
[i
++] = strdup(argv0
);
4410 for (; i
< target_argc
; i
++) {
4411 target_argv
[i
] = strdup(argv
[optind
+ i
]);
4413 target_argv
[target_argc
] = NULL
;
4415 ts
= g_new0(TaskState
, 1);
4416 init_task_state(ts
);
4417 /* build Task State */
4423 execfd
= qemu_getauxval(AT_EXECFD
);
4425 execfd
= open(filename
, O_RDONLY
);
4427 printf("Error while loading %s: %s\n", filename
, strerror(errno
));
4428 _exit(EXIT_FAILURE
);
4432 ret
= loader_exec(execfd
, filename
, target_argv
, target_environ
, regs
,
4435 printf("Error while loading %s: %s\n", filename
, strerror(-ret
));
4436 _exit(EXIT_FAILURE
);
4439 for (wrk
= target_environ
; *wrk
; wrk
++) {
4443 free(target_environ
);
4445 if (qemu_loglevel_mask(CPU_LOG_PAGE
)) {
4446 qemu_log("guest_base 0x%lx\n", guest_base
);
4449 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
4450 qemu_log("end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
4451 qemu_log("start_code 0x" TARGET_ABI_FMT_lx
"\n", info
->start_code
);
4452 qemu_log("start_data 0x" TARGET_ABI_FMT_lx
"\n", info
->start_data
);
4453 qemu_log("end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
4454 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx
"\n", info
->start_stack
);
4455 qemu_log("brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
4456 qemu_log("entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
4457 qemu_log("argv_start 0x" TARGET_ABI_FMT_lx
"\n", info
->arg_start
);
4458 qemu_log("env_start 0x" TARGET_ABI_FMT_lx
"\n",
4459 info
->arg_end
+ (abi_ulong
)sizeof(abi_ulong
));
4460 qemu_log("auxv_start 0x" TARGET_ABI_FMT_lx
"\n", info
->saved_auxv
);
4463 target_set_brk(info
->brk
);
4467 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
4468 generating the prologue until now so that the prologue can take
4469 the real value of GUEST_BASE into account. */
4470 tcg_prologue_init(&tcg_ctx
);
4472 #if defined(TARGET_I386)
4473 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
4474 env
->hflags
|= HF_PE_MASK
| HF_CPL_MASK
;
4475 if (env
->features
[FEAT_1_EDX
] & CPUID_SSE
) {
4476 env
->cr
[4] |= CR4_OSFXSR_MASK
;
4477 env
->hflags
|= HF_OSFXSR_MASK
;
4479 #ifndef TARGET_ABI32
4480 /* enable 64 bit mode if possible */
4481 if (!(env
->features
[FEAT_8000_0001_EDX
] & CPUID_EXT2_LM
)) {
4482 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
4485 env
->cr
[4] |= CR4_PAE_MASK
;
4486 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
4487 env
->hflags
|= HF_LMA_MASK
;
4490 /* flags setup : we activate the IRQs by default as in user mode */
4491 env
->eflags
|= IF_MASK
;
4493 /* linux register setup */
4494 #ifndef TARGET_ABI32
4495 env
->regs
[R_EAX
] = regs
->rax
;
4496 env
->regs
[R_EBX
] = regs
->rbx
;
4497 env
->regs
[R_ECX
] = regs
->rcx
;
4498 env
->regs
[R_EDX
] = regs
->rdx
;
4499 env
->regs
[R_ESI
] = regs
->rsi
;
4500 env
->regs
[R_EDI
] = regs
->rdi
;
4501 env
->regs
[R_EBP
] = regs
->rbp
;
4502 env
->regs
[R_ESP
] = regs
->rsp
;
4503 env
->eip
= regs
->rip
;
4505 env
->regs
[R_EAX
] = regs
->eax
;
4506 env
->regs
[R_EBX
] = regs
->ebx
;
4507 env
->regs
[R_ECX
] = regs
->ecx
;
4508 env
->regs
[R_EDX
] = regs
->edx
;
4509 env
->regs
[R_ESI
] = regs
->esi
;
4510 env
->regs
[R_EDI
] = regs
->edi
;
4511 env
->regs
[R_EBP
] = regs
->ebp
;
4512 env
->regs
[R_ESP
] = regs
->esp
;
4513 env
->eip
= regs
->eip
;
4516 /* linux interrupt setup */
4517 #ifndef TARGET_ABI32
4518 env
->idt
.limit
= 511;
4520 env
->idt
.limit
= 255;
4522 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
4523 PROT_READ
|PROT_WRITE
,
4524 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
4525 idt_table
= g2h(env
->idt
.base
);
4548 /* linux segment setup */
4550 uint64_t *gdt_table
;
4551 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
4552 PROT_READ
|PROT_WRITE
,
4553 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
4554 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
4555 gdt_table
= g2h(env
->gdt
.base
);
4557 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
4558 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
4559 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
4561 /* 64 bit code segment */
4562 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
4563 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
4565 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
4567 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
4568 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
4569 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
4571 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
4572 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
4574 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
4575 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
4576 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
4577 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
4578 /* This hack makes Wine work... */
4579 env
->segs
[R_FS
].selector
= 0;
4581 cpu_x86_load_seg(env
, R_DS
, 0);
4582 cpu_x86_load_seg(env
, R_ES
, 0);
4583 cpu_x86_load_seg(env
, R_FS
, 0);
4584 cpu_x86_load_seg(env
, R_GS
, 0);
4586 #elif defined(TARGET_AARCH64)
4590 if (!(arm_feature(env
, ARM_FEATURE_AARCH64
))) {
4592 "The selected ARM CPU does not support 64 bit mode\n");
4596 for (i
= 0; i
< 31; i
++) {
4597 env
->xregs
[i
] = regs
->regs
[i
];
4600 env
->xregs
[31] = regs
->sp
;
4602 #elif defined(TARGET_ARM)
4605 cpsr_write(env
, regs
->uregs
[16], CPSR_USER
| CPSR_EXEC
,
4607 for(i
= 0; i
< 16; i
++) {
4608 env
->regs
[i
] = regs
->uregs
[i
];
4610 #ifdef TARGET_WORDS_BIGENDIAN
4612 if (EF_ARM_EABI_VERSION(info
->elf_flags
) >= EF_ARM_EABI_VER4
4613 && (info
->elf_flags
& EF_ARM_BE8
)) {
4614 env
->uncached_cpsr
|= CPSR_E
;
4615 env
->cp15
.sctlr_el
[1] |= SCTLR_E0E
;
4617 env
->cp15
.sctlr_el
[1] |= SCTLR_B
;
4621 #elif defined(TARGET_UNICORE32)
4624 cpu_asr_write(env
, regs
->uregs
[32], 0xffffffff);
4625 for (i
= 0; i
< 32; i
++) {
4626 env
->regs
[i
] = regs
->uregs
[i
];
4629 #elif defined(TARGET_SPARC)
4633 env
->npc
= regs
->npc
;
4635 for(i
= 0; i
< 8; i
++)
4636 env
->gregs
[i
] = regs
->u_regs
[i
];
4637 for(i
= 0; i
< 8; i
++)
4638 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
4640 #elif defined(TARGET_PPC)
4644 #if defined(TARGET_PPC64)
4645 int flag
= (env
->insns_flags2
& PPC2_BOOKE206
) ? MSR_CM
: MSR_SF
;
4646 #if defined(TARGET_ABI32)
4647 env
->msr
&= ~((target_ulong
)1 << flag
);
4649 env
->msr
|= (target_ulong
)1 << flag
;
4652 env
->nip
= regs
->nip
;
4653 for(i
= 0; i
< 32; i
++) {
4654 env
->gpr
[i
] = regs
->gpr
[i
];
4657 #elif defined(TARGET_M68K)
4660 env
->dregs
[0] = regs
->d0
;
4661 env
->dregs
[1] = regs
->d1
;
4662 env
->dregs
[2] = regs
->d2
;
4663 env
->dregs
[3] = regs
->d3
;
4664 env
->dregs
[4] = regs
->d4
;
4665 env
->dregs
[5] = regs
->d5
;
4666 env
->dregs
[6] = regs
->d6
;
4667 env
->dregs
[7] = regs
->d7
;
4668 env
->aregs
[0] = regs
->a0
;
4669 env
->aregs
[1] = regs
->a1
;
4670 env
->aregs
[2] = regs
->a2
;
4671 env
->aregs
[3] = regs
->a3
;
4672 env
->aregs
[4] = regs
->a4
;
4673 env
->aregs
[5] = regs
->a5
;
4674 env
->aregs
[6] = regs
->a6
;
4675 env
->aregs
[7] = regs
->usp
;
4677 ts
->sim_syscalls
= 1;
4679 #elif defined(TARGET_MICROBLAZE)
4681 env
->regs
[0] = regs
->r0
;
4682 env
->regs
[1] = regs
->r1
;
4683 env
->regs
[2] = regs
->r2
;
4684 env
->regs
[3] = regs
->r3
;
4685 env
->regs
[4] = regs
->r4
;
4686 env
->regs
[5] = regs
->r5
;
4687 env
->regs
[6] = regs
->r6
;
4688 env
->regs
[7] = regs
->r7
;
4689 env
->regs
[8] = regs
->r8
;
4690 env
->regs
[9] = regs
->r9
;
4691 env
->regs
[10] = regs
->r10
;
4692 env
->regs
[11] = regs
->r11
;
4693 env
->regs
[12] = regs
->r12
;
4694 env
->regs
[13] = regs
->r13
;
4695 env
->regs
[14] = regs
->r14
;
4696 env
->regs
[15] = regs
->r15
;
4697 env
->regs
[16] = regs
->r16
;
4698 env
->regs
[17] = regs
->r17
;
4699 env
->regs
[18] = regs
->r18
;
4700 env
->regs
[19] = regs
->r19
;
4701 env
->regs
[20] = regs
->r20
;
4702 env
->regs
[21] = regs
->r21
;
4703 env
->regs
[22] = regs
->r22
;
4704 env
->regs
[23] = regs
->r23
;
4705 env
->regs
[24] = regs
->r24
;
4706 env
->regs
[25] = regs
->r25
;
4707 env
->regs
[26] = regs
->r26
;
4708 env
->regs
[27] = regs
->r27
;
4709 env
->regs
[28] = regs
->r28
;
4710 env
->regs
[29] = regs
->r29
;
4711 env
->regs
[30] = regs
->r30
;
4712 env
->regs
[31] = regs
->r31
;
4713 env
->sregs
[SR_PC
] = regs
->pc
;
4715 #elif defined(TARGET_MIPS)
4719 for(i
= 0; i
< 32; i
++) {
4720 env
->active_tc
.gpr
[i
] = regs
->regs
[i
];
4722 env
->active_tc
.PC
= regs
->cp0_epc
& ~(target_ulong
)1;
4723 if (regs
->cp0_epc
& 1) {
4724 env
->hflags
|= MIPS_HFLAG_M16
;
4726 if (((info
->elf_flags
& EF_MIPS_NAN2008
) != 0) !=
4727 ((env
->active_fpu
.fcr31
& (1 << FCR31_NAN2008
)) != 0)) {
4728 if ((env
->active_fpu
.fcr31_rw_bitmask
&
4729 (1 << FCR31_NAN2008
)) == 0) {
4730 fprintf(stderr
, "ELF binary's NaN mode not supported by CPU\n");
4733 if ((info
->elf_flags
& EF_MIPS_NAN2008
) != 0) {
4734 env
->active_fpu
.fcr31
|= (1 << FCR31_NAN2008
);
4736 env
->active_fpu
.fcr31
&= ~(1 << FCR31_NAN2008
);
4738 restore_snan_bit_mode(env
);
4741 #elif defined(TARGET_NIOS2)
4744 env
->regs
[1] = regs
->r1
;
4745 env
->regs
[2] = regs
->r2
;
4746 env
->regs
[3] = regs
->r3
;
4747 env
->regs
[4] = regs
->r4
;
4748 env
->regs
[5] = regs
->r5
;
4749 env
->regs
[6] = regs
->r6
;
4750 env
->regs
[7] = regs
->r7
;
4751 env
->regs
[8] = regs
->r8
;
4752 env
->regs
[9] = regs
->r9
;
4753 env
->regs
[10] = regs
->r10
;
4754 env
->regs
[11] = regs
->r11
;
4755 env
->regs
[12] = regs
->r12
;
4756 env
->regs
[13] = regs
->r13
;
4757 env
->regs
[14] = regs
->r14
;
4758 env
->regs
[15] = regs
->r15
;
4759 /* TODO: unsigned long orig_r2; */
4760 env
->regs
[R_RA
] = regs
->ra
;
4761 env
->regs
[R_FP
] = regs
->fp
;
4762 env
->regs
[R_SP
] = regs
->sp
;
4763 env
->regs
[R_GP
] = regs
->gp
;
4764 env
->regs
[CR_ESTATUS
] = regs
->estatus
;
4765 env
->regs
[R_EA
] = regs
->ea
;
4766 /* TODO: unsigned long orig_r7; */
4768 /* Emulate eret when starting thread. */
4769 env
->regs
[R_PC
] = regs
->ea
;
4771 #elif defined(TARGET_OPENRISC)
4775 for (i
= 0; i
< 32; i
++) {
4776 env
->gpr
[i
] = regs
->gpr
[i
];
4782 #elif defined(TARGET_SH4)
4786 for(i
= 0; i
< 16; i
++) {
4787 env
->gregs
[i
] = regs
->regs
[i
];
4791 #elif defined(TARGET_ALPHA)
4795 for(i
= 0; i
< 28; i
++) {
4796 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
4798 env
->ir
[IR_SP
] = regs
->usp
;
4801 #elif defined(TARGET_CRIS)
4803 env
->regs
[0] = regs
->r0
;
4804 env
->regs
[1] = regs
->r1
;
4805 env
->regs
[2] = regs
->r2
;
4806 env
->regs
[3] = regs
->r3
;
4807 env
->regs
[4] = regs
->r4
;
4808 env
->regs
[5] = regs
->r5
;
4809 env
->regs
[6] = regs
->r6
;
4810 env
->regs
[7] = regs
->r7
;
4811 env
->regs
[8] = regs
->r8
;
4812 env
->regs
[9] = regs
->r9
;
4813 env
->regs
[10] = regs
->r10
;
4814 env
->regs
[11] = regs
->r11
;
4815 env
->regs
[12] = regs
->r12
;
4816 env
->regs
[13] = regs
->r13
;
4817 env
->regs
[14] = info
->start_stack
;
4818 env
->regs
[15] = regs
->acr
;
4819 env
->pc
= regs
->erp
;
4821 #elif defined(TARGET_S390X)
4824 for (i
= 0; i
< 16; i
++) {
4825 env
->regs
[i
] = regs
->gprs
[i
];
4827 env
->psw
.mask
= regs
->psw
.mask
;
4828 env
->psw
.addr
= regs
->psw
.addr
;
4830 #elif defined(TARGET_TILEGX)
4833 for (i
= 0; i
< TILEGX_R_COUNT
; i
++) {
4834 env
->regs
[i
] = regs
->regs
[i
];
4836 for (i
= 0; i
< TILEGX_SPR_COUNT
; i
++) {
4841 #elif defined(TARGET_HPPA)
4844 for (i
= 1; i
< 32; i
++) {
4845 env
->gr
[i
] = regs
->gr
[i
];
4847 env
->iaoq_f
= regs
->iaoq
[0];
4848 env
->iaoq_b
= regs
->iaoq
[1];
4851 #error unsupported target CPU
4854 #if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
4855 ts
->stack_base
= info
->start_stack
;
4856 ts
->heap_base
= info
->brk
;
4857 /* This will be filled in on the first SYS_HEAPINFO call. */
4862 if (gdbserver_start(gdbstub_port
) < 0) {
4863 fprintf(stderr
, "qemu: could not open gdbserver on port %d\n",
4867 gdb_handlesig(cpu
, 0);