nbd/client: Add meta contexts to nbd_receive_export_list()
[qemu/ar7.git] / accel / tcg / cpu-exec.c
blob870027d43596716342ca5e58847c0ee0f84be981
1 /*
2 * emulator main execution loop
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
20 #include "cpu.h"
21 #include "trace.h"
22 #include "disas/disas.h"
23 #include "exec/exec-all.h"
24 #include "tcg.h"
25 #include "qemu/atomic.h"
26 #include "sysemu/qtest.h"
27 #include "qemu/timer.h"
28 #include "qemu/rcu.h"
29 #include "exec/tb-hash.h"
30 #include "exec/tb-lookup.h"
31 #include "exec/log.h"
32 #include "qemu/main-loop.h"
33 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
34 #include "hw/i386/apic.h"
35 #endif
36 #include "sysemu/cpus.h"
37 #include "sysemu/replay.h"
39 /* -icount align implementation. */
41 typedef struct SyncClocks {
42 int64_t diff_clk;
43 int64_t last_cpu_icount;
44 int64_t realtime_clock;
45 } SyncClocks;
47 #if !defined(CONFIG_USER_ONLY)
48 /* Allow the guest to have a max 3ms advance.
49 * The difference between the 2 clocks could therefore
50 * oscillate around 0.
52 #define VM_CLOCK_ADVANCE 3000000
53 #define THRESHOLD_REDUCE 1.5
54 #define MAX_DELAY_PRINT_RATE 2000000000LL
55 #define MAX_NB_PRINTS 100
57 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
59 int64_t cpu_icount;
61 if (!icount_align_option) {
62 return;
65 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
66 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
67 sc->last_cpu_icount = cpu_icount;
69 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
70 #ifndef _WIN32
71 struct timespec sleep_delay, rem_delay;
72 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
73 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
74 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
75 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
76 } else {
77 sc->diff_clk = 0;
79 #else
80 Sleep(sc->diff_clk / SCALE_MS);
81 sc->diff_clk = 0;
82 #endif
86 static void print_delay(const SyncClocks *sc)
88 static float threshold_delay;
89 static int64_t last_realtime_clock;
90 static int nb_prints;
92 if (icount_align_option &&
93 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
94 nb_prints < MAX_NB_PRINTS) {
95 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
96 (-sc->diff_clk / (float)1000000000LL <
97 (threshold_delay - THRESHOLD_REDUCE))) {
98 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
99 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
100 threshold_delay - 1,
101 threshold_delay);
102 nb_prints++;
103 last_realtime_clock = sc->realtime_clock;
108 static void init_delay_params(SyncClocks *sc,
109 const CPUState *cpu)
111 if (!icount_align_option) {
112 return;
114 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
115 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
116 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
117 if (sc->diff_clk < max_delay) {
118 max_delay = sc->diff_clk;
120 if (sc->diff_clk > max_advance) {
121 max_advance = sc->diff_clk;
124 /* Print every 2s max if the guest is late. We limit the number
125 of printed messages to NB_PRINT_MAX(currently 100) */
126 print_delay(sc);
128 #else
129 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
133 static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
136 #endif /* CONFIG USER ONLY */
138 /* Execute a TB, and fix up the CPU state afterwards if necessary */
139 static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
141 CPUArchState *env = cpu->env_ptr;
142 uintptr_t ret;
143 TranslationBlock *last_tb;
144 int tb_exit;
145 uint8_t *tb_ptr = itb->tc.ptr;
147 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
148 "Trace %d: %p ["
149 TARGET_FMT_lx "/" TARGET_FMT_lx "/%#x] %s\n",
150 cpu->cpu_index, itb->tc.ptr,
151 itb->cs_base, itb->pc, itb->flags,
152 lookup_symbol(itb->pc));
154 #if defined(DEBUG_DISAS)
155 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)
156 && qemu_log_in_addr_range(itb->pc)) {
157 qemu_log_lock();
158 int flags = 0;
159 if (qemu_loglevel_mask(CPU_LOG_TB_FPU)) {
160 flags |= CPU_DUMP_FPU;
162 #if defined(TARGET_I386)
163 flags |= CPU_DUMP_CCOP;
164 #endif
165 log_cpu_state(cpu, flags);
166 qemu_log_unlock();
168 #endif /* DEBUG_DISAS */
170 cpu->can_do_io = !use_icount;
171 ret = tcg_qemu_tb_exec(env, tb_ptr);
172 cpu->can_do_io = 1;
173 last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
174 tb_exit = ret & TB_EXIT_MASK;
175 trace_exec_tb_exit(last_tb, tb_exit);
177 if (tb_exit > TB_EXIT_IDX1) {
178 /* We didn't start executing this TB (eg because the instruction
179 * counter hit zero); we must restore the guest PC to the address
180 * of the start of the TB.
182 CPUClass *cc = CPU_GET_CLASS(cpu);
183 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
184 "Stopped execution of TB chain before %p ["
185 TARGET_FMT_lx "] %s\n",
186 last_tb->tc.ptr, last_tb->pc,
187 lookup_symbol(last_tb->pc));
188 if (cc->synchronize_from_tb) {
189 cc->synchronize_from_tb(cpu, last_tb);
190 } else {
191 assert(cc->set_pc);
192 cc->set_pc(cpu, last_tb->pc);
195 return ret;
198 #ifndef CONFIG_USER_ONLY
199 /* Execute the code without caching the generated code. An interpreter
200 could be used if available. */
201 static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
202 TranslationBlock *orig_tb, bool ignore_icount)
204 TranslationBlock *tb;
205 uint32_t cflags = curr_cflags() | CF_NOCACHE;
207 if (ignore_icount) {
208 cflags &= ~CF_USE_ICOUNT;
211 /* Should never happen.
212 We only end up here when an existing TB is too long. */
213 cflags |= MIN(max_cycles, CF_COUNT_MASK);
215 mmap_lock();
216 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base,
217 orig_tb->flags, cflags);
218 tb->orig_tb = orig_tb;
219 mmap_unlock();
221 /* execute the generated code */
222 trace_exec_tb_nocache(tb, tb->pc);
223 cpu_tb_exec(cpu, tb);
225 mmap_lock();
226 tb_phys_invalidate(tb, -1);
227 mmap_unlock();
228 tcg_tb_remove(tb);
230 #endif
232 void cpu_exec_step_atomic(CPUState *cpu)
234 CPUClass *cc = CPU_GET_CLASS(cpu);
235 TranslationBlock *tb;
236 target_ulong cs_base, pc;
237 uint32_t flags;
238 uint32_t cflags = 1;
239 uint32_t cf_mask = cflags & CF_HASH_MASK;
240 /* volatile because we modify it between setjmp and longjmp */
241 volatile bool in_exclusive_region = false;
243 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
244 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
245 if (tb == NULL) {
246 mmap_lock();
247 tb = tb_gen_code(cpu, pc, cs_base, flags, cflags);
248 mmap_unlock();
251 start_exclusive();
253 /* Since we got here, we know that parallel_cpus must be true. */
254 parallel_cpus = false;
255 in_exclusive_region = true;
256 cc->cpu_exec_enter(cpu);
257 /* execute the generated code */
258 trace_exec_tb(tb, pc);
259 cpu_tb_exec(cpu, tb);
260 cc->cpu_exec_exit(cpu);
261 } else {
263 * The mmap_lock is dropped by tb_gen_code if it runs out of
264 * memory.
266 #ifndef CONFIG_SOFTMMU
267 tcg_debug_assert(!have_mmap_lock());
268 #endif
269 assert_no_pages_locked();
272 if (in_exclusive_region) {
273 /* We might longjump out of either the codegen or the
274 * execution, so must make sure we only end the exclusive
275 * region if we started it.
277 parallel_cpus = true;
278 end_exclusive();
282 struct tb_desc {
283 target_ulong pc;
284 target_ulong cs_base;
285 CPUArchState *env;
286 tb_page_addr_t phys_page1;
287 uint32_t flags;
288 uint32_t cf_mask;
289 uint32_t trace_vcpu_dstate;
292 static bool tb_lookup_cmp(const void *p, const void *d)
294 const TranslationBlock *tb = p;
295 const struct tb_desc *desc = d;
297 if (tb->pc == desc->pc &&
298 tb->page_addr[0] == desc->phys_page1 &&
299 tb->cs_base == desc->cs_base &&
300 tb->flags == desc->flags &&
301 tb->trace_vcpu_dstate == desc->trace_vcpu_dstate &&
302 (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == desc->cf_mask) {
303 /* check next page if needed */
304 if (tb->page_addr[1] == -1) {
305 return true;
306 } else {
307 tb_page_addr_t phys_page2;
308 target_ulong virt_page2;
310 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
311 phys_page2 = get_page_addr_code(desc->env, virt_page2);
312 if (tb->page_addr[1] == phys_page2) {
313 return true;
317 return false;
320 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
321 target_ulong cs_base, uint32_t flags,
322 uint32_t cf_mask)
324 tb_page_addr_t phys_pc;
325 struct tb_desc desc;
326 uint32_t h;
328 desc.env = (CPUArchState *)cpu->env_ptr;
329 desc.cs_base = cs_base;
330 desc.flags = flags;
331 desc.cf_mask = cf_mask;
332 desc.trace_vcpu_dstate = *cpu->trace_dstate;
333 desc.pc = pc;
334 phys_pc = get_page_addr_code(desc.env, pc);
335 if (phys_pc == -1) {
336 return NULL;
338 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
339 h = tb_hash_func(phys_pc, pc, flags, cf_mask, *cpu->trace_dstate);
340 return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp);
343 void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr)
345 if (TCG_TARGET_HAS_direct_jump) {
346 uintptr_t offset = tb->jmp_target_arg[n];
347 uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr;
348 tb_target_set_jmp_target(tc_ptr, tc_ptr + offset, addr);
349 } else {
350 tb->jmp_target_arg[n] = addr;
354 static inline void tb_add_jump(TranslationBlock *tb, int n,
355 TranslationBlock *tb_next)
357 uintptr_t old;
359 assert(n < ARRAY_SIZE(tb->jmp_list_next));
360 qemu_spin_lock(&tb_next->jmp_lock);
362 /* make sure the destination TB is valid */
363 if (tb_next->cflags & CF_INVALID) {
364 goto out_unlock_next;
366 /* Atomically claim the jump destination slot only if it was NULL */
367 old = atomic_cmpxchg(&tb->jmp_dest[n], (uintptr_t)NULL, (uintptr_t)tb_next);
368 if (old) {
369 goto out_unlock_next;
372 /* patch the native jump address */
373 tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc.ptr);
375 /* add in TB jmp list */
376 tb->jmp_list_next[n] = tb_next->jmp_list_head;
377 tb_next->jmp_list_head = (uintptr_t)tb | n;
379 qemu_spin_unlock(&tb_next->jmp_lock);
381 qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc,
382 "Linking TBs %p [" TARGET_FMT_lx
383 "] index %d -> %p [" TARGET_FMT_lx "]\n",
384 tb->tc.ptr, tb->pc, n,
385 tb_next->tc.ptr, tb_next->pc);
386 return;
388 out_unlock_next:
389 qemu_spin_unlock(&tb_next->jmp_lock);
390 return;
393 static inline TranslationBlock *tb_find(CPUState *cpu,
394 TranslationBlock *last_tb,
395 int tb_exit, uint32_t cf_mask)
397 TranslationBlock *tb;
398 target_ulong cs_base, pc;
399 uint32_t flags;
401 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
402 if (tb == NULL) {
403 mmap_lock();
404 tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask);
405 mmap_unlock();
406 /* We add the TB in the virtual pc hash table for the fast lookup */
407 atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
409 #ifndef CONFIG_USER_ONLY
410 /* We don't take care of direct jumps when address mapping changes in
411 * system emulation. So it's not safe to make a direct jump to a TB
412 * spanning two pages because the mapping for the second page can change.
414 if (tb->page_addr[1] != -1) {
415 last_tb = NULL;
417 #endif
418 /* See if we can patch the calling TB. */
419 if (last_tb) {
420 tb_add_jump(last_tb, tb_exit, tb);
422 return tb;
425 static inline bool cpu_handle_halt(CPUState *cpu)
427 if (cpu->halted) {
428 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
429 if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
430 && replay_interrupt()) {
431 X86CPU *x86_cpu = X86_CPU(cpu);
432 qemu_mutex_lock_iothread();
433 apic_poll_irq(x86_cpu->apic_state);
434 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
435 qemu_mutex_unlock_iothread();
437 #endif
438 if (!cpu_has_work(cpu)) {
439 return true;
442 cpu->halted = 0;
445 return false;
448 static inline void cpu_handle_debug_exception(CPUState *cpu)
450 CPUClass *cc = CPU_GET_CLASS(cpu);
451 CPUWatchpoint *wp;
453 if (!cpu->watchpoint_hit) {
454 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
455 wp->flags &= ~BP_WATCHPOINT_HIT;
459 cc->debug_excp_handler(cpu);
462 static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
464 if (cpu->exception_index < 0) {
465 #ifndef CONFIG_USER_ONLY
466 if (replay_has_exception()
467 && cpu->icount_decr.u16.low + cpu->icount_extra == 0) {
468 /* try to cause an exception pending in the log */
469 cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0, curr_cflags()), true);
471 #endif
472 if (cpu->exception_index < 0) {
473 return false;
477 if (cpu->exception_index >= EXCP_INTERRUPT) {
478 /* exit request from the cpu execution loop */
479 *ret = cpu->exception_index;
480 if (*ret == EXCP_DEBUG) {
481 cpu_handle_debug_exception(cpu);
483 cpu->exception_index = -1;
484 return true;
485 } else {
486 #if defined(CONFIG_USER_ONLY)
487 /* if user mode only, we simulate a fake exception
488 which will be handled outside the cpu execution
489 loop */
490 #if defined(TARGET_I386)
491 CPUClass *cc = CPU_GET_CLASS(cpu);
492 cc->do_interrupt(cpu);
493 #endif
494 *ret = cpu->exception_index;
495 cpu->exception_index = -1;
496 return true;
497 #else
498 if (replay_exception()) {
499 CPUClass *cc = CPU_GET_CLASS(cpu);
500 qemu_mutex_lock_iothread();
501 cc->do_interrupt(cpu);
502 qemu_mutex_unlock_iothread();
503 cpu->exception_index = -1;
504 } else if (!replay_has_interrupt()) {
505 /* give a chance to iothread in replay mode */
506 *ret = EXCP_INTERRUPT;
507 return true;
509 #endif
512 return false;
515 static inline bool cpu_handle_interrupt(CPUState *cpu,
516 TranslationBlock **last_tb)
518 CPUClass *cc = CPU_GET_CLASS(cpu);
520 /* Clear the interrupt flag now since we're processing
521 * cpu->interrupt_request and cpu->exit_request.
522 * Ensure zeroing happens before reading cpu->exit_request or
523 * cpu->interrupt_request (see also smp_wmb in cpu_exit())
525 atomic_mb_set(&cpu->icount_decr.u16.high, 0);
527 if (unlikely(atomic_read(&cpu->interrupt_request))) {
528 int interrupt_request;
529 qemu_mutex_lock_iothread();
530 interrupt_request = cpu->interrupt_request;
531 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
532 /* Mask out external interrupts for this step. */
533 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
535 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
536 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
537 cpu->exception_index = EXCP_DEBUG;
538 qemu_mutex_unlock_iothread();
539 return true;
541 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
542 /* Do nothing */
543 } else if (interrupt_request & CPU_INTERRUPT_HALT) {
544 replay_interrupt();
545 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
546 cpu->halted = 1;
547 cpu->exception_index = EXCP_HLT;
548 qemu_mutex_unlock_iothread();
549 return true;
551 #if defined(TARGET_I386)
552 else if (interrupt_request & CPU_INTERRUPT_INIT) {
553 X86CPU *x86_cpu = X86_CPU(cpu);
554 CPUArchState *env = &x86_cpu->env;
555 replay_interrupt();
556 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
557 do_cpu_init(x86_cpu);
558 cpu->exception_index = EXCP_HALTED;
559 qemu_mutex_unlock_iothread();
560 return true;
562 #else
563 else if (interrupt_request & CPU_INTERRUPT_RESET) {
564 replay_interrupt();
565 cpu_reset(cpu);
566 qemu_mutex_unlock_iothread();
567 return true;
569 #endif
570 /* The target hook has 3 exit conditions:
571 False when the interrupt isn't processed,
572 True when it is, and we should restart on a new TB,
573 and via longjmp via cpu_loop_exit. */
574 else {
575 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
576 replay_interrupt();
577 cpu->exception_index = -1;
578 *last_tb = NULL;
580 /* The target hook may have updated the 'cpu->interrupt_request';
581 * reload the 'interrupt_request' value */
582 interrupt_request = cpu->interrupt_request;
584 if (interrupt_request & CPU_INTERRUPT_EXITTB) {
585 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
586 /* ensure that no TB jump will be modified as
587 the program flow was changed */
588 *last_tb = NULL;
591 /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */
592 qemu_mutex_unlock_iothread();
595 /* Finally, check if we need to exit to the main loop. */
596 if (unlikely(atomic_read(&cpu->exit_request)
597 || (use_icount && cpu->icount_decr.u16.low + cpu->icount_extra == 0))) {
598 atomic_set(&cpu->exit_request, 0);
599 if (cpu->exception_index == -1) {
600 cpu->exception_index = EXCP_INTERRUPT;
602 return true;
605 return false;
608 static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
609 TranslationBlock **last_tb, int *tb_exit)
611 uintptr_t ret;
612 int32_t insns_left;
614 trace_exec_tb(tb, tb->pc);
615 ret = cpu_tb_exec(cpu, tb);
616 tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
617 *tb_exit = ret & TB_EXIT_MASK;
618 if (*tb_exit != TB_EXIT_REQUESTED) {
619 *last_tb = tb;
620 return;
623 *last_tb = NULL;
624 insns_left = atomic_read(&cpu->icount_decr.u32);
625 if (insns_left < 0) {
626 /* Something asked us to stop executing chained TBs; just
627 * continue round the main loop. Whatever requested the exit
628 * will also have set something else (eg exit_request or
629 * interrupt_request) which will be handled by
630 * cpu_handle_interrupt. cpu_handle_interrupt will also
631 * clear cpu->icount_decr.u16.high.
633 return;
636 /* Instruction counter expired. */
637 assert(use_icount);
638 #ifndef CONFIG_USER_ONLY
639 /* Ensure global icount has gone forward */
640 cpu_update_icount(cpu);
641 /* Refill decrementer and continue execution. */
642 insns_left = MIN(0xffff, cpu->icount_budget);
643 cpu->icount_decr.u16.low = insns_left;
644 cpu->icount_extra = cpu->icount_budget - insns_left;
645 if (!cpu->icount_extra) {
646 /* Execute any remaining instructions, then let the main loop
647 * handle the next event.
649 if (insns_left > 0) {
650 cpu_exec_nocache(cpu, insns_left, tb, false);
653 #endif
656 /* main execution loop */
658 int cpu_exec(CPUState *cpu)
660 CPUClass *cc = CPU_GET_CLASS(cpu);
661 int ret;
662 SyncClocks sc = { 0 };
664 /* replay_interrupt may need current_cpu */
665 current_cpu = cpu;
667 if (cpu_handle_halt(cpu)) {
668 return EXCP_HALTED;
671 rcu_read_lock();
673 cc->cpu_exec_enter(cpu);
675 /* Calculate difference between guest clock and host clock.
676 * This delay includes the delay of the last cycle, so
677 * what we have to do is sleep until it is 0. As for the
678 * advance/delay we gain here, we try to fix it next time.
680 init_delay_params(&sc, cpu);
682 /* prepare setjmp context for exception handling */
683 if (sigsetjmp(cpu->jmp_env, 0) != 0) {
684 #if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
685 /* Some compilers wrongly smash all local variables after
686 * siglongjmp. There were bug reports for gcc 4.5.0 and clang.
687 * Reload essential local variables here for those compilers.
688 * Newer versions of gcc would complain about this code (-Wclobbered). */
689 cpu = current_cpu;
690 cc = CPU_GET_CLASS(cpu);
691 #else /* buggy compiler */
692 /* Assert that the compiler does not smash local variables. */
693 g_assert(cpu == current_cpu);
694 g_assert(cc == CPU_GET_CLASS(cpu));
695 #endif /* buggy compiler */
696 #ifndef CONFIG_SOFTMMU
697 tcg_debug_assert(!have_mmap_lock());
698 #endif
699 if (qemu_mutex_iothread_locked()) {
700 qemu_mutex_unlock_iothread();
704 /* if an exception is pending, we execute it here */
705 while (!cpu_handle_exception(cpu, &ret)) {
706 TranslationBlock *last_tb = NULL;
707 int tb_exit = 0;
709 while (!cpu_handle_interrupt(cpu, &last_tb)) {
710 uint32_t cflags = cpu->cflags_next_tb;
711 TranslationBlock *tb;
713 /* When requested, use an exact setting for cflags for the next
714 execution. This is used for icount, precise smc, and stop-
715 after-access watchpoints. Since this request should never
716 have CF_INVALID set, -1 is a convenient invalid value that
717 does not require tcg headers for cpu_common_reset. */
718 if (cflags == -1) {
719 cflags = curr_cflags();
720 } else {
721 cpu->cflags_next_tb = -1;
724 tb = tb_find(cpu, last_tb, tb_exit, cflags);
725 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit);
726 /* Try to align the host and virtual clocks
727 if the guest is in advance */
728 align_clocks(&sc, cpu);
732 cc->cpu_exec_exit(cpu);
733 rcu_read_unlock();
735 return ret;