usb-ccid: better bulk_out error handling
[qemu/ar7.git] / exec.c
blob865a1e8295ffb276780802520bd22a188bac6bbb
1 /*
2 * Virtual page mapping
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
20 #include "qapi/error.h"
21 #ifndef _WIN32
22 #endif
24 #include "qemu/cutils.h"
25 #include "cpu.h"
26 #include "exec/exec-all.h"
27 #include "tcg.h"
28 #include "hw/qdev-core.h"
29 #if !defined(CONFIG_USER_ONLY)
30 #include "hw/boards.h"
31 #include "hw/xen/xen.h"
32 #endif
33 #include "sysemu/kvm.h"
34 #include "sysemu/sysemu.h"
35 #include "qemu/timer.h"
36 #include "qemu/config-file.h"
37 #include "qemu/error-report.h"
38 #if defined(CONFIG_USER_ONLY)
39 #include "qemu.h"
40 #else /* !CONFIG_USER_ONLY */
41 #include "hw/hw.h"
42 #include "exec/memory.h"
43 #include "exec/ioport.h"
44 #include "sysemu/dma.h"
45 #include "exec/address-spaces.h"
46 #include "sysemu/xen-mapcache.h"
47 #include "trace-root.h"
48 #endif
49 #include "exec/cpu-all.h"
50 #include "qemu/rcu_queue.h"
51 #include "qemu/main-loop.h"
52 #include "translate-all.h"
53 #include "sysemu/replay.h"
55 #include "exec/memory-internal.h"
56 #include "exec/ram_addr.h"
57 #include "exec/log.h"
59 #include "migration/vmstate.h"
61 #include "qemu/range.h"
62 #ifndef _WIN32
63 #include "qemu/mmap-alloc.h"
64 #endif
66 //#define DEBUG_SUBPAGE
68 #if !defined(CONFIG_USER_ONLY)
69 /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
70 * are protected by the ramlist lock.
72 RAMList ram_list = { .blocks = QLIST_HEAD_INITIALIZER(ram_list.blocks) };
74 static MemoryRegion *system_memory;
75 static MemoryRegion *system_io;
77 AddressSpace address_space_io;
78 AddressSpace address_space_memory;
80 MemoryRegion io_mem_rom, io_mem_notdirty;
81 static MemoryRegion io_mem_unassigned;
83 /* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */
84 #define RAM_PREALLOC (1 << 0)
86 /* RAM is mmap-ed with MAP_SHARED */
87 #define RAM_SHARED (1 << 1)
89 /* Only a portion of RAM (used_length) is actually used, and migrated.
90 * This used_length size can change across reboots.
92 #define RAM_RESIZEABLE (1 << 2)
94 #endif
96 #ifdef TARGET_PAGE_BITS_VARY
97 int target_page_bits;
98 bool target_page_bits_decided;
99 #endif
101 struct CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus);
102 /* current CPU in the current thread. It is only valid inside
103 cpu_exec() */
104 __thread CPUState *current_cpu;
105 /* 0 = Do not count executed instructions.
106 1 = Precise instruction counting.
107 2 = Adaptive rate instruction counting. */
108 int use_icount;
110 bool set_preferred_target_page_bits(int bits)
112 /* The target page size is the lowest common denominator for all
113 * the CPUs in the system, so we can only make it smaller, never
114 * larger. And we can't make it smaller once we've committed to
115 * a particular size.
117 #ifdef TARGET_PAGE_BITS_VARY
118 assert(bits >= TARGET_PAGE_BITS_MIN);
119 if (target_page_bits == 0 || target_page_bits > bits) {
120 if (target_page_bits_decided) {
121 return false;
123 target_page_bits = bits;
125 #endif
126 return true;
129 #if !defined(CONFIG_USER_ONLY)
131 static void finalize_target_page_bits(void)
133 #ifdef TARGET_PAGE_BITS_VARY
134 if (target_page_bits == 0) {
135 target_page_bits = TARGET_PAGE_BITS_MIN;
137 target_page_bits_decided = true;
138 #endif
141 typedef struct PhysPageEntry PhysPageEntry;
143 struct PhysPageEntry {
144 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
145 uint32_t skip : 6;
146 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
147 uint32_t ptr : 26;
150 #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
152 /* Size of the L2 (and L3, etc) page tables. */
153 #define ADDR_SPACE_BITS 64
155 #define P_L2_BITS 9
156 #define P_L2_SIZE (1 << P_L2_BITS)
158 #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
160 typedef PhysPageEntry Node[P_L2_SIZE];
162 typedef struct PhysPageMap {
163 struct rcu_head rcu;
165 unsigned sections_nb;
166 unsigned sections_nb_alloc;
167 unsigned nodes_nb;
168 unsigned nodes_nb_alloc;
169 Node *nodes;
170 MemoryRegionSection *sections;
171 } PhysPageMap;
173 struct AddressSpaceDispatch {
174 struct rcu_head rcu;
176 MemoryRegionSection *mru_section;
177 /* This is a multi-level map on the physical address space.
178 * The bottom level has pointers to MemoryRegionSections.
180 PhysPageEntry phys_map;
181 PhysPageMap map;
182 AddressSpace *as;
185 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
186 typedef struct subpage_t {
187 MemoryRegion iomem;
188 AddressSpace *as;
189 hwaddr base;
190 uint16_t sub_section[];
191 } subpage_t;
193 #define PHYS_SECTION_UNASSIGNED 0
194 #define PHYS_SECTION_NOTDIRTY 1
195 #define PHYS_SECTION_ROM 2
196 #define PHYS_SECTION_WATCH 3
198 static void io_mem_init(void);
199 static void memory_map_init(void);
200 static void tcg_commit(MemoryListener *listener);
202 static MemoryRegion io_mem_watch;
205 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
206 * @cpu: the CPU whose AddressSpace this is
207 * @as: the AddressSpace itself
208 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
209 * @tcg_as_listener: listener for tracking changes to the AddressSpace
211 struct CPUAddressSpace {
212 CPUState *cpu;
213 AddressSpace *as;
214 struct AddressSpaceDispatch *memory_dispatch;
215 MemoryListener tcg_as_listener;
218 #endif
220 #if !defined(CONFIG_USER_ONLY)
222 static void phys_map_node_reserve(PhysPageMap *map, unsigned nodes)
224 static unsigned alloc_hint = 16;
225 if (map->nodes_nb + nodes > map->nodes_nb_alloc) {
226 map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, alloc_hint);
227 map->nodes_nb_alloc = MAX(map->nodes_nb_alloc, map->nodes_nb + nodes);
228 map->nodes = g_renew(Node, map->nodes, map->nodes_nb_alloc);
229 alloc_hint = map->nodes_nb_alloc;
233 static uint32_t phys_map_node_alloc(PhysPageMap *map, bool leaf)
235 unsigned i;
236 uint32_t ret;
237 PhysPageEntry e;
238 PhysPageEntry *p;
240 ret = map->nodes_nb++;
241 p = map->nodes[ret];
242 assert(ret != PHYS_MAP_NODE_NIL);
243 assert(ret != map->nodes_nb_alloc);
245 e.skip = leaf ? 0 : 1;
246 e.ptr = leaf ? PHYS_SECTION_UNASSIGNED : PHYS_MAP_NODE_NIL;
247 for (i = 0; i < P_L2_SIZE; ++i) {
248 memcpy(&p[i], &e, sizeof(e));
250 return ret;
253 static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp,
254 hwaddr *index, hwaddr *nb, uint16_t leaf,
255 int level)
257 PhysPageEntry *p;
258 hwaddr step = (hwaddr)1 << (level * P_L2_BITS);
260 if (lp->skip && lp->ptr == PHYS_MAP_NODE_NIL) {
261 lp->ptr = phys_map_node_alloc(map, level == 0);
263 p = map->nodes[lp->ptr];
264 lp = &p[(*index >> (level * P_L2_BITS)) & (P_L2_SIZE - 1)];
266 while (*nb && lp < &p[P_L2_SIZE]) {
267 if ((*index & (step - 1)) == 0 && *nb >= step) {
268 lp->skip = 0;
269 lp->ptr = leaf;
270 *index += step;
271 *nb -= step;
272 } else {
273 phys_page_set_level(map, lp, index, nb, leaf, level - 1);
275 ++lp;
279 static void phys_page_set(AddressSpaceDispatch *d,
280 hwaddr index, hwaddr nb,
281 uint16_t leaf)
283 /* Wildly overreserve - it doesn't matter much. */
284 phys_map_node_reserve(&d->map, 3 * P_L2_LEVELS);
286 phys_page_set_level(&d->map, &d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1);
289 /* Compact a non leaf page entry. Simply detect that the entry has a single child,
290 * and update our entry so we can skip it and go directly to the destination.
292 static void phys_page_compact(PhysPageEntry *lp, Node *nodes)
294 unsigned valid_ptr = P_L2_SIZE;
295 int valid = 0;
296 PhysPageEntry *p;
297 int i;
299 if (lp->ptr == PHYS_MAP_NODE_NIL) {
300 return;
303 p = nodes[lp->ptr];
304 for (i = 0; i < P_L2_SIZE; i++) {
305 if (p[i].ptr == PHYS_MAP_NODE_NIL) {
306 continue;
309 valid_ptr = i;
310 valid++;
311 if (p[i].skip) {
312 phys_page_compact(&p[i], nodes);
316 /* We can only compress if there's only one child. */
317 if (valid != 1) {
318 return;
321 assert(valid_ptr < P_L2_SIZE);
323 /* Don't compress if it won't fit in the # of bits we have. */
324 if (lp->skip + p[valid_ptr].skip >= (1 << 3)) {
325 return;
328 lp->ptr = p[valid_ptr].ptr;
329 if (!p[valid_ptr].skip) {
330 /* If our only child is a leaf, make this a leaf. */
331 /* By design, we should have made this node a leaf to begin with so we
332 * should never reach here.
333 * But since it's so simple to handle this, let's do it just in case we
334 * change this rule.
336 lp->skip = 0;
337 } else {
338 lp->skip += p[valid_ptr].skip;
342 static void phys_page_compact_all(AddressSpaceDispatch *d, int nodes_nb)
344 if (d->phys_map.skip) {
345 phys_page_compact(&d->phys_map, d->map.nodes);
349 static inline bool section_covers_addr(const MemoryRegionSection *section,
350 hwaddr addr)
352 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
353 * the section must cover the entire address space.
355 return int128_gethi(section->size) ||
356 range_covers_byte(section->offset_within_address_space,
357 int128_getlo(section->size), addr);
360 static MemoryRegionSection *phys_page_find(PhysPageEntry lp, hwaddr addr,
361 Node *nodes, MemoryRegionSection *sections)
363 PhysPageEntry *p;
364 hwaddr index = addr >> TARGET_PAGE_BITS;
365 int i;
367 for (i = P_L2_LEVELS; lp.skip && (i -= lp.skip) >= 0;) {
368 if (lp.ptr == PHYS_MAP_NODE_NIL) {
369 return &sections[PHYS_SECTION_UNASSIGNED];
371 p = nodes[lp.ptr];
372 lp = p[(index >> (i * P_L2_BITS)) & (P_L2_SIZE - 1)];
375 if (section_covers_addr(&sections[lp.ptr], addr)) {
376 return &sections[lp.ptr];
377 } else {
378 return &sections[PHYS_SECTION_UNASSIGNED];
382 bool memory_region_is_unassigned(MemoryRegion *mr)
384 return mr != &io_mem_rom && mr != &io_mem_notdirty && !mr->rom_device
385 && mr != &io_mem_watch;
388 /* Called from RCU critical section */
389 static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d,
390 hwaddr addr,
391 bool resolve_subpage)
393 MemoryRegionSection *section = atomic_read(&d->mru_section);
394 subpage_t *subpage;
395 bool update;
397 if (section && section != &d->map.sections[PHYS_SECTION_UNASSIGNED] &&
398 section_covers_addr(section, addr)) {
399 update = false;
400 } else {
401 section = phys_page_find(d->phys_map, addr, d->map.nodes,
402 d->map.sections);
403 update = true;
405 if (resolve_subpage && section->mr->subpage) {
406 subpage = container_of(section->mr, subpage_t, iomem);
407 section = &d->map.sections[subpage->sub_section[SUBPAGE_IDX(addr)]];
409 if (update) {
410 atomic_set(&d->mru_section, section);
412 return section;
415 /* Called from RCU critical section */
416 static MemoryRegionSection *
417 address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat,
418 hwaddr *plen, bool resolve_subpage)
420 MemoryRegionSection *section;
421 MemoryRegion *mr;
422 Int128 diff;
424 section = address_space_lookup_region(d, addr, resolve_subpage);
425 /* Compute offset within MemoryRegionSection */
426 addr -= section->offset_within_address_space;
428 /* Compute offset within MemoryRegion */
429 *xlat = addr + section->offset_within_region;
431 mr = section->mr;
433 /* MMIO registers can be expected to perform full-width accesses based only
434 * on their address, without considering adjacent registers that could
435 * decode to completely different MemoryRegions. When such registers
436 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
437 * regions overlap wildly. For this reason we cannot clamp the accesses
438 * here.
440 * If the length is small (as is the case for address_space_ldl/stl),
441 * everything works fine. If the incoming length is large, however,
442 * the caller really has to do the clamping through memory_access_size.
444 if (memory_region_is_ram(mr)) {
445 diff = int128_sub(section->size, int128_make64(addr));
446 *plen = int128_get64(int128_min(diff, int128_make64(*plen)));
448 return section;
451 /* Called from RCU critical section */
452 IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr,
453 bool is_write)
455 IOMMUTLBEntry iotlb = {0};
456 MemoryRegionSection *section;
457 MemoryRegion *mr;
459 for (;;) {
460 AddressSpaceDispatch *d = atomic_rcu_read(&as->dispatch);
461 section = address_space_lookup_region(d, addr, false);
462 addr = addr - section->offset_within_address_space
463 + section->offset_within_region;
464 mr = section->mr;
466 if (!mr->iommu_ops) {
467 break;
470 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
471 if (!(iotlb.perm & (1 << is_write))) {
472 iotlb.target_as = NULL;
473 break;
476 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
477 | (addr & iotlb.addr_mask));
478 as = iotlb.target_as;
481 return iotlb;
484 /* Called from RCU critical section */
485 MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr,
486 hwaddr *xlat, hwaddr *plen,
487 bool is_write)
489 IOMMUTLBEntry iotlb;
490 MemoryRegionSection *section;
491 MemoryRegion *mr;
493 for (;;) {
494 AddressSpaceDispatch *d = atomic_rcu_read(&as->dispatch);
495 section = address_space_translate_internal(d, addr, &addr, plen, true);
496 mr = section->mr;
498 if (!mr->iommu_ops) {
499 break;
502 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
503 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
504 | (addr & iotlb.addr_mask));
505 *plen = MIN(*plen, (addr | iotlb.addr_mask) - addr + 1);
506 if (!(iotlb.perm & (1 << is_write))) {
507 mr = &io_mem_unassigned;
508 break;
511 as = iotlb.target_as;
514 if (xen_enabled() && memory_access_is_direct(mr, is_write)) {
515 hwaddr page = ((addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE) - addr;
516 *plen = MIN(page, *plen);
519 *xlat = addr;
520 return mr;
523 /* Called from RCU critical section */
524 MemoryRegionSection *
525 address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr,
526 hwaddr *xlat, hwaddr *plen)
528 MemoryRegionSection *section;
529 AddressSpaceDispatch *d = atomic_rcu_read(&cpu->cpu_ases[asidx].memory_dispatch);
531 section = address_space_translate_internal(d, addr, xlat, plen, false);
533 assert(!section->mr->iommu_ops);
534 return section;
536 #endif
538 #if !defined(CONFIG_USER_ONLY)
540 static int cpu_common_post_load(void *opaque, int version_id)
542 CPUState *cpu = opaque;
544 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
545 version_id is increased. */
546 cpu->interrupt_request &= ~0x01;
547 tlb_flush(cpu);
549 return 0;
552 static int cpu_common_pre_load(void *opaque)
554 CPUState *cpu = opaque;
556 cpu->exception_index = -1;
558 return 0;
561 static bool cpu_common_exception_index_needed(void *opaque)
563 CPUState *cpu = opaque;
565 return tcg_enabled() && cpu->exception_index != -1;
568 static const VMStateDescription vmstate_cpu_common_exception_index = {
569 .name = "cpu_common/exception_index",
570 .version_id = 1,
571 .minimum_version_id = 1,
572 .needed = cpu_common_exception_index_needed,
573 .fields = (VMStateField[]) {
574 VMSTATE_INT32(exception_index, CPUState),
575 VMSTATE_END_OF_LIST()
579 static bool cpu_common_crash_occurred_needed(void *opaque)
581 CPUState *cpu = opaque;
583 return cpu->crash_occurred;
586 static const VMStateDescription vmstate_cpu_common_crash_occurred = {
587 .name = "cpu_common/crash_occurred",
588 .version_id = 1,
589 .minimum_version_id = 1,
590 .needed = cpu_common_crash_occurred_needed,
591 .fields = (VMStateField[]) {
592 VMSTATE_BOOL(crash_occurred, CPUState),
593 VMSTATE_END_OF_LIST()
597 const VMStateDescription vmstate_cpu_common = {
598 .name = "cpu_common",
599 .version_id = 1,
600 .minimum_version_id = 1,
601 .pre_load = cpu_common_pre_load,
602 .post_load = cpu_common_post_load,
603 .fields = (VMStateField[]) {
604 VMSTATE_UINT32(halted, CPUState),
605 VMSTATE_UINT32(interrupt_request, CPUState),
606 VMSTATE_END_OF_LIST()
608 .subsections = (const VMStateDescription*[]) {
609 &vmstate_cpu_common_exception_index,
610 &vmstate_cpu_common_crash_occurred,
611 NULL
615 #endif
617 CPUState *qemu_get_cpu(int index)
619 CPUState *cpu;
621 CPU_FOREACH(cpu) {
622 if (cpu->cpu_index == index) {
623 return cpu;
627 return NULL;
630 #if !defined(CONFIG_USER_ONLY)
631 void cpu_address_space_init(CPUState *cpu, AddressSpace *as, int asidx)
633 CPUAddressSpace *newas;
635 /* Target code should have set num_ases before calling us */
636 assert(asidx < cpu->num_ases);
638 if (asidx == 0) {
639 /* address space 0 gets the convenience alias */
640 cpu->as = as;
643 /* KVM cannot currently support multiple address spaces. */
644 assert(asidx == 0 || !kvm_enabled());
646 if (!cpu->cpu_ases) {
647 cpu->cpu_ases = g_new0(CPUAddressSpace, cpu->num_ases);
650 newas = &cpu->cpu_ases[asidx];
651 newas->cpu = cpu;
652 newas->as = as;
653 if (tcg_enabled()) {
654 newas->tcg_as_listener.commit = tcg_commit;
655 memory_listener_register(&newas->tcg_as_listener, as);
659 AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx)
661 /* Return the AddressSpace corresponding to the specified index */
662 return cpu->cpu_ases[asidx].as;
664 #endif
666 void cpu_exec_unrealizefn(CPUState *cpu)
668 CPUClass *cc = CPU_GET_CLASS(cpu);
670 cpu_list_remove(cpu);
672 if (cc->vmsd != NULL) {
673 vmstate_unregister(NULL, cc->vmsd, cpu);
675 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
676 vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
680 void cpu_exec_initfn(CPUState *cpu)
682 cpu->as = NULL;
683 cpu->num_ases = 0;
685 #ifndef CONFIG_USER_ONLY
686 cpu->thread_id = qemu_get_thread_id();
688 /* This is a softmmu CPU object, so create a property for it
689 * so users can wire up its memory. (This can't go in qom/cpu.c
690 * because that file is compiled only once for both user-mode
691 * and system builds.) The default if no link is set up is to use
692 * the system address space.
694 object_property_add_link(OBJECT(cpu), "memory", TYPE_MEMORY_REGION,
695 (Object **)&cpu->memory,
696 qdev_prop_allow_set_link_before_realize,
697 OBJ_PROP_LINK_UNREF_ON_RELEASE,
698 &error_abort);
699 cpu->memory = system_memory;
700 object_ref(OBJECT(cpu->memory));
701 #endif
704 void cpu_exec_realizefn(CPUState *cpu, Error **errp)
706 CPUClass *cc ATTRIBUTE_UNUSED = CPU_GET_CLASS(cpu);
708 cpu_list_add(cpu);
710 #ifndef CONFIG_USER_ONLY
711 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
712 vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
714 if (cc->vmsd != NULL) {
715 vmstate_register(NULL, cpu->cpu_index, cc->vmsd, cpu);
717 #endif
720 static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
722 /* Flush the whole TB as this will not have race conditions
723 * even if we don't have proper locking yet.
724 * Ideally we would just invalidate the TBs for the
725 * specified PC.
727 tb_flush(cpu);
730 #if defined(CONFIG_USER_ONLY)
731 void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
736 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
737 int flags)
739 return -ENOSYS;
742 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
746 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
747 int flags, CPUWatchpoint **watchpoint)
749 return -ENOSYS;
751 #else
752 /* Add a watchpoint. */
753 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
754 int flags, CPUWatchpoint **watchpoint)
756 CPUWatchpoint *wp;
758 /* forbid ranges which are empty or run off the end of the address space */
759 if (len == 0 || (addr + len - 1) < addr) {
760 error_report("tried to set invalid watchpoint at %"
761 VADDR_PRIx ", len=%" VADDR_PRIu, addr, len);
762 return -EINVAL;
764 wp = g_malloc(sizeof(*wp));
766 wp->vaddr = addr;
767 wp->len = len;
768 wp->flags = flags;
770 /* keep all GDB-injected watchpoints in front */
771 if (flags & BP_GDB) {
772 QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry);
773 } else {
774 QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry);
777 tlb_flush_page(cpu, addr);
779 if (watchpoint)
780 *watchpoint = wp;
781 return 0;
784 /* Remove a specific watchpoint. */
785 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
786 int flags)
788 CPUWatchpoint *wp;
790 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
791 if (addr == wp->vaddr && len == wp->len
792 && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {
793 cpu_watchpoint_remove_by_ref(cpu, wp);
794 return 0;
797 return -ENOENT;
800 /* Remove a specific watchpoint by reference. */
801 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
803 QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry);
805 tlb_flush_page(cpu, watchpoint->vaddr);
807 g_free(watchpoint);
810 /* Remove all matching watchpoints. */
811 void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
813 CPUWatchpoint *wp, *next;
815 QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) {
816 if (wp->flags & mask) {
817 cpu_watchpoint_remove_by_ref(cpu, wp);
822 /* Return true if this watchpoint address matches the specified
823 * access (ie the address range covered by the watchpoint overlaps
824 * partially or completely with the address range covered by the
825 * access).
827 static inline bool cpu_watchpoint_address_matches(CPUWatchpoint *wp,
828 vaddr addr,
829 vaddr len)
831 /* We know the lengths are non-zero, but a little caution is
832 * required to avoid errors in the case where the range ends
833 * exactly at the top of the address space and so addr + len
834 * wraps round to zero.
836 vaddr wpend = wp->vaddr + wp->len - 1;
837 vaddr addrend = addr + len - 1;
839 return !(addr > wpend || wp->vaddr > addrend);
842 #endif
844 /* Add a breakpoint. */
845 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
846 CPUBreakpoint **breakpoint)
848 CPUBreakpoint *bp;
850 bp = g_malloc(sizeof(*bp));
852 bp->pc = pc;
853 bp->flags = flags;
855 /* keep all GDB-injected breakpoints in front */
856 if (flags & BP_GDB) {
857 QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
858 } else {
859 QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
862 breakpoint_invalidate(cpu, pc);
864 if (breakpoint) {
865 *breakpoint = bp;
867 return 0;
870 /* Remove a specific breakpoint. */
871 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
873 CPUBreakpoint *bp;
875 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
876 if (bp->pc == pc && bp->flags == flags) {
877 cpu_breakpoint_remove_by_ref(cpu, bp);
878 return 0;
881 return -ENOENT;
884 /* Remove a specific breakpoint by reference. */
885 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint)
887 QTAILQ_REMOVE(&cpu->breakpoints, breakpoint, entry);
889 breakpoint_invalidate(cpu, breakpoint->pc);
891 g_free(breakpoint);
894 /* Remove all matching breakpoints. */
895 void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
897 CPUBreakpoint *bp, *next;
899 QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
900 if (bp->flags & mask) {
901 cpu_breakpoint_remove_by_ref(cpu, bp);
906 /* enable or disable single step mode. EXCP_DEBUG is returned by the
907 CPU loop after each instruction */
908 void cpu_single_step(CPUState *cpu, int enabled)
910 if (cpu->singlestep_enabled != enabled) {
911 cpu->singlestep_enabled = enabled;
912 if (kvm_enabled()) {
913 kvm_update_guest_debug(cpu, 0);
914 } else {
915 /* must flush all the translated code to avoid inconsistencies */
916 /* XXX: only flush what is necessary */
917 tb_flush(cpu);
922 void cpu_abort(CPUState *cpu, const char *fmt, ...)
924 va_list ap;
925 va_list ap2;
927 va_start(ap, fmt);
928 va_copy(ap2, ap);
929 fprintf(stderr, "qemu: fatal: ");
930 vfprintf(stderr, fmt, ap);
931 fprintf(stderr, "\n");
932 cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP);
933 if (qemu_log_separate()) {
934 qemu_log_lock();
935 qemu_log("qemu: fatal: ");
936 qemu_log_vprintf(fmt, ap2);
937 qemu_log("\n");
938 log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP);
939 qemu_log_flush();
940 qemu_log_unlock();
941 qemu_log_close();
943 va_end(ap2);
944 va_end(ap);
945 replay_finish();
946 #if defined(CONFIG_USER_ONLY)
948 struct sigaction act;
949 sigfillset(&act.sa_mask);
950 act.sa_handler = SIG_DFL;
951 sigaction(SIGABRT, &act, NULL);
953 #endif
954 abort();
957 #if !defined(CONFIG_USER_ONLY)
958 /* Called from RCU critical section */
959 static RAMBlock *qemu_get_ram_block(ram_addr_t addr)
961 RAMBlock *block;
963 block = atomic_rcu_read(&ram_list.mru_block);
964 if (block && addr - block->offset < block->max_length) {
965 return block;
967 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
968 if (addr - block->offset < block->max_length) {
969 goto found;
973 fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr);
974 abort();
976 found:
977 /* It is safe to write mru_block outside the iothread lock. This
978 * is what happens:
980 * mru_block = xxx
981 * rcu_read_unlock()
982 * xxx removed from list
983 * rcu_read_lock()
984 * read mru_block
985 * mru_block = NULL;
986 * call_rcu(reclaim_ramblock, xxx);
987 * rcu_read_unlock()
989 * atomic_rcu_set is not needed here. The block was already published
990 * when it was placed into the list. Here we're just making an extra
991 * copy of the pointer.
993 ram_list.mru_block = block;
994 return block;
997 static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length)
999 CPUState *cpu;
1000 ram_addr_t start1;
1001 RAMBlock *block;
1002 ram_addr_t end;
1004 end = TARGET_PAGE_ALIGN(start + length);
1005 start &= TARGET_PAGE_MASK;
1007 rcu_read_lock();
1008 block = qemu_get_ram_block(start);
1009 assert(block == qemu_get_ram_block(end - 1));
1010 start1 = (uintptr_t)ramblock_ptr(block, start - block->offset);
1011 CPU_FOREACH(cpu) {
1012 tlb_reset_dirty(cpu, start1, length);
1014 rcu_read_unlock();
1017 /* Note: start and end must be within the same ram block. */
1018 bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start,
1019 ram_addr_t length,
1020 unsigned client)
1022 DirtyMemoryBlocks *blocks;
1023 unsigned long end, page;
1024 bool dirty = false;
1026 if (length == 0) {
1027 return false;
1030 end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS;
1031 page = start >> TARGET_PAGE_BITS;
1033 rcu_read_lock();
1035 blocks = atomic_rcu_read(&ram_list.dirty_memory[client]);
1037 while (page < end) {
1038 unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE;
1039 unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE;
1040 unsigned long num = MIN(end - page, DIRTY_MEMORY_BLOCK_SIZE - offset);
1042 dirty |= bitmap_test_and_clear_atomic(blocks->blocks[idx],
1043 offset, num);
1044 page += num;
1047 rcu_read_unlock();
1049 if (dirty && tcg_enabled()) {
1050 tlb_reset_dirty_range_all(start, length);
1053 return dirty;
1056 /* Called from RCU critical section */
1057 hwaddr memory_region_section_get_iotlb(CPUState *cpu,
1058 MemoryRegionSection *section,
1059 target_ulong vaddr,
1060 hwaddr paddr, hwaddr xlat,
1061 int prot,
1062 target_ulong *address)
1064 hwaddr iotlb;
1065 CPUWatchpoint *wp;
1067 if (memory_region_is_ram(section->mr)) {
1068 /* Normal RAM. */
1069 iotlb = memory_region_get_ram_addr(section->mr) + xlat;
1070 if (!section->readonly) {
1071 iotlb |= PHYS_SECTION_NOTDIRTY;
1072 } else {
1073 iotlb |= PHYS_SECTION_ROM;
1075 } else {
1076 AddressSpaceDispatch *d;
1078 d = atomic_rcu_read(&section->address_space->dispatch);
1079 iotlb = section - d->map.sections;
1080 iotlb += xlat;
1083 /* Make accesses to pages with watchpoints go via the
1084 watchpoint trap routines. */
1085 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1086 if (cpu_watchpoint_address_matches(wp, vaddr, TARGET_PAGE_SIZE)) {
1087 /* Avoid trapping reads of pages with a write breakpoint. */
1088 if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) {
1089 iotlb = PHYS_SECTION_WATCH + paddr;
1090 *address |= TLB_MMIO;
1091 break;
1096 return iotlb;
1098 #endif /* defined(CONFIG_USER_ONLY) */
1100 #if !defined(CONFIG_USER_ONLY)
1102 static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
1103 uint16_t section);
1104 static subpage_t *subpage_init(AddressSpace *as, hwaddr base);
1106 static void *(*phys_mem_alloc)(size_t size, uint64_t *align) =
1107 qemu_anon_ram_alloc;
1110 * Set a custom physical guest memory alloator.
1111 * Accelerators with unusual needs may need this. Hopefully, we can
1112 * get rid of it eventually.
1114 void phys_mem_set_alloc(void *(*alloc)(size_t, uint64_t *align))
1116 phys_mem_alloc = alloc;
1119 static uint16_t phys_section_add(PhysPageMap *map,
1120 MemoryRegionSection *section)
1122 /* The physical section number is ORed with a page-aligned
1123 * pointer to produce the iotlb entries. Thus it should
1124 * never overflow into the page-aligned value.
1126 assert(map->sections_nb < TARGET_PAGE_SIZE);
1128 if (map->sections_nb == map->sections_nb_alloc) {
1129 map->sections_nb_alloc = MAX(map->sections_nb_alloc * 2, 16);
1130 map->sections = g_renew(MemoryRegionSection, map->sections,
1131 map->sections_nb_alloc);
1133 map->sections[map->sections_nb] = *section;
1134 memory_region_ref(section->mr);
1135 return map->sections_nb++;
1138 static void phys_section_destroy(MemoryRegion *mr)
1140 bool have_sub_page = mr->subpage;
1142 memory_region_unref(mr);
1144 if (have_sub_page) {
1145 subpage_t *subpage = container_of(mr, subpage_t, iomem);
1146 object_unref(OBJECT(&subpage->iomem));
1147 g_free(subpage);
1151 static void phys_sections_free(PhysPageMap *map)
1153 while (map->sections_nb > 0) {
1154 MemoryRegionSection *section = &map->sections[--map->sections_nb];
1155 phys_section_destroy(section->mr);
1157 g_free(map->sections);
1158 g_free(map->nodes);
1161 static void register_subpage(AddressSpaceDispatch *d, MemoryRegionSection *section)
1163 subpage_t *subpage;
1164 hwaddr base = section->offset_within_address_space
1165 & TARGET_PAGE_MASK;
1166 MemoryRegionSection *existing = phys_page_find(d->phys_map, base,
1167 d->map.nodes, d->map.sections);
1168 MemoryRegionSection subsection = {
1169 .offset_within_address_space = base,
1170 .size = int128_make64(TARGET_PAGE_SIZE),
1172 hwaddr start, end;
1174 assert(existing->mr->subpage || existing->mr == &io_mem_unassigned);
1176 if (!(existing->mr->subpage)) {
1177 subpage = subpage_init(d->as, base);
1178 subsection.address_space = d->as;
1179 subsection.mr = &subpage->iomem;
1180 phys_page_set(d, base >> TARGET_PAGE_BITS, 1,
1181 phys_section_add(&d->map, &subsection));
1182 } else {
1183 subpage = container_of(existing->mr, subpage_t, iomem);
1185 start = section->offset_within_address_space & ~TARGET_PAGE_MASK;
1186 end = start + int128_get64(section->size) - 1;
1187 subpage_register(subpage, start, end,
1188 phys_section_add(&d->map, section));
1192 static void register_multipage(AddressSpaceDispatch *d,
1193 MemoryRegionSection *section)
1195 hwaddr start_addr = section->offset_within_address_space;
1196 uint16_t section_index = phys_section_add(&d->map, section);
1197 uint64_t num_pages = int128_get64(int128_rshift(section->size,
1198 TARGET_PAGE_BITS));
1200 assert(num_pages);
1201 phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index);
1204 static void mem_add(MemoryListener *listener, MemoryRegionSection *section)
1206 AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
1207 AddressSpaceDispatch *d = as->next_dispatch;
1208 MemoryRegionSection now = *section, remain = *section;
1209 Int128 page_size = int128_make64(TARGET_PAGE_SIZE);
1211 if (now.offset_within_address_space & ~TARGET_PAGE_MASK) {
1212 uint64_t left = TARGET_PAGE_ALIGN(now.offset_within_address_space)
1213 - now.offset_within_address_space;
1215 now.size = int128_min(int128_make64(left), now.size);
1216 register_subpage(d, &now);
1217 } else {
1218 now.size = int128_zero();
1220 while (int128_ne(remain.size, now.size)) {
1221 remain.size = int128_sub(remain.size, now.size);
1222 remain.offset_within_address_space += int128_get64(now.size);
1223 remain.offset_within_region += int128_get64(now.size);
1224 now = remain;
1225 if (int128_lt(remain.size, page_size)) {
1226 register_subpage(d, &now);
1227 } else if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) {
1228 now.size = page_size;
1229 register_subpage(d, &now);
1230 } else {
1231 now.size = int128_and(now.size, int128_neg(page_size));
1232 register_multipage(d, &now);
1237 void qemu_flush_coalesced_mmio_buffer(void)
1239 if (kvm_enabled())
1240 kvm_flush_coalesced_mmio_buffer();
1243 void qemu_mutex_lock_ramlist(void)
1245 qemu_mutex_lock(&ram_list.mutex);
1248 void qemu_mutex_unlock_ramlist(void)
1250 qemu_mutex_unlock(&ram_list.mutex);
1253 #ifdef __linux__
1254 static int64_t get_file_size(int fd)
1256 int64_t size = lseek(fd, 0, SEEK_END);
1257 if (size < 0) {
1258 return -errno;
1260 return size;
1263 static void *file_ram_alloc(RAMBlock *block,
1264 ram_addr_t memory,
1265 const char *path,
1266 Error **errp)
1268 bool unlink_on_error = false;
1269 char *filename;
1270 char *sanitized_name;
1271 char *c;
1272 void *area = MAP_FAILED;
1273 int fd = -1;
1274 int64_t file_size;
1276 if (kvm_enabled() && !kvm_has_sync_mmu()) {
1277 error_setg(errp,
1278 "host lacks kvm mmu notifiers, -mem-path unsupported");
1279 return NULL;
1282 for (;;) {
1283 fd = open(path, O_RDWR);
1284 if (fd >= 0) {
1285 /* @path names an existing file, use it */
1286 break;
1288 if (errno == ENOENT) {
1289 /* @path names a file that doesn't exist, create it */
1290 fd = open(path, O_RDWR | O_CREAT | O_EXCL, 0644);
1291 if (fd >= 0) {
1292 unlink_on_error = true;
1293 break;
1295 } else if (errno == EISDIR) {
1296 /* @path names a directory, create a file there */
1297 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
1298 sanitized_name = g_strdup(memory_region_name(block->mr));
1299 for (c = sanitized_name; *c != '\0'; c++) {
1300 if (*c == '/') {
1301 *c = '_';
1305 filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path,
1306 sanitized_name);
1307 g_free(sanitized_name);
1309 fd = mkstemp(filename);
1310 if (fd >= 0) {
1311 unlink(filename);
1312 g_free(filename);
1313 break;
1315 g_free(filename);
1317 if (errno != EEXIST && errno != EINTR) {
1318 error_setg_errno(errp, errno,
1319 "can't open backing store %s for guest RAM",
1320 path);
1321 goto error;
1324 * Try again on EINTR and EEXIST. The latter happens when
1325 * something else creates the file between our two open().
1329 block->page_size = qemu_fd_getpagesize(fd);
1330 block->mr->align = block->page_size;
1331 #if defined(__s390x__)
1332 if (kvm_enabled()) {
1333 block->mr->align = MAX(block->mr->align, QEMU_VMALLOC_ALIGN);
1335 #endif
1337 file_size = get_file_size(fd);
1339 if (memory < block->page_size) {
1340 error_setg(errp, "memory size 0x" RAM_ADDR_FMT " must be equal to "
1341 "or larger than page size 0x%zx",
1342 memory, block->page_size);
1343 goto error;
1346 if (file_size > 0 && file_size < memory) {
1347 error_setg(errp, "backing store %s size 0x%" PRIx64
1348 " does not match 'size' option 0x" RAM_ADDR_FMT,
1349 path, file_size, memory);
1350 goto error;
1353 memory = ROUND_UP(memory, block->page_size);
1356 * ftruncate is not supported by hugetlbfs in older
1357 * hosts, so don't bother bailing out on errors.
1358 * If anything goes wrong with it under other filesystems,
1359 * mmap will fail.
1361 * Do not truncate the non-empty backend file to avoid corrupting
1362 * the existing data in the file. Disabling shrinking is not
1363 * enough. For example, the current vNVDIMM implementation stores
1364 * the guest NVDIMM labels at the end of the backend file. If the
1365 * backend file is later extended, QEMU will not be able to find
1366 * those labels. Therefore, extending the non-empty backend file
1367 * is disabled as well.
1369 if (!file_size && ftruncate(fd, memory)) {
1370 perror("ftruncate");
1373 area = qemu_ram_mmap(fd, memory, block->mr->align,
1374 block->flags & RAM_SHARED);
1375 if (area == MAP_FAILED) {
1376 error_setg_errno(errp, errno,
1377 "unable to map backing store for guest RAM");
1378 goto error;
1381 if (mem_prealloc) {
1382 os_mem_prealloc(fd, area, memory, errp);
1383 if (errp && *errp) {
1384 goto error;
1388 block->fd = fd;
1389 return area;
1391 error:
1392 if (area != MAP_FAILED) {
1393 qemu_ram_munmap(area, memory);
1395 if (unlink_on_error) {
1396 unlink(path);
1398 if (fd != -1) {
1399 close(fd);
1401 return NULL;
1403 #endif
1405 /* Called with the ramlist lock held. */
1406 static ram_addr_t find_ram_offset(ram_addr_t size)
1408 RAMBlock *block, *next_block;
1409 ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX;
1411 assert(size != 0); /* it would hand out same offset multiple times */
1413 if (QLIST_EMPTY_RCU(&ram_list.blocks)) {
1414 return 0;
1417 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
1418 ram_addr_t end, next = RAM_ADDR_MAX;
1420 end = block->offset + block->max_length;
1422 QLIST_FOREACH_RCU(next_block, &ram_list.blocks, next) {
1423 if (next_block->offset >= end) {
1424 next = MIN(next, next_block->offset);
1427 if (next - end >= size && next - end < mingap) {
1428 offset = end;
1429 mingap = next - end;
1433 if (offset == RAM_ADDR_MAX) {
1434 fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n",
1435 (uint64_t)size);
1436 abort();
1439 return offset;
1442 ram_addr_t last_ram_offset(void)
1444 RAMBlock *block;
1445 ram_addr_t last = 0;
1447 rcu_read_lock();
1448 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
1449 last = MAX(last, block->offset + block->max_length);
1451 rcu_read_unlock();
1452 return last;
1455 static void qemu_ram_setup_dump(void *addr, ram_addr_t size)
1457 int ret;
1459 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
1460 if (!machine_dump_guest_core(current_machine)) {
1461 ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP);
1462 if (ret) {
1463 perror("qemu_madvise");
1464 fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, "
1465 "but dump_guest_core=off specified\n");
1470 const char *qemu_ram_get_idstr(RAMBlock *rb)
1472 return rb->idstr;
1475 /* Called with iothread lock held. */
1476 void qemu_ram_set_idstr(RAMBlock *new_block, const char *name, DeviceState *dev)
1478 RAMBlock *block;
1480 assert(new_block);
1481 assert(!new_block->idstr[0]);
1483 if (dev) {
1484 char *id = qdev_get_dev_path(dev);
1485 if (id) {
1486 snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id);
1487 g_free(id);
1490 pstrcat(new_block->idstr, sizeof(new_block->idstr), name);
1492 rcu_read_lock();
1493 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
1494 if (block != new_block &&
1495 !strcmp(block->idstr, new_block->idstr)) {
1496 fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n",
1497 new_block->idstr);
1498 abort();
1501 rcu_read_unlock();
1504 /* Called with iothread lock held. */
1505 void qemu_ram_unset_idstr(RAMBlock *block)
1507 /* FIXME: arch_init.c assumes that this is not called throughout
1508 * migration. Ignore the problem since hot-unplug during migration
1509 * does not work anyway.
1511 if (block) {
1512 memset(block->idstr, 0, sizeof(block->idstr));
1516 size_t qemu_ram_pagesize(RAMBlock *rb)
1518 return rb->page_size;
1521 static int memory_try_enable_merging(void *addr, size_t len)
1523 if (!machine_mem_merge(current_machine)) {
1524 /* disabled by the user */
1525 return 0;
1528 return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE);
1531 /* Only legal before guest might have detected the memory size: e.g. on
1532 * incoming migration, or right after reset.
1534 * As memory core doesn't know how is memory accessed, it is up to
1535 * resize callback to update device state and/or add assertions to detect
1536 * misuse, if necessary.
1538 int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp)
1540 assert(block);
1542 newsize = HOST_PAGE_ALIGN(newsize);
1544 if (block->used_length == newsize) {
1545 return 0;
1548 if (!(block->flags & RAM_RESIZEABLE)) {
1549 error_setg_errno(errp, EINVAL,
1550 "Length mismatch: %s: 0x" RAM_ADDR_FMT
1551 " in != 0x" RAM_ADDR_FMT, block->idstr,
1552 newsize, block->used_length);
1553 return -EINVAL;
1556 if (block->max_length < newsize) {
1557 error_setg_errno(errp, EINVAL,
1558 "Length too large: %s: 0x" RAM_ADDR_FMT
1559 " > 0x" RAM_ADDR_FMT, block->idstr,
1560 newsize, block->max_length);
1561 return -EINVAL;
1564 cpu_physical_memory_clear_dirty_range(block->offset, block->used_length);
1565 block->used_length = newsize;
1566 cpu_physical_memory_set_dirty_range(block->offset, block->used_length,
1567 DIRTY_CLIENTS_ALL);
1568 memory_region_set_size(block->mr, newsize);
1569 if (block->resized) {
1570 block->resized(block->idstr, newsize, block->host);
1572 return 0;
1575 /* Called with ram_list.mutex held */
1576 static void dirty_memory_extend(ram_addr_t old_ram_size,
1577 ram_addr_t new_ram_size)
1579 ram_addr_t old_num_blocks = DIV_ROUND_UP(old_ram_size,
1580 DIRTY_MEMORY_BLOCK_SIZE);
1581 ram_addr_t new_num_blocks = DIV_ROUND_UP(new_ram_size,
1582 DIRTY_MEMORY_BLOCK_SIZE);
1583 int i;
1585 /* Only need to extend if block count increased */
1586 if (new_num_blocks <= old_num_blocks) {
1587 return;
1590 for (i = 0; i < DIRTY_MEMORY_NUM; i++) {
1591 DirtyMemoryBlocks *old_blocks;
1592 DirtyMemoryBlocks *new_blocks;
1593 int j;
1595 old_blocks = atomic_rcu_read(&ram_list.dirty_memory[i]);
1596 new_blocks = g_malloc(sizeof(*new_blocks) +
1597 sizeof(new_blocks->blocks[0]) * new_num_blocks);
1599 if (old_num_blocks) {
1600 memcpy(new_blocks->blocks, old_blocks->blocks,
1601 old_num_blocks * sizeof(old_blocks->blocks[0]));
1604 for (j = old_num_blocks; j < new_num_blocks; j++) {
1605 new_blocks->blocks[j] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE);
1608 atomic_rcu_set(&ram_list.dirty_memory[i], new_blocks);
1610 if (old_blocks) {
1611 g_free_rcu(old_blocks, rcu);
1616 static void ram_block_add(RAMBlock *new_block, Error **errp)
1618 RAMBlock *block;
1619 RAMBlock *last_block = NULL;
1620 ram_addr_t old_ram_size, new_ram_size;
1621 Error *err = NULL;
1623 old_ram_size = last_ram_offset() >> TARGET_PAGE_BITS;
1625 qemu_mutex_lock_ramlist();
1626 new_block->offset = find_ram_offset(new_block->max_length);
1628 if (!new_block->host) {
1629 if (xen_enabled()) {
1630 xen_ram_alloc(new_block->offset, new_block->max_length,
1631 new_block->mr, &err);
1632 if (err) {
1633 error_propagate(errp, err);
1634 qemu_mutex_unlock_ramlist();
1635 return;
1637 } else {
1638 new_block->host = phys_mem_alloc(new_block->max_length,
1639 &new_block->mr->align);
1640 if (!new_block->host) {
1641 error_setg_errno(errp, errno,
1642 "cannot set up guest memory '%s'",
1643 memory_region_name(new_block->mr));
1644 qemu_mutex_unlock_ramlist();
1645 return;
1647 memory_try_enable_merging(new_block->host, new_block->max_length);
1651 new_ram_size = MAX(old_ram_size,
1652 (new_block->offset + new_block->max_length) >> TARGET_PAGE_BITS);
1653 if (new_ram_size > old_ram_size) {
1654 migration_bitmap_extend(old_ram_size, new_ram_size);
1655 dirty_memory_extend(old_ram_size, new_ram_size);
1657 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
1658 * QLIST (which has an RCU-friendly variant) does not have insertion at
1659 * tail, so save the last element in last_block.
1661 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
1662 last_block = block;
1663 if (block->max_length < new_block->max_length) {
1664 break;
1667 if (block) {
1668 QLIST_INSERT_BEFORE_RCU(block, new_block, next);
1669 } else if (last_block) {
1670 QLIST_INSERT_AFTER_RCU(last_block, new_block, next);
1671 } else { /* list is empty */
1672 QLIST_INSERT_HEAD_RCU(&ram_list.blocks, new_block, next);
1674 ram_list.mru_block = NULL;
1676 /* Write list before version */
1677 smp_wmb();
1678 ram_list.version++;
1679 qemu_mutex_unlock_ramlist();
1681 cpu_physical_memory_set_dirty_range(new_block->offset,
1682 new_block->used_length,
1683 DIRTY_CLIENTS_ALL);
1685 if (new_block->host) {
1686 qemu_ram_setup_dump(new_block->host, new_block->max_length);
1687 qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_HUGEPAGE);
1688 /* MADV_DONTFORK is also needed by KVM in absence of synchronous MMU */
1689 qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_DONTFORK);
1690 ram_block_notify_add(new_block->host, new_block->max_length);
1694 #ifdef __linux__
1695 RAMBlock *qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr,
1696 bool share, const char *mem_path,
1697 Error **errp)
1699 RAMBlock *new_block;
1700 Error *local_err = NULL;
1702 if (xen_enabled()) {
1703 error_setg(errp, "-mem-path not supported with Xen");
1704 return NULL;
1707 if (phys_mem_alloc != qemu_anon_ram_alloc) {
1709 * file_ram_alloc() needs to allocate just like
1710 * phys_mem_alloc, but we haven't bothered to provide
1711 * a hook there.
1713 error_setg(errp,
1714 "-mem-path not supported with this accelerator");
1715 return NULL;
1718 size = HOST_PAGE_ALIGN(size);
1719 new_block = g_malloc0(sizeof(*new_block));
1720 new_block->mr = mr;
1721 new_block->used_length = size;
1722 new_block->max_length = size;
1723 new_block->flags = share ? RAM_SHARED : 0;
1724 new_block->host = file_ram_alloc(new_block, size,
1725 mem_path, errp);
1726 if (!new_block->host) {
1727 g_free(new_block);
1728 return NULL;
1731 ram_block_add(new_block, &local_err);
1732 if (local_err) {
1733 g_free(new_block);
1734 error_propagate(errp, local_err);
1735 return NULL;
1737 return new_block;
1739 #endif
1741 static
1742 RAMBlock *qemu_ram_alloc_internal(ram_addr_t size, ram_addr_t max_size,
1743 void (*resized)(const char*,
1744 uint64_t length,
1745 void *host),
1746 void *host, bool resizeable,
1747 MemoryRegion *mr, Error **errp)
1749 RAMBlock *new_block;
1750 Error *local_err = NULL;
1752 size = HOST_PAGE_ALIGN(size);
1753 max_size = HOST_PAGE_ALIGN(max_size);
1754 new_block = g_malloc0(sizeof(*new_block));
1755 new_block->mr = mr;
1756 new_block->resized = resized;
1757 new_block->used_length = size;
1758 new_block->max_length = max_size;
1759 assert(max_size >= size);
1760 new_block->fd = -1;
1761 new_block->page_size = getpagesize();
1762 new_block->host = host;
1763 if (host) {
1764 new_block->flags |= RAM_PREALLOC;
1766 if (resizeable) {
1767 new_block->flags |= RAM_RESIZEABLE;
1769 ram_block_add(new_block, &local_err);
1770 if (local_err) {
1771 g_free(new_block);
1772 error_propagate(errp, local_err);
1773 return NULL;
1775 return new_block;
1778 RAMBlock *qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
1779 MemoryRegion *mr, Error **errp)
1781 return qemu_ram_alloc_internal(size, size, NULL, host, false, mr, errp);
1784 RAMBlock *qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr, Error **errp)
1786 return qemu_ram_alloc_internal(size, size, NULL, NULL, false, mr, errp);
1789 RAMBlock *qemu_ram_alloc_resizeable(ram_addr_t size, ram_addr_t maxsz,
1790 void (*resized)(const char*,
1791 uint64_t length,
1792 void *host),
1793 MemoryRegion *mr, Error **errp)
1795 return qemu_ram_alloc_internal(size, maxsz, resized, NULL, true, mr, errp);
1798 static void reclaim_ramblock(RAMBlock *block)
1800 if (block->flags & RAM_PREALLOC) {
1802 } else if (xen_enabled()) {
1803 xen_invalidate_map_cache_entry(block->host);
1804 #ifndef _WIN32
1805 } else if (block->fd >= 0) {
1806 qemu_ram_munmap(block->host, block->max_length);
1807 close(block->fd);
1808 #endif
1809 } else {
1810 qemu_anon_ram_free(block->host, block->max_length);
1812 g_free(block);
1815 void qemu_ram_free(RAMBlock *block)
1817 if (!block) {
1818 return;
1821 if (block->host) {
1822 ram_block_notify_remove(block->host, block->max_length);
1825 qemu_mutex_lock_ramlist();
1826 QLIST_REMOVE_RCU(block, next);
1827 ram_list.mru_block = NULL;
1828 /* Write list before version */
1829 smp_wmb();
1830 ram_list.version++;
1831 call_rcu(block, reclaim_ramblock, rcu);
1832 qemu_mutex_unlock_ramlist();
1835 #ifndef _WIN32
1836 void qemu_ram_remap(ram_addr_t addr, ram_addr_t length)
1838 RAMBlock *block;
1839 ram_addr_t offset;
1840 int flags;
1841 void *area, *vaddr;
1843 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
1844 offset = addr - block->offset;
1845 if (offset < block->max_length) {
1846 vaddr = ramblock_ptr(block, offset);
1847 if (block->flags & RAM_PREALLOC) {
1849 } else if (xen_enabled()) {
1850 abort();
1851 } else {
1852 flags = MAP_FIXED;
1853 if (block->fd >= 0) {
1854 flags |= (block->flags & RAM_SHARED ?
1855 MAP_SHARED : MAP_PRIVATE);
1856 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
1857 flags, block->fd, offset);
1858 } else {
1860 * Remap needs to match alloc. Accelerators that
1861 * set phys_mem_alloc never remap. If they did,
1862 * we'd need a remap hook here.
1864 assert(phys_mem_alloc == qemu_anon_ram_alloc);
1866 flags |= MAP_PRIVATE | MAP_ANONYMOUS;
1867 area = mmap(vaddr, length, PROT_READ | PROT_WRITE,
1868 flags, -1, 0);
1870 if (area != vaddr) {
1871 fprintf(stderr, "Could not remap addr: "
1872 RAM_ADDR_FMT "@" RAM_ADDR_FMT "\n",
1873 length, addr);
1874 exit(1);
1876 memory_try_enable_merging(vaddr, length);
1877 qemu_ram_setup_dump(vaddr, length);
1882 #endif /* !_WIN32 */
1884 /* Return a host pointer to ram allocated with qemu_ram_alloc.
1885 * This should not be used for general purpose DMA. Use address_space_map
1886 * or address_space_rw instead. For local memory (e.g. video ram) that the
1887 * device owns, use memory_region_get_ram_ptr.
1889 * Called within RCU critical section.
1891 void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr)
1893 RAMBlock *block = ram_block;
1895 if (block == NULL) {
1896 block = qemu_get_ram_block(addr);
1897 addr -= block->offset;
1900 if (xen_enabled() && block->host == NULL) {
1901 /* We need to check if the requested address is in the RAM
1902 * because we don't want to map the entire memory in QEMU.
1903 * In that case just map until the end of the page.
1905 if (block->offset == 0) {
1906 return xen_map_cache(addr, 0, 0);
1909 block->host = xen_map_cache(block->offset, block->max_length, 1);
1911 return ramblock_ptr(block, addr);
1914 /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
1915 * but takes a size argument.
1917 * Called within RCU critical section.
1919 static void *qemu_ram_ptr_length(RAMBlock *ram_block, ram_addr_t addr,
1920 hwaddr *size)
1922 RAMBlock *block = ram_block;
1923 if (*size == 0) {
1924 return NULL;
1927 if (block == NULL) {
1928 block = qemu_get_ram_block(addr);
1929 addr -= block->offset;
1931 *size = MIN(*size, block->max_length - addr);
1933 if (xen_enabled() && block->host == NULL) {
1934 /* We need to check if the requested address is in the RAM
1935 * because we don't want to map the entire memory in QEMU.
1936 * In that case just map the requested area.
1938 if (block->offset == 0) {
1939 return xen_map_cache(addr, *size, 1);
1942 block->host = xen_map_cache(block->offset, block->max_length, 1);
1945 return ramblock_ptr(block, addr);
1949 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
1950 * in that RAMBlock.
1952 * ptr: Host pointer to look up
1953 * round_offset: If true round the result offset down to a page boundary
1954 * *ram_addr: set to result ram_addr
1955 * *offset: set to result offset within the RAMBlock
1957 * Returns: RAMBlock (or NULL if not found)
1959 * By the time this function returns, the returned pointer is not protected
1960 * by RCU anymore. If the caller is not within an RCU critical section and
1961 * does not hold the iothread lock, it must have other means of protecting the
1962 * pointer, such as a reference to the region that includes the incoming
1963 * ram_addr_t.
1965 RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset,
1966 ram_addr_t *offset)
1968 RAMBlock *block;
1969 uint8_t *host = ptr;
1971 if (xen_enabled()) {
1972 ram_addr_t ram_addr;
1973 rcu_read_lock();
1974 ram_addr = xen_ram_addr_from_mapcache(ptr);
1975 block = qemu_get_ram_block(ram_addr);
1976 if (block) {
1977 *offset = ram_addr - block->offset;
1979 rcu_read_unlock();
1980 return block;
1983 rcu_read_lock();
1984 block = atomic_rcu_read(&ram_list.mru_block);
1985 if (block && block->host && host - block->host < block->max_length) {
1986 goto found;
1989 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
1990 /* This case append when the block is not mapped. */
1991 if (block->host == NULL) {
1992 continue;
1994 if (host - block->host < block->max_length) {
1995 goto found;
1999 rcu_read_unlock();
2000 return NULL;
2002 found:
2003 *offset = (host - block->host);
2004 if (round_offset) {
2005 *offset &= TARGET_PAGE_MASK;
2007 rcu_read_unlock();
2008 return block;
2012 * Finds the named RAMBlock
2014 * name: The name of RAMBlock to find
2016 * Returns: RAMBlock (or NULL if not found)
2018 RAMBlock *qemu_ram_block_by_name(const char *name)
2020 RAMBlock *block;
2022 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
2023 if (!strcmp(name, block->idstr)) {
2024 return block;
2028 return NULL;
2031 /* Some of the softmmu routines need to translate from a host pointer
2032 (typically a TLB entry) back to a ram offset. */
2033 ram_addr_t qemu_ram_addr_from_host(void *ptr)
2035 RAMBlock *block;
2036 ram_addr_t offset;
2038 block = qemu_ram_block_from_host(ptr, false, &offset);
2039 if (!block) {
2040 return RAM_ADDR_INVALID;
2043 return block->offset + offset;
2046 /* Called within RCU critical section. */
2047 static void notdirty_mem_write(void *opaque, hwaddr ram_addr,
2048 uint64_t val, unsigned size)
2050 bool locked = false;
2052 if (!cpu_physical_memory_get_dirty_flag(ram_addr, DIRTY_MEMORY_CODE)) {
2053 locked = true;
2054 tb_lock();
2055 tb_invalidate_phys_page_fast(ram_addr, size);
2057 switch (size) {
2058 case 1:
2059 stb_p(qemu_map_ram_ptr(NULL, ram_addr), val);
2060 break;
2061 case 2:
2062 stw_p(qemu_map_ram_ptr(NULL, ram_addr), val);
2063 break;
2064 case 4:
2065 stl_p(qemu_map_ram_ptr(NULL, ram_addr), val);
2066 break;
2067 default:
2068 abort();
2071 if (locked) {
2072 tb_unlock();
2075 /* Set both VGA and migration bits for simplicity and to remove
2076 * the notdirty callback faster.
2078 cpu_physical_memory_set_dirty_range(ram_addr, size,
2079 DIRTY_CLIENTS_NOCODE);
2080 /* we remove the notdirty callback only if the code has been
2081 flushed */
2082 if (!cpu_physical_memory_is_clean(ram_addr)) {
2083 tlb_set_dirty(current_cpu, current_cpu->mem_io_vaddr);
2087 static bool notdirty_mem_accepts(void *opaque, hwaddr addr,
2088 unsigned size, bool is_write)
2090 return is_write;
2093 static const MemoryRegionOps notdirty_mem_ops = {
2094 .write = notdirty_mem_write,
2095 .valid.accepts = notdirty_mem_accepts,
2096 .endianness = DEVICE_NATIVE_ENDIAN,
2099 /* Generate a debug exception if a watchpoint has been hit. */
2100 static void check_watchpoint(int offset, int len, MemTxAttrs attrs, int flags)
2102 CPUState *cpu = current_cpu;
2103 CPUClass *cc = CPU_GET_CLASS(cpu);
2104 CPUArchState *env = cpu->env_ptr;
2105 target_ulong pc, cs_base;
2106 target_ulong vaddr;
2107 CPUWatchpoint *wp;
2108 uint32_t cpu_flags;
2110 if (cpu->watchpoint_hit) {
2111 /* We re-entered the check after replacing the TB. Now raise
2112 * the debug interrupt so that is will trigger after the
2113 * current instruction. */
2114 cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
2115 return;
2117 vaddr = (cpu->mem_io_vaddr & TARGET_PAGE_MASK) + offset;
2118 vaddr = cc->adjust_watchpoint_address(cpu, vaddr, len);
2119 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
2120 if (cpu_watchpoint_address_matches(wp, vaddr, len)
2121 && (wp->flags & flags)) {
2122 if (flags == BP_MEM_READ) {
2123 wp->flags |= BP_WATCHPOINT_HIT_READ;
2124 } else {
2125 wp->flags |= BP_WATCHPOINT_HIT_WRITE;
2127 wp->hitaddr = vaddr;
2128 wp->hitattrs = attrs;
2129 if (!cpu->watchpoint_hit) {
2130 if (wp->flags & BP_CPU &&
2131 !cc->debug_check_watchpoint(cpu, wp)) {
2132 wp->flags &= ~BP_WATCHPOINT_HIT;
2133 continue;
2135 cpu->watchpoint_hit = wp;
2137 /* The tb_lock will be reset when cpu_loop_exit or
2138 * cpu_loop_exit_noexc longjmp back into the cpu_exec
2139 * main loop.
2141 tb_lock();
2142 tb_check_watchpoint(cpu);
2143 if (wp->flags & BP_STOP_BEFORE_ACCESS) {
2144 cpu->exception_index = EXCP_DEBUG;
2145 cpu_loop_exit(cpu);
2146 } else {
2147 cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags);
2148 tb_gen_code(cpu, pc, cs_base, cpu_flags, 1);
2149 cpu_loop_exit_noexc(cpu);
2152 } else {
2153 wp->flags &= ~BP_WATCHPOINT_HIT;
2158 /* Watchpoint access routines. Watchpoints are inserted using TLB tricks,
2159 so these check for a hit then pass through to the normal out-of-line
2160 phys routines. */
2161 static MemTxResult watch_mem_read(void *opaque, hwaddr addr, uint64_t *pdata,
2162 unsigned size, MemTxAttrs attrs)
2164 MemTxResult res;
2165 uint64_t data;
2166 int asidx = cpu_asidx_from_attrs(current_cpu, attrs);
2167 AddressSpace *as = current_cpu->cpu_ases[asidx].as;
2169 check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_READ);
2170 switch (size) {
2171 case 1:
2172 data = address_space_ldub(as, addr, attrs, &res);
2173 break;
2174 case 2:
2175 data = address_space_lduw(as, addr, attrs, &res);
2176 break;
2177 case 4:
2178 data = address_space_ldl(as, addr, attrs, &res);
2179 break;
2180 default: abort();
2182 *pdata = data;
2183 return res;
2186 static MemTxResult watch_mem_write(void *opaque, hwaddr addr,
2187 uint64_t val, unsigned size,
2188 MemTxAttrs attrs)
2190 MemTxResult res;
2191 int asidx = cpu_asidx_from_attrs(current_cpu, attrs);
2192 AddressSpace *as = current_cpu->cpu_ases[asidx].as;
2194 check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_WRITE);
2195 switch (size) {
2196 case 1:
2197 address_space_stb(as, addr, val, attrs, &res);
2198 break;
2199 case 2:
2200 address_space_stw(as, addr, val, attrs, &res);
2201 break;
2202 case 4:
2203 address_space_stl(as, addr, val, attrs, &res);
2204 break;
2205 default: abort();
2207 return res;
2210 static const MemoryRegionOps watch_mem_ops = {
2211 .read_with_attrs = watch_mem_read,
2212 .write_with_attrs = watch_mem_write,
2213 .endianness = DEVICE_NATIVE_ENDIAN,
2216 static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
2217 unsigned len, MemTxAttrs attrs)
2219 subpage_t *subpage = opaque;
2220 uint8_t buf[8];
2221 MemTxResult res;
2223 #if defined(DEBUG_SUBPAGE)
2224 printf("%s: subpage %p len %u addr " TARGET_FMT_plx "\n", __func__,
2225 subpage, len, addr);
2226 #endif
2227 res = address_space_read(subpage->as, addr + subpage->base,
2228 attrs, buf, len);
2229 if (res) {
2230 return res;
2232 switch (len) {
2233 case 1:
2234 *data = ldub_p(buf);
2235 return MEMTX_OK;
2236 case 2:
2237 *data = lduw_p(buf);
2238 return MEMTX_OK;
2239 case 4:
2240 *data = ldl_p(buf);
2241 return MEMTX_OK;
2242 case 8:
2243 *data = ldq_p(buf);
2244 return MEMTX_OK;
2245 default:
2246 abort();
2250 static MemTxResult subpage_write(void *opaque, hwaddr addr,
2251 uint64_t value, unsigned len, MemTxAttrs attrs)
2253 subpage_t *subpage = opaque;
2254 uint8_t buf[8];
2256 #if defined(DEBUG_SUBPAGE)
2257 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
2258 " value %"PRIx64"\n",
2259 __func__, subpage, len, addr, value);
2260 #endif
2261 switch (len) {
2262 case 1:
2263 stb_p(buf, value);
2264 break;
2265 case 2:
2266 stw_p(buf, value);
2267 break;
2268 case 4:
2269 stl_p(buf, value);
2270 break;
2271 case 8:
2272 stq_p(buf, value);
2273 break;
2274 default:
2275 abort();
2277 return address_space_write(subpage->as, addr + subpage->base,
2278 attrs, buf, len);
2281 static bool subpage_accepts(void *opaque, hwaddr addr,
2282 unsigned len, bool is_write)
2284 subpage_t *subpage = opaque;
2285 #if defined(DEBUG_SUBPAGE)
2286 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx "\n",
2287 __func__, subpage, is_write ? 'w' : 'r', len, addr);
2288 #endif
2290 return address_space_access_valid(subpage->as, addr + subpage->base,
2291 len, is_write);
2294 static const MemoryRegionOps subpage_ops = {
2295 .read_with_attrs = subpage_read,
2296 .write_with_attrs = subpage_write,
2297 .impl.min_access_size = 1,
2298 .impl.max_access_size = 8,
2299 .valid.min_access_size = 1,
2300 .valid.max_access_size = 8,
2301 .valid.accepts = subpage_accepts,
2302 .endianness = DEVICE_NATIVE_ENDIAN,
2305 static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
2306 uint16_t section)
2308 int idx, eidx;
2310 if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE)
2311 return -1;
2312 idx = SUBPAGE_IDX(start);
2313 eidx = SUBPAGE_IDX(end);
2314 #if defined(DEBUG_SUBPAGE)
2315 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2316 __func__, mmio, start, end, idx, eidx, section);
2317 #endif
2318 for (; idx <= eidx; idx++) {
2319 mmio->sub_section[idx] = section;
2322 return 0;
2325 static subpage_t *subpage_init(AddressSpace *as, hwaddr base)
2327 subpage_t *mmio;
2329 mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t));
2330 mmio->as = as;
2331 mmio->base = base;
2332 memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
2333 NULL, TARGET_PAGE_SIZE);
2334 mmio->iomem.subpage = true;
2335 #if defined(DEBUG_SUBPAGE)
2336 printf("%s: %p base " TARGET_FMT_plx " len %08x\n", __func__,
2337 mmio, base, TARGET_PAGE_SIZE);
2338 #endif
2339 subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, PHYS_SECTION_UNASSIGNED);
2341 return mmio;
2344 static uint16_t dummy_section(PhysPageMap *map, AddressSpace *as,
2345 MemoryRegion *mr)
2347 assert(as);
2348 MemoryRegionSection section = {
2349 .address_space = as,
2350 .mr = mr,
2351 .offset_within_address_space = 0,
2352 .offset_within_region = 0,
2353 .size = int128_2_64(),
2356 return phys_section_add(map, &section);
2359 MemoryRegion *iotlb_to_region(CPUState *cpu, hwaddr index, MemTxAttrs attrs)
2361 int asidx = cpu_asidx_from_attrs(cpu, attrs);
2362 CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
2363 AddressSpaceDispatch *d = atomic_rcu_read(&cpuas->memory_dispatch);
2364 MemoryRegionSection *sections = d->map.sections;
2366 return sections[index & ~TARGET_PAGE_MASK].mr;
2369 static void io_mem_init(void)
2371 memory_region_init_io(&io_mem_rom, NULL, &unassigned_mem_ops, NULL, NULL, UINT64_MAX);
2372 memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL,
2373 NULL, UINT64_MAX);
2374 memory_region_init_io(&io_mem_notdirty, NULL, &notdirty_mem_ops, NULL,
2375 NULL, UINT64_MAX);
2376 memory_region_init_io(&io_mem_watch, NULL, &watch_mem_ops, NULL,
2377 NULL, UINT64_MAX);
2380 static void mem_begin(MemoryListener *listener)
2382 AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
2383 AddressSpaceDispatch *d = g_new0(AddressSpaceDispatch, 1);
2384 uint16_t n;
2386 n = dummy_section(&d->map, as, &io_mem_unassigned);
2387 assert(n == PHYS_SECTION_UNASSIGNED);
2388 n = dummy_section(&d->map, as, &io_mem_notdirty);
2389 assert(n == PHYS_SECTION_NOTDIRTY);
2390 n = dummy_section(&d->map, as, &io_mem_rom);
2391 assert(n == PHYS_SECTION_ROM);
2392 n = dummy_section(&d->map, as, &io_mem_watch);
2393 assert(n == PHYS_SECTION_WATCH);
2395 d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .skip = 1 };
2396 d->as = as;
2397 as->next_dispatch = d;
2400 static void address_space_dispatch_free(AddressSpaceDispatch *d)
2402 phys_sections_free(&d->map);
2403 g_free(d);
2406 static void mem_commit(MemoryListener *listener)
2408 AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
2409 AddressSpaceDispatch *cur = as->dispatch;
2410 AddressSpaceDispatch *next = as->next_dispatch;
2412 phys_page_compact_all(next, next->map.nodes_nb);
2414 atomic_rcu_set(&as->dispatch, next);
2415 if (cur) {
2416 call_rcu(cur, address_space_dispatch_free, rcu);
2420 static void tcg_commit(MemoryListener *listener)
2422 CPUAddressSpace *cpuas;
2423 AddressSpaceDispatch *d;
2425 /* since each CPU stores ram addresses in its TLB cache, we must
2426 reset the modified entries */
2427 cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener);
2428 cpu_reloading_memory_map();
2429 /* The CPU and TLB are protected by the iothread lock.
2430 * We reload the dispatch pointer now because cpu_reloading_memory_map()
2431 * may have split the RCU critical section.
2433 d = atomic_rcu_read(&cpuas->as->dispatch);
2434 atomic_rcu_set(&cpuas->memory_dispatch, d);
2435 tlb_flush(cpuas->cpu);
2438 void address_space_init_dispatch(AddressSpace *as)
2440 as->dispatch = NULL;
2441 as->dispatch_listener = (MemoryListener) {
2442 .begin = mem_begin,
2443 .commit = mem_commit,
2444 .region_add = mem_add,
2445 .region_nop = mem_add,
2446 .priority = 0,
2448 memory_listener_register(&as->dispatch_listener, as);
2451 void address_space_unregister(AddressSpace *as)
2453 memory_listener_unregister(&as->dispatch_listener);
2456 void address_space_destroy_dispatch(AddressSpace *as)
2458 AddressSpaceDispatch *d = as->dispatch;
2460 atomic_rcu_set(&as->dispatch, NULL);
2461 if (d) {
2462 call_rcu(d, address_space_dispatch_free, rcu);
2466 static void memory_map_init(void)
2468 system_memory = g_malloc(sizeof(*system_memory));
2470 memory_region_init(system_memory, NULL, "system", UINT64_MAX);
2471 address_space_init(&address_space_memory, system_memory, "memory");
2473 system_io = g_malloc(sizeof(*system_io));
2474 memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io",
2475 65536);
2476 address_space_init(&address_space_io, system_io, "I/O");
2479 MemoryRegion *get_system_memory(void)
2481 return system_memory;
2484 MemoryRegion *get_system_io(void)
2486 return system_io;
2489 #endif /* !defined(CONFIG_USER_ONLY) */
2491 /* physical memory access (slow version, mainly for debug) */
2492 #if defined(CONFIG_USER_ONLY)
2493 int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
2494 uint8_t *buf, int len, int is_write)
2496 int l, flags;
2497 target_ulong page;
2498 void * p;
2500 while (len > 0) {
2501 page = addr & TARGET_PAGE_MASK;
2502 l = (page + TARGET_PAGE_SIZE) - addr;
2503 if (l > len)
2504 l = len;
2505 flags = page_get_flags(page);
2506 if (!(flags & PAGE_VALID))
2507 return -1;
2508 if (is_write) {
2509 if (!(flags & PAGE_WRITE))
2510 return -1;
2511 /* XXX: this code should not depend on lock_user */
2512 if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
2513 return -1;
2514 memcpy(p, buf, l);
2515 unlock_user(p, addr, l);
2516 } else {
2517 if (!(flags & PAGE_READ))
2518 return -1;
2519 /* XXX: this code should not depend on lock_user */
2520 if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
2521 return -1;
2522 memcpy(buf, p, l);
2523 unlock_user(p, addr, 0);
2525 len -= l;
2526 buf += l;
2527 addr += l;
2529 return 0;
2532 #else
2534 static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr,
2535 hwaddr length)
2537 uint8_t dirty_log_mask = memory_region_get_dirty_log_mask(mr);
2538 addr += memory_region_get_ram_addr(mr);
2540 /* No early return if dirty_log_mask is or becomes 0, because
2541 * cpu_physical_memory_set_dirty_range will still call
2542 * xen_modified_memory.
2544 if (dirty_log_mask) {
2545 dirty_log_mask =
2546 cpu_physical_memory_range_includes_clean(addr, length, dirty_log_mask);
2548 if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) {
2549 tb_lock();
2550 tb_invalidate_phys_range(addr, addr + length);
2551 tb_unlock();
2552 dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE);
2554 cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask);
2557 static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr)
2559 unsigned access_size_max = mr->ops->valid.max_access_size;
2561 /* Regions are assumed to support 1-4 byte accesses unless
2562 otherwise specified. */
2563 if (access_size_max == 0) {
2564 access_size_max = 4;
2567 /* Bound the maximum access by the alignment of the address. */
2568 if (!mr->ops->impl.unaligned) {
2569 unsigned align_size_max = addr & -addr;
2570 if (align_size_max != 0 && align_size_max < access_size_max) {
2571 access_size_max = align_size_max;
2575 /* Don't attempt accesses larger than the maximum. */
2576 if (l > access_size_max) {
2577 l = access_size_max;
2579 l = pow2floor(l);
2581 return l;
2584 static bool prepare_mmio_access(MemoryRegion *mr)
2586 bool unlocked = !qemu_mutex_iothread_locked();
2587 bool release_lock = false;
2589 if (unlocked && mr->global_locking) {
2590 qemu_mutex_lock_iothread();
2591 unlocked = false;
2592 release_lock = true;
2594 if (mr->flush_coalesced_mmio) {
2595 if (unlocked) {
2596 qemu_mutex_lock_iothread();
2598 qemu_flush_coalesced_mmio_buffer();
2599 if (unlocked) {
2600 qemu_mutex_unlock_iothread();
2604 return release_lock;
2607 /* Called within RCU critical section. */
2608 static MemTxResult address_space_write_continue(AddressSpace *as, hwaddr addr,
2609 MemTxAttrs attrs,
2610 const uint8_t *buf,
2611 int len, hwaddr addr1,
2612 hwaddr l, MemoryRegion *mr)
2614 uint8_t *ptr;
2615 uint64_t val;
2616 MemTxResult result = MEMTX_OK;
2617 bool release_lock = false;
2619 for (;;) {
2620 if (!memory_access_is_direct(mr, true)) {
2621 release_lock |= prepare_mmio_access(mr);
2622 l = memory_access_size(mr, l, addr1);
2623 /* XXX: could force current_cpu to NULL to avoid
2624 potential bugs */
2625 switch (l) {
2626 case 8:
2627 /* 64 bit write access */
2628 val = ldq_p(buf);
2629 result |= memory_region_dispatch_write(mr, addr1, val, 8,
2630 attrs);
2631 break;
2632 case 4:
2633 /* 32 bit write access */
2634 val = (uint32_t)ldl_p(buf);
2635 result |= memory_region_dispatch_write(mr, addr1, val, 4,
2636 attrs);
2637 break;
2638 case 2:
2639 /* 16 bit write access */
2640 val = lduw_p(buf);
2641 result |= memory_region_dispatch_write(mr, addr1, val, 2,
2642 attrs);
2643 break;
2644 case 1:
2645 /* 8 bit write access */
2646 val = ldub_p(buf);
2647 result |= memory_region_dispatch_write(mr, addr1, val, 1,
2648 attrs);
2649 break;
2650 default:
2651 abort();
2653 } else {
2654 /* RAM case */
2655 ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
2656 memcpy(ptr, buf, l);
2657 invalidate_and_set_dirty(mr, addr1, l);
2660 if (release_lock) {
2661 qemu_mutex_unlock_iothread();
2662 release_lock = false;
2665 len -= l;
2666 buf += l;
2667 addr += l;
2669 if (!len) {
2670 break;
2673 l = len;
2674 mr = address_space_translate(as, addr, &addr1, &l, true);
2677 return result;
2680 MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
2681 const uint8_t *buf, int len)
2683 hwaddr l;
2684 hwaddr addr1;
2685 MemoryRegion *mr;
2686 MemTxResult result = MEMTX_OK;
2688 if (len > 0) {
2689 rcu_read_lock();
2690 l = len;
2691 mr = address_space_translate(as, addr, &addr1, &l, true);
2692 result = address_space_write_continue(as, addr, attrs, buf, len,
2693 addr1, l, mr);
2694 rcu_read_unlock();
2697 return result;
2700 /* Called within RCU critical section. */
2701 MemTxResult address_space_read_continue(AddressSpace *as, hwaddr addr,
2702 MemTxAttrs attrs, uint8_t *buf,
2703 int len, hwaddr addr1, hwaddr l,
2704 MemoryRegion *mr)
2706 uint8_t *ptr;
2707 uint64_t val;
2708 MemTxResult result = MEMTX_OK;
2709 bool release_lock = false;
2711 for (;;) {
2712 if (!memory_access_is_direct(mr, false)) {
2713 /* I/O case */
2714 release_lock |= prepare_mmio_access(mr);
2715 l = memory_access_size(mr, l, addr1);
2716 switch (l) {
2717 case 8:
2718 /* 64 bit read access */
2719 result |= memory_region_dispatch_read(mr, addr1, &val, 8,
2720 attrs);
2721 stq_p(buf, val);
2722 break;
2723 case 4:
2724 /* 32 bit read access */
2725 result |= memory_region_dispatch_read(mr, addr1, &val, 4,
2726 attrs);
2727 stl_p(buf, val);
2728 break;
2729 case 2:
2730 /* 16 bit read access */
2731 result |= memory_region_dispatch_read(mr, addr1, &val, 2,
2732 attrs);
2733 stw_p(buf, val);
2734 break;
2735 case 1:
2736 /* 8 bit read access */
2737 result |= memory_region_dispatch_read(mr, addr1, &val, 1,
2738 attrs);
2739 stb_p(buf, val);
2740 break;
2741 default:
2742 abort();
2744 } else {
2745 /* RAM case */
2746 ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
2747 memcpy(buf, ptr, l);
2750 if (release_lock) {
2751 qemu_mutex_unlock_iothread();
2752 release_lock = false;
2755 len -= l;
2756 buf += l;
2757 addr += l;
2759 if (!len) {
2760 break;
2763 l = len;
2764 mr = address_space_translate(as, addr, &addr1, &l, false);
2767 return result;
2770 MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
2771 MemTxAttrs attrs, uint8_t *buf, int len)
2773 hwaddr l;
2774 hwaddr addr1;
2775 MemoryRegion *mr;
2776 MemTxResult result = MEMTX_OK;
2778 if (len > 0) {
2779 rcu_read_lock();
2780 l = len;
2781 mr = address_space_translate(as, addr, &addr1, &l, false);
2782 result = address_space_read_continue(as, addr, attrs, buf, len,
2783 addr1, l, mr);
2784 rcu_read_unlock();
2787 return result;
2790 MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
2791 uint8_t *buf, int len, bool is_write)
2793 if (is_write) {
2794 return address_space_write(as, addr, attrs, (uint8_t *)buf, len);
2795 } else {
2796 return address_space_read(as, addr, attrs, (uint8_t *)buf, len);
2800 void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
2801 int len, int is_write)
2803 address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
2804 buf, len, is_write);
2807 enum write_rom_type {
2808 WRITE_DATA,
2809 FLUSH_CACHE,
2812 static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as,
2813 hwaddr addr, const uint8_t *buf, int len, enum write_rom_type type)
2815 hwaddr l;
2816 uint8_t *ptr;
2817 hwaddr addr1;
2818 MemoryRegion *mr;
2820 rcu_read_lock();
2821 while (len > 0) {
2822 l = len;
2823 mr = address_space_translate(as, addr, &addr1, &l, true);
2825 if (!(memory_region_is_ram(mr) ||
2826 memory_region_is_romd(mr))) {
2827 l = memory_access_size(mr, l, addr1);
2828 } else {
2829 /* ROM/RAM case */
2830 ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
2831 switch (type) {
2832 case WRITE_DATA:
2833 memcpy(ptr, buf, l);
2834 invalidate_and_set_dirty(mr, addr1, l);
2835 break;
2836 case FLUSH_CACHE:
2837 flush_icache_range((uintptr_t)ptr, (uintptr_t)ptr + l);
2838 break;
2841 len -= l;
2842 buf += l;
2843 addr += l;
2845 rcu_read_unlock();
2848 /* used for ROM loading : can write in RAM and ROM */
2849 void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr,
2850 const uint8_t *buf, int len)
2852 cpu_physical_memory_write_rom_internal(as, addr, buf, len, WRITE_DATA);
2855 void cpu_flush_icache_range(hwaddr start, int len)
2858 * This function should do the same thing as an icache flush that was
2859 * triggered from within the guest. For TCG we are always cache coherent,
2860 * so there is no need to flush anything. For KVM / Xen we need to flush
2861 * the host's instruction cache at least.
2863 if (tcg_enabled()) {
2864 return;
2867 cpu_physical_memory_write_rom_internal(&address_space_memory,
2868 start, NULL, len, FLUSH_CACHE);
2871 typedef struct {
2872 MemoryRegion *mr;
2873 void *buffer;
2874 hwaddr addr;
2875 hwaddr len;
2876 bool in_use;
2877 } BounceBuffer;
2879 static BounceBuffer bounce;
2881 typedef struct MapClient {
2882 QEMUBH *bh;
2883 QLIST_ENTRY(MapClient) link;
2884 } MapClient;
2886 QemuMutex map_client_list_lock;
2887 static QLIST_HEAD(map_client_list, MapClient) map_client_list
2888 = QLIST_HEAD_INITIALIZER(map_client_list);
2890 static void cpu_unregister_map_client_do(MapClient *client)
2892 QLIST_REMOVE(client, link);
2893 g_free(client);
2896 static void cpu_notify_map_clients_locked(void)
2898 MapClient *client;
2900 while (!QLIST_EMPTY(&map_client_list)) {
2901 client = QLIST_FIRST(&map_client_list);
2902 qemu_bh_schedule(client->bh);
2903 cpu_unregister_map_client_do(client);
2907 void cpu_register_map_client(QEMUBH *bh)
2909 MapClient *client = g_malloc(sizeof(*client));
2911 qemu_mutex_lock(&map_client_list_lock);
2912 client->bh = bh;
2913 QLIST_INSERT_HEAD(&map_client_list, client, link);
2914 if (!atomic_read(&bounce.in_use)) {
2915 cpu_notify_map_clients_locked();
2917 qemu_mutex_unlock(&map_client_list_lock);
2920 void cpu_exec_init_all(void)
2922 qemu_mutex_init(&ram_list.mutex);
2923 /* The data structures we set up here depend on knowing the page size,
2924 * so no more changes can be made after this point.
2925 * In an ideal world, nothing we did before we had finished the
2926 * machine setup would care about the target page size, and we could
2927 * do this much later, rather than requiring board models to state
2928 * up front what their requirements are.
2930 finalize_target_page_bits();
2931 io_mem_init();
2932 memory_map_init();
2933 qemu_mutex_init(&map_client_list_lock);
2936 void cpu_unregister_map_client(QEMUBH *bh)
2938 MapClient *client;
2940 qemu_mutex_lock(&map_client_list_lock);
2941 QLIST_FOREACH(client, &map_client_list, link) {
2942 if (client->bh == bh) {
2943 cpu_unregister_map_client_do(client);
2944 break;
2947 qemu_mutex_unlock(&map_client_list_lock);
2950 static void cpu_notify_map_clients(void)
2952 qemu_mutex_lock(&map_client_list_lock);
2953 cpu_notify_map_clients_locked();
2954 qemu_mutex_unlock(&map_client_list_lock);
2957 bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_write)
2959 MemoryRegion *mr;
2960 hwaddr l, xlat;
2962 rcu_read_lock();
2963 while (len > 0) {
2964 l = len;
2965 mr = address_space_translate(as, addr, &xlat, &l, is_write);
2966 if (!memory_access_is_direct(mr, is_write)) {
2967 l = memory_access_size(mr, l, addr);
2968 if (!memory_region_access_valid(mr, xlat, l, is_write)) {
2969 rcu_read_unlock();
2970 return false;
2974 len -= l;
2975 addr += l;
2977 rcu_read_unlock();
2978 return true;
2981 static hwaddr
2982 address_space_extend_translation(AddressSpace *as, hwaddr addr, hwaddr target_len,
2983 MemoryRegion *mr, hwaddr base, hwaddr len,
2984 bool is_write)
2986 hwaddr done = 0;
2987 hwaddr xlat;
2988 MemoryRegion *this_mr;
2990 for (;;) {
2991 target_len -= len;
2992 addr += len;
2993 done += len;
2994 if (target_len == 0) {
2995 return done;
2998 len = target_len;
2999 this_mr = address_space_translate(as, addr, &xlat, &len, is_write);
3000 if (this_mr != mr || xlat != base + done) {
3001 return done;
3006 /* Map a physical memory region into a host virtual address.
3007 * May map a subset of the requested range, given by and returned in *plen.
3008 * May return NULL if resources needed to perform the mapping are exhausted.
3009 * Use only for reads OR writes - not for read-modify-write operations.
3010 * Use cpu_register_map_client() to know when retrying the map operation is
3011 * likely to succeed.
3013 void *address_space_map(AddressSpace *as,
3014 hwaddr addr,
3015 hwaddr *plen,
3016 bool is_write)
3018 hwaddr len = *plen;
3019 hwaddr l, xlat;
3020 MemoryRegion *mr;
3021 void *ptr;
3023 if (len == 0) {
3024 return NULL;
3027 l = len;
3028 rcu_read_lock();
3029 mr = address_space_translate(as, addr, &xlat, &l, is_write);
3031 if (!memory_access_is_direct(mr, is_write)) {
3032 if (atomic_xchg(&bounce.in_use, true)) {
3033 rcu_read_unlock();
3034 return NULL;
3036 /* Avoid unbounded allocations */
3037 l = MIN(l, TARGET_PAGE_SIZE);
3038 bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, l);
3039 bounce.addr = addr;
3040 bounce.len = l;
3042 memory_region_ref(mr);
3043 bounce.mr = mr;
3044 if (!is_write) {
3045 address_space_read(as, addr, MEMTXATTRS_UNSPECIFIED,
3046 bounce.buffer, l);
3049 rcu_read_unlock();
3050 *plen = l;
3051 return bounce.buffer;
3055 memory_region_ref(mr);
3056 *plen = address_space_extend_translation(as, addr, len, mr, xlat, l, is_write);
3057 ptr = qemu_ram_ptr_length(mr->ram_block, xlat, plen);
3058 rcu_read_unlock();
3060 return ptr;
3063 /* Unmaps a memory region previously mapped by address_space_map().
3064 * Will also mark the memory as dirty if is_write == 1. access_len gives
3065 * the amount of memory that was actually read or written by the caller.
3067 void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
3068 int is_write, hwaddr access_len)
3070 if (buffer != bounce.buffer) {
3071 MemoryRegion *mr;
3072 ram_addr_t addr1;
3074 mr = memory_region_from_host(buffer, &addr1);
3075 assert(mr != NULL);
3076 if (is_write) {
3077 invalidate_and_set_dirty(mr, addr1, access_len);
3079 if (xen_enabled()) {
3080 xen_invalidate_map_cache_entry(buffer);
3082 memory_region_unref(mr);
3083 return;
3085 if (is_write) {
3086 address_space_write(as, bounce.addr, MEMTXATTRS_UNSPECIFIED,
3087 bounce.buffer, access_len);
3089 qemu_vfree(bounce.buffer);
3090 bounce.buffer = NULL;
3091 memory_region_unref(bounce.mr);
3092 atomic_mb_set(&bounce.in_use, false);
3093 cpu_notify_map_clients();
3096 void *cpu_physical_memory_map(hwaddr addr,
3097 hwaddr *plen,
3098 int is_write)
3100 return address_space_map(&address_space_memory, addr, plen, is_write);
3103 void cpu_physical_memory_unmap(void *buffer, hwaddr len,
3104 int is_write, hwaddr access_len)
3106 return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len);
3109 #define ARG1_DECL AddressSpace *as
3110 #define ARG1 as
3111 #define SUFFIX
3112 #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3113 #define IS_DIRECT(mr, is_write) memory_access_is_direct(mr, is_write)
3114 #define MAP_RAM(mr, ofs) qemu_map_ram_ptr((mr)->ram_block, ofs)
3115 #define INVALIDATE(mr, ofs, len) invalidate_and_set_dirty(mr, ofs, len)
3116 #define RCU_READ_LOCK(...) rcu_read_lock()
3117 #define RCU_READ_UNLOCK(...) rcu_read_unlock()
3118 #include "memory_ldst.inc.c"
3120 int64_t address_space_cache_init(MemoryRegionCache *cache,
3121 AddressSpace *as,
3122 hwaddr addr,
3123 hwaddr len,
3124 bool is_write)
3126 hwaddr l, xlat;
3127 MemoryRegion *mr;
3128 void *ptr;
3130 assert(len > 0);
3132 l = len;
3133 mr = address_space_translate(as, addr, &xlat, &l, is_write);
3134 if (!memory_access_is_direct(mr, is_write)) {
3135 return -EINVAL;
3138 l = address_space_extend_translation(as, addr, len, mr, xlat, l, is_write);
3139 ptr = qemu_ram_ptr_length(mr->ram_block, xlat, &l);
3141 cache->xlat = xlat;
3142 cache->is_write = is_write;
3143 cache->mr = mr;
3144 cache->ptr = ptr;
3145 cache->len = l;
3146 memory_region_ref(cache->mr);
3148 return l;
3151 void address_space_cache_invalidate(MemoryRegionCache *cache,
3152 hwaddr addr,
3153 hwaddr access_len)
3155 assert(cache->is_write);
3156 invalidate_and_set_dirty(cache->mr, addr + cache->xlat, access_len);
3159 void address_space_cache_destroy(MemoryRegionCache *cache)
3161 if (!cache->mr) {
3162 return;
3165 if (xen_enabled()) {
3166 xen_invalidate_map_cache_entry(cache->ptr);
3168 memory_region_unref(cache->mr);
3169 cache->mr = NULL;
3172 /* Called from RCU critical section. This function has the same
3173 * semantics as address_space_translate, but it only works on a
3174 * predefined range of a MemoryRegion that was mapped with
3175 * address_space_cache_init.
3177 static inline MemoryRegion *address_space_translate_cached(
3178 MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat,
3179 hwaddr *plen, bool is_write)
3181 assert(addr < cache->len && *plen <= cache->len - addr);
3182 *xlat = addr + cache->xlat;
3183 return cache->mr;
3186 #define ARG1_DECL MemoryRegionCache *cache
3187 #define ARG1 cache
3188 #define SUFFIX _cached
3189 #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
3190 #define IS_DIRECT(mr, is_write) true
3191 #define MAP_RAM(mr, ofs) (cache->ptr + (ofs - cache->xlat))
3192 #define INVALIDATE(mr, ofs, len) ((void)0)
3193 #define RCU_READ_LOCK() ((void)0)
3194 #define RCU_READ_UNLOCK() ((void)0)
3195 #include "memory_ldst.inc.c"
3197 /* virtual memory access for debug (includes writing to ROM) */
3198 int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
3199 uint8_t *buf, int len, int is_write)
3201 int l;
3202 hwaddr phys_addr;
3203 target_ulong page;
3205 while (len > 0) {
3206 int asidx;
3207 MemTxAttrs attrs;
3209 page = addr & TARGET_PAGE_MASK;
3210 phys_addr = cpu_get_phys_page_attrs_debug(cpu, page, &attrs);
3211 asidx = cpu_asidx_from_attrs(cpu, attrs);
3212 /* if no physical page mapped, return an error */
3213 if (phys_addr == -1)
3214 return -1;
3215 l = (page + TARGET_PAGE_SIZE) - addr;
3216 if (l > len)
3217 l = len;
3218 phys_addr += (addr & ~TARGET_PAGE_MASK);
3219 if (is_write) {
3220 cpu_physical_memory_write_rom(cpu->cpu_ases[asidx].as,
3221 phys_addr, buf, l);
3222 } else {
3223 address_space_rw(cpu->cpu_ases[asidx].as, phys_addr,
3224 MEMTXATTRS_UNSPECIFIED,
3225 buf, l, 0);
3227 len -= l;
3228 buf += l;
3229 addr += l;
3231 return 0;
3235 * Allows code that needs to deal with migration bitmaps etc to still be built
3236 * target independent.
3238 size_t qemu_target_page_bits(void)
3240 return TARGET_PAGE_BITS;
3243 #endif
3246 * A helper function for the _utterly broken_ virtio device model to find out if
3247 * it's running on a big endian machine. Don't do this at home kids!
3249 bool target_words_bigendian(void);
3250 bool target_words_bigendian(void)
3252 #if defined(TARGET_WORDS_BIGENDIAN)
3253 return true;
3254 #else
3255 return false;
3256 #endif
3259 #ifndef CONFIG_USER_ONLY
3260 bool cpu_physical_memory_is_io(hwaddr phys_addr)
3262 MemoryRegion*mr;
3263 hwaddr l = 1;
3264 bool res;
3266 rcu_read_lock();
3267 mr = address_space_translate(&address_space_memory,
3268 phys_addr, &phys_addr, &l, false);
3270 res = !(memory_region_is_ram(mr) || memory_region_is_romd(mr));
3271 rcu_read_unlock();
3272 return res;
3275 int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque)
3277 RAMBlock *block;
3278 int ret = 0;
3280 rcu_read_lock();
3281 QLIST_FOREACH_RCU(block, &ram_list.blocks, next) {
3282 ret = func(block->idstr, block->host, block->offset,
3283 block->used_length, opaque);
3284 if (ret) {
3285 break;
3288 rcu_read_unlock();
3289 return ret;
3291 #endif