4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
22 #include "cpu_loop-common.h"
23 #include "qemu/guest-random.h"
25 #define get_user_code_u32(x, gaddr, env) \
26 ({ abi_long __r = get_user_u32((x), (gaddr)); \
27 if (!__r && bswap_code(arm_sctlr_b(env))) { \
33 #define get_user_code_u16(x, gaddr, env) \
34 ({ abi_long __r = get_user_u16((x), (gaddr)); \
35 if (!__r && bswap_code(arm_sctlr_b(env))) { \
41 #define get_user_data_u32(x, gaddr, env) \
42 ({ abi_long __r = get_user_u32((x), (gaddr)); \
43 if (!__r && arm_cpu_bswap_data(env)) { \
49 #define get_user_data_u16(x, gaddr, env) \
50 ({ abi_long __r = get_user_u16((x), (gaddr)); \
51 if (!__r && arm_cpu_bswap_data(env)) { \
57 #define put_user_data_u32(x, gaddr, env) \
58 ({ typeof(x) __x = (x); \
59 if (arm_cpu_bswap_data(env)) { \
62 put_user_u32(__x, (gaddr)); \
65 #define put_user_data_u16(x, gaddr, env) \
66 ({ typeof(x) __x = (x); \
67 if (arm_cpu_bswap_data(env)) { \
70 put_user_u16(__x, (gaddr)); \
73 /* AArch64 main loop */
74 void cpu_loop(CPUARMState
*env
)
76 CPUState
*cs
= CPU(arm_env_get_cpu(env
));
79 target_siginfo_t info
;
83 trapnr
= cpu_exec(cs
);
85 process_queued_cpu_work(cs
);
98 if (ret
== -TARGET_ERESTARTSYS
) {
100 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
105 /* just indicate that signals should be handled asap */
108 info
.si_signo
= TARGET_SIGILL
;
110 info
.si_code
= TARGET_ILL_ILLOPN
;
111 info
._sifields
._sigfault
._addr
= env
->pc
;
112 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
114 case EXCP_PREFETCH_ABORT
:
115 case EXCP_DATA_ABORT
:
116 info
.si_signo
= TARGET_SIGSEGV
;
118 /* XXX: check env->error_code */
119 info
.si_code
= TARGET_SEGV_MAPERR
;
120 info
._sifields
._sigfault
._addr
= env
->exception
.vaddress
;
121 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
125 info
.si_signo
= TARGET_SIGTRAP
;
127 info
.si_code
= TARGET_TRAP_BRKPT
;
128 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
131 env
->xregs
[0] = do_arm_semihosting(env
);
134 /* nothing to do here for user-mode, just resume guest code */
137 cpu_exec_step_atomic(cs
);
140 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
143 process_pending_signals(env
);
144 /* Exception return on AArch64 always clears the exclusive monitor,
145 * so any return to running guest code implies this.
147 env
->exclusive_addr
= -1;
151 void target_cpu_copy_regs(CPUArchState
*env
, struct target_pt_regs
*regs
)
153 ARMCPU
*cpu
= arm_env_get_cpu(env
);
154 CPUState
*cs
= CPU(cpu
);
155 TaskState
*ts
= cs
->opaque
;
156 struct image_info
*info
= ts
->info
;
159 if (!(arm_feature(env
, ARM_FEATURE_AARCH64
))) {
161 "The selected ARM CPU does not support 64 bit mode\n");
165 for (i
= 0; i
< 31; i
++) {
166 env
->xregs
[i
] = regs
->regs
[i
];
169 env
->xregs
[31] = regs
->sp
;
170 #ifdef TARGET_WORDS_BIGENDIAN
171 env
->cp15
.sctlr_el
[1] |= SCTLR_E0E
;
172 for (i
= 1; i
< 4; ++i
) {
173 env
->cp15
.sctlr_el
[i
] |= SCTLR_EE
;
177 if (cpu_isar_feature(aa64_pauth
, cpu
)) {
178 qemu_guest_getrandom_nofail(&env
->keys
, sizeof(env
->keys
));
181 ts
->stack_base
= info
->start_stack
;
182 ts
->heap_base
= info
->brk
;
183 /* This will be filled in on the first SYS_HEAPINFO call. */