include/qom/cpu.h

   1 /*
   2  * QEMU CPU model
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20 #ifndef QEMU_CPU_H
  21 #define QEMU_CPU_H
  22
  23 #include <signal.h>
  24 #include "hw/qdev-core.h"
  25 #include "exec/hwaddr.h"
  26 #include "qemu/queue.h"
  27 #include "qemu/thread.h"
  28 #include "qemu/tls.h"
  29 #include "qemu/typedefs.h"
  30
  31 typedef int (*WriteCoreDumpFunction)(void *buf, size_t size, void *opaque);
  32
  33 /**
  34  * vaddr:
  35  * Type wide enough to contain any #target_ulong virtual address.
  36  */
  37 typedef uint64_t vaddr;
  38 #define VADDR_PRId PRId64
  39 #define VADDR_PRIu PRIu64
  40 #define VADDR_PRIo PRIo64
  41 #define VADDR_PRIx PRIx64
  42 #define VADDR_PRIX PRIX64
  43 #define VADDR_MAX UINT64_MAX
  44
  45 /**
  46  * SECTION:cpu
  47  * @section_id: QEMU-cpu
  48  * @title: CPU Class
  49  * @short_description: Base class for all CPUs
  50  */
  51
  52 #define TYPE_CPU "cpu"
  53
  54 #define CPU(obj) OBJECT_CHECK(CPUState, (obj), TYPE_CPU)
  55 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
  56 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
  57
  58 typedef struct CPUState CPUState;
  59
  60 typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
  61                                     bool is_write, bool is_exec, int opaque,
  62                                     unsigned size);
  63
  64 struct TranslationBlock;
  65
  66 /**
  67  * CPUClass:
  68  * @class_by_name: Callback to map -cpu command line model name to an
  69  * instantiatable CPU type.
  70  * @reset: Callback to reset the #CPUState to its initial state.
  71  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
  72  * @do_interrupt: Callback for interrupt handling.
  73  * @do_unassigned_access: Callback for unassigned access handling.
  74  * @memory_rw_debug: Callback for GDB memory access.
  75  * @dump_state: Callback for dumping state.
  76  * @dump_statistics: Callback for dumping statistics.
  77  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
  78  * @get_paging_enabled: Callback for inquiring whether paging is enabled.
  79  * @get_memory_mapping: Callback for obtaining the memory mappings.
  80  * @set_pc: Callback for setting the Program Counter register.
  81  * @synchronize_from_tb: Callback for synchronizing state from a TCG
  82  * #TranslationBlock.
  83  * @get_phys_page_debug: Callback for obtaining a physical address.
  84  * @gdb_read_register: Callback for letting GDB read a register.
  85  * @gdb_write_register: Callback for letting GDB write a register.
  86  * @vmsd: State description for migration.
  87  * @gdb_num_core_regs: Number of core registers accessible to GDB.
  88  * @gdb_core_xml_file: File name for core registers GDB XML description.
  89  *
  90  * Represents a CPU family or model.
  91  */
  92 typedef struct CPUClass {
  93     /*< private >*/
  94     DeviceClass parent_class;
  95     /*< public >*/
  96
  97     ObjectClass *(*class_by_name)(const char *cpu_model);
  98
  99     void (*reset)(CPUState *cpu);
 100     int reset_dump_flags;
 101     void (*do_interrupt)(CPUState *cpu);
 102     CPUUnassignedAccess do_unassigned_access;
 103     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
 104                            uint8_t *buf, int len, bool is_write);
 105     void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 106                        int flags);
 107     void (*dump_statistics)(CPUState *cpu, FILE *f,
 108                             fprintf_function cpu_fprintf, int flags);
 109     int64_t (*get_arch_id)(CPUState *cpu);
 110     bool (*get_paging_enabled)(const CPUState *cpu);
 111     void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
 112                                Error **errp);
 113     void (*set_pc)(CPUState *cpu, vaddr value);
 114     void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
 115     hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
 116     int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
 117     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
 118
 119     int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
 120                             int cpuid, void *opaque);
 121     int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 122                                 void *opaque);
 123     int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
 124                             int cpuid, void *opaque);
 125     int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 126                                 void *opaque);
 127
 128     const struct VMStateDescription *vmsd;
 129     int gdb_num_core_regs;
 130     const char *gdb_core_xml_file;
 131 } CPUClass;
 132
 133 struct KVMState;
 134 struct kvm_run;
 135
 136 /**
 137  * CPUState:
 138  * @cpu_index: CPU index (informative).
 139  * @nr_cores: Number of cores within this CPU package.
 140  * @nr_threads: Number of threads within this CPU.
 141  * @numa_node: NUMA node this CPU is belonging to.
 142  * @host_tid: Host thread ID.
 143  * @running: #true if CPU is currently running (usermode).
 144  * @created: Indicates whether the CPU thread has been successfully created.
 145  * @interrupt_request: Indicates a pending interrupt request.
 146  * @halted: Nonzero if the CPU is in suspended state.
 147  * @stop: Indicates a pending stop request.
 148  * @stopped: Indicates the CPU has been artificially stopped.
 149  * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
 150  *           CPU and return to its top level loop.
 151  * @singlestep_enabled: Flags for single-stepping.
 152  * @env_ptr: Pointer to subclass-specific CPUArchState field.
 153  * @current_tb: Currently executing TB.
 154  * @gdb_regs: Additional GDB registers.
 155  * @gdb_num_regs: Number of total registers accessible to GDB.
 156  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
 157  * @next_cpu: Next CPU sharing TB cache.
 158  * @kvm_fd: vCPU file descriptor for KVM.
 159  *
 160  * State of one CPU core or thread.
 161  */
 162 struct CPUState {
 163     /*< private >*/
 164     DeviceState parent_obj;
 165     /*< public >*/
 166
 167     int nr_cores;
 168     int nr_threads;
 169     int numa_node;
 170
 171     struct QemuThread *thread;
 172 #ifdef _WIN32
 173     HANDLE hThread;
 174 #endif
 175     int thread_id;
 176     uint32_t host_tid;
 177     bool running;
 178     struct QemuCond *halt_cond;
 179     struct qemu_work_item *queued_work_first, *queued_work_last;
 180     bool thread_kicked;
 181     bool created;
 182     bool stop;
 183     bool stopped;
 184     volatile sig_atomic_t exit_request;
 185     volatile sig_atomic_t tcg_exit_req;
 186     uint32_t interrupt_request;
 187     int singlestep_enabled;
 188
 189     AddressSpace *as;
 190     MemoryListener *tcg_as_listener;
 191
 192     void *env_ptr; /* CPUArchState */
 193     struct TranslationBlock *current_tb;
 194     struct GDBRegisterState *gdb_regs;
 195     int gdb_num_regs;
 196     int gdb_num_g_regs;
 197     QTAILQ_ENTRY(CPUState) node;
 198
 199     int kvm_fd;
 200     bool kvm_vcpu_dirty;
 201     struct KVMState *kvm_state;
 202     struct kvm_run *kvm_run;
 203
 204     /* TODO Move common fields from CPUArchState here. */
 205     int cpu_index; /* used by alpha TCG */
 206     uint32_t halted; /* used by alpha, cris, ppc TCG */
 207 };
 208
 209 QTAILQ_HEAD(CPUTailQ, CPUState);
 210 extern struct CPUTailQ cpus;
 211 #define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
 212 #define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
 213 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
 214     QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
 215 #define first_cpu QTAILQ_FIRST(&cpus)
 216
 217 DECLARE_TLS(CPUState *, current_cpu);
 218 #define current_cpu tls_var(current_cpu)
 219
 220 /**
 221  * cpu_paging_enabled:
 222  * @cpu: The CPU whose state is to be inspected.
 223  *
 224  * Returns: %true if paging is enabled, %false otherwise.
 225  */
 226 bool cpu_paging_enabled(const CPUState *cpu);
 227
 228 /**
 229  * cpu_get_memory_mapping:
 230  * @cpu: The CPU whose memory mappings are to be obtained.
 231  * @list: Where to write the memory mappings to.
 232  * @errp: Pointer for reporting an #Error.
 233  */
 234 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
 235                             Error **errp);
 236
 237 /**
 238  * cpu_write_elf64_note:
 239  * @f: pointer to a function that writes memory to a file
 240  * @cpu: The CPU whose memory is to be dumped
 241  * @cpuid: ID number of the CPU
 242  * @opaque: pointer to the CPUState struct
 243  */
 244 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
 245                          int cpuid, void *opaque);
 246
 247 /**
 248  * cpu_write_elf64_qemunote:
 249  * @f: pointer to a function that writes memory to a file
 250  * @cpu: The CPU whose memory is to be dumped
 251  * @cpuid: ID number of the CPU
 252  * @opaque: pointer to the CPUState struct
 253  */
 254 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 255                              void *opaque);
 256
 257 /**
 258  * cpu_write_elf32_note:
 259  * @f: pointer to a function that writes memory to a file
 260  * @cpu: The CPU whose memory is to be dumped
 261  * @cpuid: ID number of the CPU
 262  * @opaque: pointer to the CPUState struct
 263  */
 264 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
 265                          int cpuid, void *opaque);
 266
 267 /**
 268  * cpu_write_elf32_qemunote:
 269  * @f: pointer to a function that writes memory to a file
 270  * @cpu: The CPU whose memory is to be dumped
 271  * @cpuid: ID number of the CPU
 272  * @opaque: pointer to the CPUState struct
 273  */
 274 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 275                              void *opaque);
 276
 277 /**
 278  * CPUDumpFlags:
 279  * @CPU_DUMP_CODE:
 280  * @CPU_DUMP_FPU: dump FPU register state, not just integer
 281  * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
 282  */
 283 enum CPUDumpFlags {
 284     CPU_DUMP_CODE = 0x00010000,
 285     CPU_DUMP_FPU  = 0x00020000,
 286     CPU_DUMP_CCOP = 0x00040000,
 287 };
 288
 289 /**
 290  * cpu_dump_state:
 291  * @cpu: The CPU whose state is to be dumped.
 292  * @f: File to dump to.
 293  * @cpu_fprintf: Function to dump with.
 294  * @flags: Flags what to dump.
 295  *
 296  * Dumps CPU state.
 297  */
 298 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 299                     int flags);
 300
 301 /**
 302  * cpu_dump_statistics:
 303  * @cpu: The CPU whose state is to be dumped.
 304  * @f: File to dump to.
 305  * @cpu_fprintf: Function to dump with.
 306  * @flags: Flags what to dump.
 307  *
 308  * Dumps CPU statistics.
 309  */
 310 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 311                          int flags);
 312
 313 #ifndef CONFIG_USER_ONLY
 314 /**
 315  * cpu_get_phys_page_debug:
 316  * @cpu: The CPU to obtain the physical page address for.
 317  * @addr: The virtual address.
 318  *
 319  * Obtains the physical page corresponding to a virtual one.
 320  * Use it only for debugging because no protection checks are done.
 321  *
 322  * Returns: Corresponding physical page address or -1 if no page found.
 323  */
 324 static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
 325 {
 326     CPUClass *cc = CPU_GET_CLASS(cpu);
 327
 328     return cc->get_phys_page_debug(cpu, addr);
 329 }
 330 #endif
 331
 332 /**
 333  * cpu_reset:
 334  * @cpu: The CPU whose state is to be reset.
 335  */
 336 void cpu_reset(CPUState *cpu);
 337
 338 /**
 339  * cpu_class_by_name:
 340  * @typename: The CPU base type.
 341  * @cpu_model: The model string without any parameters.
 342  *
 343  * Looks up a CPU #ObjectClass matching name @cpu_model.
 344  *
 345  * Returns: A #CPUClass or %NULL if not matching class is found.
 346  */
 347 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
 348
 349 /**
 350  * qemu_cpu_has_work:
 351  * @cpu: The vCPU to check.
 352  *
 353  * Checks whether the CPU has work to do.
 354  *
 355  * Returns: %true if the CPU has work, %false otherwise.
 356  */
 357 bool qemu_cpu_has_work(CPUState *cpu);
 358
 359 /**
 360  * qemu_cpu_is_self:
 361  * @cpu: The vCPU to check against.
 362  *
 363  * Checks whether the caller is executing on the vCPU thread.
 364  *
 365  * Returns: %true if called from @cpu's thread, %false otherwise.
 366  */
 367 bool qemu_cpu_is_self(CPUState *cpu);
 368
 369 /**
 370  * qemu_cpu_kick:
 371  * @cpu: The vCPU to kick.
 372  *
 373  * Kicks @cpu's thread.
 374  */
 375 void qemu_cpu_kick(CPUState *cpu);
 376
 377 /**
 378  * cpu_is_stopped:
 379  * @cpu: The CPU to check.
 380  *
 381  * Checks whether the CPU is stopped.
 382  *
 383  * Returns: %true if run state is not running or if artificially stopped;
 384  * %false otherwise.
 385  */
 386 bool cpu_is_stopped(CPUState *cpu);
 387
 388 /**
 389  * run_on_cpu:
 390  * @cpu: The vCPU to run on.
 391  * @func: The function to be executed.
 392  * @data: Data to pass to the function.
 393  *
 394  * Schedules the function @func for execution on the vCPU @cpu.
 395  */
 396 void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 397
 398 /**
 399  * async_run_on_cpu:
 400  * @cpu: The vCPU to run on.
 401  * @func: The function to be executed.
 402  * @data: Data to pass to the function.
 403  *
 404  * Schedules the function @func for execution on the vCPU @cpu asynchronously.
 405  */
 406 void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 407
 408 /**
 409  * qemu_get_cpu:
 410  * @index: The CPUState@cpu_index value of the CPU to obtain.
 411  *
 412  * Gets a CPU matching @index.
 413  *
 414  * Returns: The CPU or %NULL if there is no matching CPU.
 415  */
 416 CPUState *qemu_get_cpu(int index);
 417
 418 /**
 419  * cpu_exists:
 420  * @id: Guest-exposed CPU ID to lookup.
 421  *
 422  * Search for CPU with specified ID.
 423  *
 424  * Returns: %true - CPU is found, %false - CPU isn't found.
 425  */
 426 bool cpu_exists(int64_t id);
 427
 428 #ifndef CONFIG_USER_ONLY
 429
 430 typedef void (*CPUInterruptHandler)(CPUState *, int);
 431
 432 extern CPUInterruptHandler cpu_interrupt_handler;
 433
 434 /**
 435  * cpu_interrupt:
 436  * @cpu: The CPU to set an interrupt on.
 437  * @mask: The interupts to set.
 438  *
 439  * Invokes the interrupt handler.
 440  */
 441 static inline void cpu_interrupt(CPUState *cpu, int mask)
 442 {
 443     cpu_interrupt_handler(cpu, mask);
 444 }
 445
 446 #else /* USER_ONLY */
 447
 448 void cpu_interrupt(CPUState *cpu, int mask);
 449
 450 #endif /* USER_ONLY */
 451
 452 #ifndef CONFIG_USER_ONLY
 453
 454 static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
 455                                          bool is_write, bool is_exec,
 456                                          int opaque, unsigned size)
 457 {
 458     CPUClass *cc = CPU_GET_CLASS(cpu);
 459
 460     if (cc->do_unassigned_access) {
 461         cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size);
 462     }
 463 }
 464
 465 #endif
 466
 467 /**
 468  * cpu_reset_interrupt:
 469  * @cpu: The CPU to clear the interrupt on.
 470  * @mask: The interrupt mask to clear.
 471  *
 472  * Resets interrupts on the vCPU @cpu.
 473  */
 474 void cpu_reset_interrupt(CPUState *cpu, int mask);
 475
 476 /**
 477  * cpu_exit:
 478  * @cpu: The CPU to exit.
 479  *
 480  * Requests the CPU @cpu to exit execution.
 481  */
 482 void cpu_exit(CPUState *cpu);
 483
 484 /**
 485  * cpu_resume:
 486  * @cpu: The CPU to resume.
 487  *
 488  * Resumes CPU, i.e. puts CPU into runnable state.
 489  */
 490 void cpu_resume(CPUState *cpu);
 491
 492 /**
 493  * qemu_init_vcpu:
 494  * @cpu: The vCPU to initialize.
 495  *
 496  * Initializes a vCPU.
 497  */
 498 void qemu_init_vcpu(CPUState *cpu);
 499
 500 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
 501 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
 502 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 503
 504 /**
 505  * cpu_single_step:
 506  * @cpu: CPU to the flags for.
 507  * @enabled: Flags to enable.
 508  *
 509  * Enables or disables single-stepping for @cpu.
 510  */
 511 void cpu_single_step(CPUState *cpu, int enabled);
 512
 513 #ifdef CONFIG_SOFTMMU
 514 extern const struct VMStateDescription vmstate_cpu_common;
 515 #else
 516 #define vmstate_cpu_common vmstate_dummy
 517 #endif
 518
 519 #define VMSTATE_CPU() {                                                     \
 520     .name = "parent_obj",                                                   \
 521     .size = sizeof(CPUState),                                               \
 522     .vmsd = &vmstate_cpu_common,                                            \
 523     .flags = VMS_STRUCT,                                                    \
 524     .offset = 0,                                                            \
 525 }
 526
 527 #endif