target/ppc/cpu.c

   1 /*
   2  *  PowerPC CPU routines for qemu.
   3  *
   4  * Copyright (c) 2017 Nikunj A Dadhania, IBM Corporation.
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "cpu.h"
  22 #include "cpu-models.h"
  23 #include "cpu-qom.h"
  24 #include "exec/log.h"
  25 #include "fpu/softfloat-helpers.h"
  26 #include "mmu-hash64.h"
  27 #include "helper_regs.h"
  28 #include "sysemu/tcg.h"
  29
  30 target_ulong cpu_read_xer(const CPUPPCState *env)
  31 {
  32     if (is_isa300(env)) {
  33         return env->xer | (env->so << XER_SO) |
  34             (env->ov << XER_OV) | (env->ca << XER_CA) |
  35             (env->ov32 << XER_OV32) | (env->ca32 << XER_CA32);
  36     }
  37
  38     return env->xer | (env->so << XER_SO) | (env->ov << XER_OV) |
  39         (env->ca << XER_CA);
  40 }
  41
  42 void cpu_write_xer(CPUPPCState *env, target_ulong xer)
  43 {
  44     env->so = (xer >> XER_SO) & 1;
  45     env->ov = (xer >> XER_OV) & 1;
  46     env->ca = (xer >> XER_CA) & 1;
  47     /* write all the flags, while reading back check of isa300 */
  48     env->ov32 = (xer >> XER_OV32) & 1;
  49     env->ca32 = (xer >> XER_CA32) & 1;
  50     env->xer = xer & ~((1ul << XER_SO) |
  51                        (1ul << XER_OV) | (1ul << XER_CA) |
  52                        (1ul << XER_OV32) | (1ul << XER_CA32));
  53 }
  54
  55 void ppc_store_vscr(CPUPPCState *env, uint32_t vscr)
  56 {
  57     env->vscr = vscr & ~(1u << VSCR_SAT);
  58     /* Which bit we set is completely arbitrary, but clear the rest.  */
  59     env->vscr_sat.u64[0] = vscr & (1u << VSCR_SAT);
  60     env->vscr_sat.u64[1] = 0;
  61     set_flush_to_zero((vscr >> VSCR_NJ) & 1, &env->vec_status);
  62 }
  63
  64 uint32_t ppc_get_vscr(CPUPPCState *env)
  65 {
  66     uint32_t sat = (env->vscr_sat.u64[0] | env->vscr_sat.u64[1]) != 0;
  67     return env->vscr | (sat << VSCR_SAT);
  68 }
  69
  70 void ppc_set_cr(CPUPPCState *env, uint64_t cr)
  71 {
  72     for (int i = 7; i >= 0; i--) {
  73         env->crf[i] = cr & 0xf;
  74         cr >>= 4;
  75     }
  76 }
  77
  78 uint64_t ppc_get_cr(const CPUPPCState *env)
  79 {
  80     uint64_t cr = 0;
  81     for (int i = 0; i < 8; i++) {
  82         cr |= (env->crf[i] & 0xf) << (4 * (7 - i));
  83     }
  84     return cr;
  85 }
  86
  87 /* GDBstub can read and write MSR... */
  88 void ppc_store_msr(CPUPPCState *env, target_ulong value)
  89 {
  90     hreg_store_msr(env, value, 0);
  91 }
  92
  93 #if !defined(CONFIG_USER_ONLY)
  94 void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val)
  95 {
  96     PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
  97     CPUPPCState *env = &cpu->env;
  98
  99     env->spr[SPR_LPCR] = val & pcc->lpcr_mask;
 100     /* The gtse bit affects hflags */
 101     hreg_compute_hflags(env);
 102
 103     ppc_maybe_interrupt(env);
 104 }
 105 #endif
 106
 107 static inline void fpscr_set_rounding_mode(CPUPPCState *env)
 108 {
 109     int rnd_type;
 110
 111     /* Set rounding mode */
 112     switch (env->fpscr & FP_RN) {
 113     case 0:
 114         /* Best approximation (round to nearest) */
 115         rnd_type = float_round_nearest_even;
 116         break;
 117     case 1:
 118         /* Smaller magnitude (round toward zero) */
 119         rnd_type = float_round_to_zero;
 120         break;
 121     case 2:
 122         /* Round toward +infinite */
 123         rnd_type = float_round_up;
 124         break;
 125     default:
 126     case 3:
 127         /* Round toward -infinite */
 128         rnd_type = float_round_down;
 129         break;
 130     }
 131     set_float_rounding_mode(rnd_type, &env->fp_status);
 132 }
 133
 134 void ppc_store_fpscr(CPUPPCState *env, target_ulong val)
 135 {
 136     val &= FPSCR_MTFS_MASK;
 137     if (val & FPSCR_IX) {
 138         val |= FP_VX;
 139     }
 140     if ((val >> FPSCR_XX) & (val >> FPSCR_XE) & 0x1f) {
 141         val |= FP_FEX;
 142     }
 143     env->fpscr = val;
 144     env->fp_status.rebias_overflow  = (FP_OE & env->fpscr) ? true : false;
 145     env->fp_status.rebias_underflow = (FP_UE & env->fpscr) ? true : false;
 146     if (tcg_enabled()) {
 147         fpscr_set_rounding_mode(env);
 148     }
 149 }