?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
acpi-build: minor code cleanup
[qemu/ar7.git] / hw / i386 / acpi-build.c
blobec86f1b311b3e0361c580ff16aac42114fa8720d
1 /* Support for generating ACPI tables and passing them to Guests
2 *
3 * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>
4 * Copyright (C) 2006 Fabrice Bellard
5 * Copyright (C) 2013 Red Hat Inc
6 *
7 * Author: Michael S. Tsirkin <mst@redhat.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, see <http://www.gnu.org/licenses/>.
21 */
22
23 #include "acpi-build.h"
24 #include <stddef.h>
25 #include <glib.h>
26 #include "qemu-common.h"
27 #include "qemu/bitmap.h"
28 #include "qemu/osdep.h"
29 #include "qemu/range.h"
30 #include "qemu/error-report.h"
31 #include "hw/pci/pci.h"
32 #include "qom/cpu.h"
33 #include "hw/i386/pc.h"
34 #include "target-i386/cpu.h"
35 #include "hw/timer/hpet.h"
36 #include "hw/i386/acpi-defs.h"
37 #include "hw/acpi/acpi.h"
38 #include "hw/nvram/fw_cfg.h"
39 #include "bios-linker-loader.h"
40 #include "hw/loader.h"
41 #include "hw/isa/isa.h"
42 #include "hw/acpi/memory_hotplug.h"
43
44 /* Supported chipsets: */
45 #include "hw/acpi/piix4.h"
46 #include "hw/acpi/pcihp.h"
47 #include "hw/i386/ich9.h"
48 #include "hw/pci/pci_bus.h"
49 #include "hw/pci-host/q35.h"
50
51 #include "hw/i386/q35-acpi-dsdt.hex"
52 #include "hw/i386/acpi-dsdt.hex"
53
54 #include "qapi/qmp/qint.h"
55 #include "qom/qom-qobject.h"
56
57 /* These are used to size the ACPI tables for -M pc-i440fx-1.7 and
58 * -M pc-i440fx-2.0. Even if the actual amount of AML generated grows
59 * a little bit, there should be plenty of free space since the DSDT
60 * shrunk by ~1.5k between QEMU 2.0 and QEMU 2.1.
61 */
62 #define ACPI_BUILD_LEGACY_CPU_AML_SIZE 97
63 #define ACPI_BUILD_ALIGN_SIZE 0x1000
64
65 typedef struct AcpiCpuInfo {
66 DECLARE_BITMAP(found_cpus, ACPI_CPU_HOTPLUG_ID_LIMIT);
67 } AcpiCpuInfo;
68
69 typedef struct AcpiMcfgInfo {
70 uint64_t mcfg_base;
71 uint32_t mcfg_size;
72 } AcpiMcfgInfo;
73
74 typedef struct AcpiPmInfo {
75 bool s3_disabled;
76 bool s4_disabled;
77 bool pcihp_bridge_en;
78 uint8_t s4_val;
79 uint16_t sci_int;
80 uint8_t acpi_enable_cmd;
81 uint8_t acpi_disable_cmd;
82 uint32_t gpe0_blk;
83 uint32_t gpe0_blk_len;
84 uint32_t io_base;
85 } AcpiPmInfo;
86
87 typedef struct AcpiMiscInfo {
88 bool has_hpet;
89 DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX);
90 const unsigned char *dsdt_code;
91 unsigned dsdt_size;
92 uint16_t pvpanic_port;
93 } AcpiMiscInfo;
94
95 typedef struct AcpiBuildPciBusHotplugState {
96 GArray *device_table;
97 GArray *notify_table;
98 struct AcpiBuildPciBusHotplugState *parent;
99 bool pcihp_bridge_en;
100 } AcpiBuildPciBusHotplugState;
101
102 static void acpi_get_dsdt(AcpiMiscInfo *info)
103 {
104 uint16_t *applesmc_sta;
105 Object *piix = piix4_pm_find();
106 Object *lpc = ich9_lpc_find();
107 assert(!!piix != !!lpc);
108
109 if (piix) {
110 info->dsdt_code = AcpiDsdtAmlCode;
111 info->dsdt_size = sizeof AcpiDsdtAmlCode;
112 applesmc_sta = piix_dsdt_applesmc_sta;
113 }
114 if (lpc) {
115 info->dsdt_code = Q35AcpiDsdtAmlCode;
116 info->dsdt_size = sizeof Q35AcpiDsdtAmlCode;
117 applesmc_sta = q35_dsdt_applesmc_sta;
118 }
119
120 /* Patch in appropriate value for AppleSMC _STA */
121 *(uint8_t *)(info->dsdt_code + *applesmc_sta) =
122 applesmc_find() ? 0x0b : 0x00;
123 }
124
125 static
126 int acpi_add_cpu_info(Object *o, void *opaque)
127 {
128 AcpiCpuInfo *cpu = opaque;
129 uint64_t apic_id;
130
131 if (object_dynamic_cast(o, TYPE_CPU)) {
132 apic_id = object_property_get_int(o, "apic-id", NULL);
133 assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT);
134
135 set_bit(apic_id, cpu->found_cpus);
136 }
137
138 object_child_foreach(o, acpi_add_cpu_info, opaque);
139 return 0;
140 }
141
142 static void acpi_get_cpu_info(AcpiCpuInfo *cpu)
143 {
144 Object *root = object_get_root();
145
146 memset(cpu->found_cpus, 0, sizeof cpu->found_cpus);
147 object_child_foreach(root, acpi_add_cpu_info, cpu);
148 }
149
150 static void acpi_get_pm_info(AcpiPmInfo *pm)
151 {
152 Object *piix = piix4_pm_find();
153 Object *lpc = ich9_lpc_find();
154 Object *obj = NULL;
155 QObject *o;
156
157 if (piix) {
158 obj = piix;
159 }
160 if (lpc) {
161 obj = lpc;
162 }
163 assert(obj);
164
165 /* Fill in optional s3/s4 related properties */
166 o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL);
167 if (o) {
168 pm->s3_disabled = qint_get_int(qobject_to_qint(o));
169 } else {
170 pm->s3_disabled = false;
171 }
172 qobject_decref(o);
173 o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_DISABLED, NULL);
174 if (o) {
175 pm->s4_disabled = qint_get_int(qobject_to_qint(o));
176 } else {
177 pm->s4_disabled = false;
178 }
179 qobject_decref(o);
180 o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_VAL, NULL);
181 if (o) {
182 pm->s4_val = qint_get_int(qobject_to_qint(o));
183 } else {
184 pm->s4_val = false;
185 }
186 qobject_decref(o);
187
188 /* Fill in mandatory properties */
189 pm->sci_int = object_property_get_int(obj, ACPI_PM_PROP_SCI_INT, NULL);
190
191 pm->acpi_enable_cmd = object_property_get_int(obj,
192 ACPI_PM_PROP_ACPI_ENABLE_CMD,
193 NULL);
194 pm->acpi_disable_cmd = object_property_get_int(obj,
195 ACPI_PM_PROP_ACPI_DISABLE_CMD,
196 NULL);
197 pm->io_base = object_property_get_int(obj, ACPI_PM_PROP_PM_IO_BASE,
198 NULL);
199 pm->gpe0_blk = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK,
200 NULL);
201 pm->gpe0_blk_len = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
202 NULL);
203 pm->pcihp_bridge_en =
204 object_property_get_bool(obj, "acpi-pci-hotplug-with-bridge-support",
205 NULL);
206 }
207
208 static void acpi_get_misc_info(AcpiMiscInfo *info)
209 {
210 info->has_hpet = hpet_find();
211 info->pvpanic_port = pvpanic_port();
212 }
213
214 static void acpi_get_pci_info(PcPciInfo *info)
215 {
216 Object *pci_host;
217 bool ambiguous;
218
219 pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous);
220 g_assert(!ambiguous);
221 g_assert(pci_host);
222
223 info->w32.begin = object_property_get_int(pci_host,
224 PCI_HOST_PROP_PCI_HOLE_START,
225 NULL);
226 info->w32.end = object_property_get_int(pci_host,
227 PCI_HOST_PROP_PCI_HOLE_END,
228 NULL);
229 info->w64.begin = object_property_get_int(pci_host,
230 PCI_HOST_PROP_PCI_HOLE64_START,
231 NULL);
232 info->w64.end = object_property_get_int(pci_host,
233 PCI_HOST_PROP_PCI_HOLE64_END,
234 NULL);
235 }
236
237 #define ACPI_BUILD_APPNAME "Bochs"
238 #define ACPI_BUILD_APPNAME6 "BOCHS "
239 #define ACPI_BUILD_APPNAME4 "BXPC"
240
241 #define ACPI_BUILD_DPRINTF(level, fmt, ...) do {} while (0)
242
243 #define ACPI_BUILD_TABLE_FILE "etc/acpi/tables"
244 #define ACPI_BUILD_RSDP_FILE "etc/acpi/rsdp"
245
246 static void
247 build_header(GArray *linker, GArray *table_data,
248 AcpiTableHeader *h, const char *sig, int len, uint8_t rev)
249 {
250 memcpy(&h->signature, sig, 4);
251 h->length = cpu_to_le32(len);
252 h->revision = rev;
253 memcpy(h->oem_id, ACPI_BUILD_APPNAME6, 6);
254 memcpy(h->oem_table_id, ACPI_BUILD_APPNAME4, 4);
255 memcpy(h->oem_table_id + 4, sig, 4);
256 h->oem_revision = cpu_to_le32(1);
257 memcpy(h->asl_compiler_id, ACPI_BUILD_APPNAME4, 4);
258 h->asl_compiler_revision = cpu_to_le32(1);
259 h->checksum = 0;
260 /* Checksum to be filled in by Guest linker */
261 bios_linker_loader_add_checksum(linker, ACPI_BUILD_TABLE_FILE,
262 table_data->data, h, len, &h->checksum);
263 }
264
265 static inline GArray *build_alloc_array(void)
266 {
267 return g_array_new(false, true /* clear */, 1);
268 }
269
270 static inline void build_free_array(GArray *array)
271 {
272 g_array_free(array, true);
273 }
274
275 static inline void build_prepend_byte(GArray *array, uint8_t val)
276 {
277 g_array_prepend_val(array, val);
278 }
279
280 static inline void build_append_byte(GArray *array, uint8_t val)
281 {
282 g_array_append_val(array, val);
283 }
284
285 static inline void build_append_array(GArray *array, GArray *val)
286 {
287 g_array_append_vals(array, val->data, val->len);
288 }
289
290 static void GCC_FMT_ATTR(2, 3)
291 build_append_nameseg(GArray *array, const char *format, ...)
292 {
293 /* It would be nicer to use g_string_vprintf but it's only there in 2.22 */
294 char s[] = "XXXX";
295 int len;
296 va_list args;
297
298 va_start(args, format);
299 len = vsnprintf(s, sizeof s, format, args);
300 va_end(args);
301
302 assert(len == 4);
303 g_array_append_vals(array, s, len);
304 }
305
306 /* 5.4 Definition Block Encoding */
307 enum {
308 PACKAGE_LENGTH_1BYTE_SHIFT = 6, /* Up to 63 - use extra 2 bits. */
309 PACKAGE_LENGTH_2BYTE_SHIFT = 4,
310 PACKAGE_LENGTH_3BYTE_SHIFT = 12,
311 PACKAGE_LENGTH_4BYTE_SHIFT = 20,
312 };
313
314 static void build_prepend_package_length(GArray *package, unsigned min_bytes)
315 {
316 uint8_t byte;
317 unsigned length = package->len;
318 unsigned length_bytes;
319
320 if (length + 1 < (1 << PACKAGE_LENGTH_1BYTE_SHIFT)) {
321 length_bytes = 1;
322 } else if (length + 2 < (1 << PACKAGE_LENGTH_3BYTE_SHIFT)) {
323 length_bytes = 2;
324 } else if (length + 3 < (1 << PACKAGE_LENGTH_4BYTE_SHIFT)) {
325 length_bytes = 3;
326 } else {
327 length_bytes = 4;
328 }
329
330 /* Force length to at least min_bytes.
331 * This wastes memory but that's how bios did it.
332 */
333 length_bytes = MAX(length_bytes, min_bytes);
334
335 /* PkgLength is the length of the inclusive length of the data. */
336 length += length_bytes;
337
338 switch (length_bytes) {
339 case 1:
340 byte = length;
341 build_prepend_byte(package, byte);
342 return;
343 case 4:
344 byte = length >> PACKAGE_LENGTH_4BYTE_SHIFT;
345 build_prepend_byte(package, byte);
346 length &= (1 << PACKAGE_LENGTH_4BYTE_SHIFT) - 1;
347 /* fall through */
348 case 3:
349 byte = length >> PACKAGE_LENGTH_3BYTE_SHIFT;
350 build_prepend_byte(package, byte);
351 length &= (1 << PACKAGE_LENGTH_3BYTE_SHIFT) - 1;
352 /* fall through */
353 case 2:
354 byte = length >> PACKAGE_LENGTH_2BYTE_SHIFT;
355 build_prepend_byte(package, byte);
356 length &= (1 << PACKAGE_LENGTH_2BYTE_SHIFT) - 1;
357 /* fall through */
358 }
359 /*
360 * Most significant two bits of byte zero indicate how many following bytes
361 * are in PkgLength encoding.
362 */
363 byte = ((length_bytes - 1) << PACKAGE_LENGTH_1BYTE_SHIFT) | length;
364 build_prepend_byte(package, byte);
365 }
366
367 static void build_package(GArray *package, uint8_t op, unsigned min_bytes)
368 {
369 build_prepend_package_length(package, min_bytes);
370 build_prepend_byte(package, op);
371 }
372
373 static void build_extop_package(GArray *package, uint8_t op)
374 {
375 build_package(package, op, 1);
376 build_prepend_byte(package, 0x5B); /* ExtOpPrefix */
377 }
378
379 static void build_append_value(GArray *table, uint32_t value, int size)
380 {
381 uint8_t prefix;
382 int i;
383
384 switch (size) {
385 case 1:
386 prefix = 0x0A; /* BytePrefix */
387 break;
388 case 2:
389 prefix = 0x0B; /* WordPrefix */
390 break;
391 case 4:
392 prefix = 0x0C; /* DWordPrefix */
393 break;
394 default:
395 assert(0);
396 return;
397 }
398 build_append_byte(table, prefix);
399 for (i = 0; i < size; ++i) {
400 build_append_byte(table, value & 0xFF);
401 value = value >> 8;
402 }
403 }
404
405 static void build_append_int(GArray *table, uint32_t value)
406 {
407 if (value == 0x00) {
408 build_append_byte(table, 0x00); /* ZeroOp */
409 } else if (value == 0x01) {
410 build_append_byte(table, 0x01); /* OneOp */
411 } else if (value <= 0xFF) {
412 build_append_value(table, value, 1);
413 } else if (value <= 0xFFFF) {
414 build_append_value(table, value, 2);
415 } else {
416 build_append_value(table, value, 4);
417 }
418 }
419
420 static GArray *build_alloc_method(const char *name, uint8_t arg_count)
421 {
422 GArray *method = build_alloc_array();
423
424 build_append_nameseg(method, "%s", name);
425 build_append_byte(method, arg_count); /* MethodFlags: ArgCount */
426
427 return method;
428 }
429
430 static void build_append_and_cleanup_method(GArray *device, GArray *method)
431 {
432 uint8_t op = 0x14; /* MethodOp */
433
434 build_package(method, op, 0);
435
436 build_append_array(device, method);
437 build_free_array(method);
438 }
439
440 static void build_append_notify_target_ifequal(GArray *method,
441 GArray *target_name,
442 uint32_t value, int size)
443 {
444 GArray *notify = build_alloc_array();
445 uint8_t op = 0xA0; /* IfOp */
446
447 build_append_byte(notify, 0x93); /* LEqualOp */
448 build_append_byte(notify, 0x68); /* Arg0Op */
449 build_append_value(notify, value, size);
450 build_append_byte(notify, 0x86); /* NotifyOp */
451 build_append_array(notify, target_name);
452 build_append_byte(notify, 0x69); /* Arg1Op */
453
454 /* Pack it up */
455 build_package(notify, op, 1);
456
457 build_append_array(method, notify);
458
459 build_free_array(notify);
460 }
461
462 /* End here */
463 #define ACPI_PORT_SMI_CMD 0x00b2 /* TODO: this is APM_CNT_IOPORT */
464
465 static inline void *acpi_data_push(GArray *table_data, unsigned size)
466 {
467 unsigned off = table_data->len;
468 g_array_set_size(table_data, off + size);
469 return table_data->data + off;
470 }
471
472 static unsigned acpi_data_len(GArray *table)
473 {
474 #if GLIB_CHECK_VERSION(2, 22, 0)
475 assert(g_array_get_element_size(table) == 1);
476 #endif
477 return table->len;
478 }
479
480 static void acpi_align_size(GArray *blob, unsigned align)
481 {
482 /* Align size to multiple of given size. This reduces the chance
483 * we need to change size in the future (breaking cross version migration).
484 */
485 g_array_set_size(blob, ROUND_UP(acpi_data_len(blob), align));
486 }
487
488 /* Set a value within table in a safe manner */
489 #define ACPI_BUILD_SET_LE(table, size, off, bits, val) \
490 do { \
491 uint64_t ACPI_BUILD_SET_LE_val = cpu_to_le64(val); \
492 memcpy(acpi_data_get_ptr(table, size, off, \
493 (bits) / BITS_PER_BYTE), \
494 &ACPI_BUILD_SET_LE_val, \
495 (bits) / BITS_PER_BYTE); \
496 } while (0)
497
498 static inline void *acpi_data_get_ptr(uint8_t *table_data, unsigned table_size,
499 unsigned off, unsigned size)
500 {
501 assert(off + size > off);
502 assert(off + size <= table_size);
503 return table_data + off;
504 }
505
506 static inline void acpi_add_table(GArray *table_offsets, GArray *table_data)
507 {
508 uint32_t offset = cpu_to_le32(table_data->len);
509 g_array_append_val(table_offsets, offset);
510 }
511
512 /* FACS */
513 static void
514 build_facs(GArray *table_data, GArray *linker, PcGuestInfo *guest_info)
515 {
516 AcpiFacsDescriptorRev1 *facs = acpi_data_push(table_data, sizeof *facs);
517 memcpy(&facs->signature, "FACS", 4);
518 facs->length = cpu_to_le32(sizeof(*facs));
519 }
520
521 /* Load chipset information in FADT */
522 static void fadt_setup(AcpiFadtDescriptorRev1 *fadt, AcpiPmInfo *pm)
523 {
524 fadt->model = 1;
525 fadt->reserved1 = 0;
526 fadt->sci_int = cpu_to_le16(pm->sci_int);
527 fadt->smi_cmd = cpu_to_le32(ACPI_PORT_SMI_CMD);
528 fadt->acpi_enable = pm->acpi_enable_cmd;
529 fadt->acpi_disable = pm->acpi_disable_cmd;
530 /* EVT, CNT, TMR offset matches hw/acpi/core.c */
531 fadt->pm1a_evt_blk = cpu_to_le32(pm->io_base);
532 fadt->pm1a_cnt_blk = cpu_to_le32(pm->io_base + 0x04);
533 fadt->pm_tmr_blk = cpu_to_le32(pm->io_base + 0x08);
534 fadt->gpe0_blk = cpu_to_le32(pm->gpe0_blk);
535 /* EVT, CNT, TMR length matches hw/acpi/core.c */
536 fadt->pm1_evt_len = 4;
537 fadt->pm1_cnt_len = 2;
538 fadt->pm_tmr_len = 4;
539 fadt->gpe0_blk_len = pm->gpe0_blk_len;
540 fadt->plvl2_lat = cpu_to_le16(0xfff); /* C2 state not supported */
541 fadt->plvl3_lat = cpu_to_le16(0xfff); /* C3 state not supported */
542 fadt->flags = cpu_to_le32((1 << ACPI_FADT_F_WBINVD) |
543 (1 << ACPI_FADT_F_PROC_C1) |
544 (1 << ACPI_FADT_F_SLP_BUTTON) |
545 (1 << ACPI_FADT_F_RTC_S4));
546 fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_USE_PLATFORM_CLOCK);
547 }
548
549
550 /* FADT */
551 static void
552 build_fadt(GArray *table_data, GArray *linker, AcpiPmInfo *pm,
553 unsigned facs, unsigned dsdt)
554 {
555 AcpiFadtDescriptorRev1 *fadt = acpi_data_push(table_data, sizeof(*fadt));
556
557 fadt->firmware_ctrl = cpu_to_le32(facs);
558 /* FACS address to be filled by Guest linker */
559 bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE,
560 ACPI_BUILD_TABLE_FILE,
561 table_data, &fadt->firmware_ctrl,
562 sizeof fadt->firmware_ctrl);
563
564 fadt->dsdt = cpu_to_le32(dsdt);
565 /* DSDT address to be filled by Guest linker */
566 bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE,
567 ACPI_BUILD_TABLE_FILE,
568 table_data, &fadt->dsdt,
569 sizeof fadt->dsdt);
570
571 fadt_setup(fadt, pm);
572
573 build_header(linker, table_data,
574 (void *)fadt, "FACP", sizeof(*fadt), 1);
575 }
576
577 static void
578 build_madt(GArray *table_data, GArray *linker, AcpiCpuInfo *cpu,
579 PcGuestInfo *guest_info)
580 {
581 int madt_start = table_data->len;
582
583 AcpiMultipleApicTable *madt;
584 AcpiMadtIoApic *io_apic;
585 AcpiMadtIntsrcovr *intsrcovr;
586 AcpiMadtLocalNmi *local_nmi;
587 int i;
588
589 madt = acpi_data_push(table_data, sizeof *madt);
590 madt->local_apic_address = cpu_to_le32(APIC_DEFAULT_ADDRESS);
591 madt->flags = cpu_to_le32(1);
592
593 for (i = 0; i < guest_info->apic_id_limit; i++) {
594 AcpiMadtProcessorApic *apic = acpi_data_push(table_data, sizeof *apic);
595 apic->type = ACPI_APIC_PROCESSOR;
596 apic->length = sizeof(*apic);
597 apic->processor_id = i;
598 apic->local_apic_id = i;
599 if (test_bit(i, cpu->found_cpus)) {
600 apic->flags = cpu_to_le32(1);
601 } else {
602 apic->flags = cpu_to_le32(0);
603 }
604 }
605 io_apic = acpi_data_push(table_data, sizeof *io_apic);
606 io_apic->type = ACPI_APIC_IO;
607 io_apic->length = sizeof(*io_apic);
608 #define ACPI_BUILD_IOAPIC_ID 0x0
609 io_apic->io_apic_id = ACPI_BUILD_IOAPIC_ID;
610 io_apic->address = cpu_to_le32(IO_APIC_DEFAULT_ADDRESS);
611 io_apic->interrupt = cpu_to_le32(0);
612
613 if (guest_info->apic_xrupt_override) {
614 intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr);
615 intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE;
616 intsrcovr->length = sizeof(*intsrcovr);
617 intsrcovr->source = 0;
618 intsrcovr->gsi = cpu_to_le32(2);
619 intsrcovr->flags = cpu_to_le16(0); /* conforms to bus specifications */
620 }
621 for (i = 1; i < 16; i++) {
622 #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11))
623 if (!(ACPI_BUILD_PCI_IRQS & (1 << i))) {
624 /* No need for a INT source override structure. */
625 continue;
626 }
627 intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr);
628 intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE;
629 intsrcovr->length = sizeof(*intsrcovr);
630 intsrcovr->source = i;
631 intsrcovr->gsi = cpu_to_le32(i);
632 intsrcovr->flags = cpu_to_le16(0xd); /* active high, level triggered */
633 }
634
635 local_nmi = acpi_data_push(table_data, sizeof *local_nmi);
636 local_nmi->type = ACPI_APIC_LOCAL_NMI;
637 local_nmi->length = sizeof(*local_nmi);
638 local_nmi->processor_id = 0xff; /* all processors */
639 local_nmi->flags = cpu_to_le16(0);
640 local_nmi->lint = 1; /* ACPI_LINT1 */
641
642 build_header(linker, table_data,
643 (void *)(table_data->data + madt_start), "APIC",
644 table_data->len - madt_start, 1);
645 }
646
647 /* Encode a hex value */
648 static inline char acpi_get_hex(uint32_t val)
649 {
650 val &= 0x0f;
651 return (val <= 9) ? ('0' + val) : ('A' + val - 10);
652 }
653
654 #include "hw/i386/ssdt-proc.hex"
655
656 /* 0x5B 0x83 ProcessorOp PkgLength NameString ProcID */
657 #define ACPI_PROC_OFFSET_CPUHEX (*ssdt_proc_name - *ssdt_proc_start + 2)
658 #define ACPI_PROC_OFFSET_CPUID1 (*ssdt_proc_name - *ssdt_proc_start + 4)
659 #define ACPI_PROC_OFFSET_CPUID2 (*ssdt_proc_id - *ssdt_proc_start)
660 #define ACPI_PROC_SIZEOF (*ssdt_proc_end - *ssdt_proc_start)
661 #define ACPI_PROC_AML (ssdp_proc_aml + *ssdt_proc_start)
662
663 /* 0x5B 0x82 DeviceOp PkgLength NameString */
664 #define ACPI_PCIHP_OFFSET_HEX (*ssdt_pcihp_name - *ssdt_pcihp_start + 1)
665 #define ACPI_PCIHP_OFFSET_ID (*ssdt_pcihp_id - *ssdt_pcihp_start)
666 #define ACPI_PCIHP_OFFSET_ADR (*ssdt_pcihp_adr - *ssdt_pcihp_start)
667 #define ACPI_PCIHP_OFFSET_EJ0 (*ssdt_pcihp_ej0 - *ssdt_pcihp_start)
668 #define ACPI_PCIHP_SIZEOF (*ssdt_pcihp_end - *ssdt_pcihp_start)
669 #define ACPI_PCIHP_AML (ssdp_pcihp_aml + *ssdt_pcihp_start)
670
671 #define ACPI_PCINOHP_OFFSET_HEX (*ssdt_pcinohp_name - *ssdt_pcinohp_start + 1)
672 #define ACPI_PCINOHP_OFFSET_ADR (*ssdt_pcinohp_adr - *ssdt_pcinohp_start)
673 #define ACPI_PCINOHP_SIZEOF (*ssdt_pcinohp_end - *ssdt_pcinohp_start)
674 #define ACPI_PCINOHP_AML (ssdp_pcihp_aml + *ssdt_pcinohp_start)
675
676 #define ACPI_PCIVGA_OFFSET_HEX (*ssdt_pcivga_name - *ssdt_pcivga_start + 1)
677 #define ACPI_PCIVGA_OFFSET_ADR (*ssdt_pcivga_adr - *ssdt_pcivga_start)
678 #define ACPI_PCIVGA_SIZEOF (*ssdt_pcivga_end - *ssdt_pcivga_start)
679 #define ACPI_PCIVGA_AML (ssdp_pcihp_aml + *ssdt_pcivga_start)
680
681 #define ACPI_PCIQXL_OFFSET_HEX (*ssdt_pciqxl_name - *ssdt_pciqxl_start + 1)
682 #define ACPI_PCIQXL_OFFSET_ADR (*ssdt_pciqxl_adr - *ssdt_pciqxl_start)
683 #define ACPI_PCIQXL_SIZEOF (*ssdt_pciqxl_end - *ssdt_pciqxl_start)
684 #define ACPI_PCIQXL_AML (ssdp_pcihp_aml + *ssdt_pciqxl_start)
685
686 #include "hw/i386/ssdt-mem.hex"
687
688 /* 0x5B 0x82 DeviceOp PkgLength NameString DimmID */
689 #define ACPI_MEM_OFFSET_HEX (*ssdt_mem_name - *ssdt_mem_start + 2)
690 #define ACPI_MEM_OFFSET_ID (*ssdt_mem_id - *ssdt_mem_start + 7)
691 #define ACPI_MEM_SIZEOF (*ssdt_mem_end - *ssdt_mem_start)
692 #define ACPI_MEM_AML (ssdm_mem_aml + *ssdt_mem_start)
693
694 #define ACPI_SSDT_SIGNATURE 0x54445353 /* SSDT */
695 #define ACPI_SSDT_HEADER_LENGTH 36
696
697 #include "hw/i386/ssdt-misc.hex"
698 #include "hw/i386/ssdt-pcihp.hex"
699
700 static void
701 build_append_notify_method(GArray *device, const char *name,
702 const char *format, int count)
703 {
704 int i;
705 GArray *method = build_alloc_method(name, 2);
706
707 for (i = 0; i < count; i++) {
708 GArray *target = build_alloc_array();
709 build_append_nameseg(target, format, i);
710 assert(i < 256); /* Fits in 1 byte */
711 build_append_notify_target_ifequal(method, target, i, 1);
712 build_free_array(target);
713 }
714
715 build_append_and_cleanup_method(device, method);
716 }
717
718 static void patch_pcihp(int slot, uint8_t *ssdt_ptr)
719 {
720 unsigned devfn = PCI_DEVFN(slot, 0);
721
722 ssdt_ptr[ACPI_PCIHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
723 ssdt_ptr[ACPI_PCIHP_OFFSET_HEX + 1] = acpi_get_hex(devfn);
724 ssdt_ptr[ACPI_PCIHP_OFFSET_ID] = slot;
725 ssdt_ptr[ACPI_PCIHP_OFFSET_ADR + 2] = slot;
726 }
727
728 static void patch_pcinohp(int slot, uint8_t *ssdt_ptr)
729 {
730 unsigned devfn = PCI_DEVFN(slot, 0);
731
732 ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
733 ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX + 1] = acpi_get_hex(devfn);
734 ssdt_ptr[ACPI_PCINOHP_OFFSET_ADR + 2] = slot;
735 }
736
737 static void patch_pcivga(int slot, uint8_t *ssdt_ptr)
738 {
739 unsigned devfn = PCI_DEVFN(slot, 0);
740
741 ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
742 ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX + 1] = acpi_get_hex(devfn);
743 ssdt_ptr[ACPI_PCIVGA_OFFSET_ADR + 2] = slot;
744 }
745
746 static void patch_pciqxl(int slot, uint8_t *ssdt_ptr)
747 {
748 unsigned devfn = PCI_DEVFN(slot, 0);
749
750 ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
751 ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX + 1] = acpi_get_hex(devfn);
752 ssdt_ptr[ACPI_PCIQXL_OFFSET_ADR + 2] = slot;
753 }
754
755 /* Assign BSEL property to all buses. In the future, this can be changed
756 * to only assign to buses that support hotplug.
757 */
758 static void *acpi_set_bsel(PCIBus *bus, void *opaque)
759 {
760 unsigned *bsel_alloc = opaque;
761 unsigned *bus_bsel;
762
763 if (bus->qbus.allow_hotplug) {
764 bus_bsel = g_malloc(sizeof *bus_bsel);
765
766 *bus_bsel = (*bsel_alloc)++;
767 object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
768 bus_bsel, NULL);
769 }
770
771 return bsel_alloc;
772 }
773
774 static void acpi_set_pci_info(void)
775 {
776 PCIBus *bus = find_i440fx(); /* TODO: Q35 support */
777 unsigned bsel_alloc = 0;
778
779 if (bus) {
780 /* Scan all PCI buses. Set property to enable acpi based hotplug. */
781 pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &bsel_alloc);
782 }
783 }
784
785 static void build_pci_bus_state_init(AcpiBuildPciBusHotplugState *state,
786 AcpiBuildPciBusHotplugState *parent,
787 bool pcihp_bridge_en)
788 {
789 state->parent = parent;
790 state->device_table = build_alloc_array();
791 state->notify_table = build_alloc_array();
792 state->pcihp_bridge_en = pcihp_bridge_en;
793 }
794
795 static void build_pci_bus_state_cleanup(AcpiBuildPciBusHotplugState *state)
796 {
797 build_free_array(state->device_table);
798 build_free_array(state->notify_table);
799 }
800
801 static void *build_pci_bus_begin(PCIBus *bus, void *parent_state)
802 {
803 AcpiBuildPciBusHotplugState *parent = parent_state;
804 AcpiBuildPciBusHotplugState *child = g_malloc(sizeof *child);
805
806 build_pci_bus_state_init(child, parent, parent->pcihp_bridge_en);
807
808 return child;
809 }
810
811 static void build_pci_bus_end(PCIBus *bus, void *bus_state)
812 {
813 AcpiBuildPciBusHotplugState *child = bus_state;
814 AcpiBuildPciBusHotplugState *parent = child->parent;
815 GArray *bus_table = build_alloc_array();
816 DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX);
817 DECLARE_BITMAP(slot_device_present, PCI_SLOT_MAX);
818 DECLARE_BITMAP(slot_device_system, PCI_SLOT_MAX);
819 DECLARE_BITMAP(slot_device_vga, PCI_SLOT_MAX);
820 DECLARE_BITMAP(slot_device_qxl, PCI_SLOT_MAX);
821 uint8_t op;
822 int i;
823 QObject *bsel;
824 GArray *method;
825 bool bus_hotplug_support = false;
826
827 /*
828 * Skip bridge subtree creation if bridge hotplug is disabled
829 * to make acpi tables compatible with legacy machine types.
830 */
831 if (!child->pcihp_bridge_en && bus->parent_dev) {
832 return;
833 }
834
835 if (bus->parent_dev) {
836 op = 0x82; /* DeviceOp */
837 build_append_nameseg(bus_table, "S%.02X_",
838 bus->parent_dev->devfn);
839 build_append_byte(bus_table, 0x08); /* NameOp */
840 build_append_nameseg(bus_table, "_SUN");
841 build_append_value(bus_table, PCI_SLOT(bus->parent_dev->devfn), 1);
842 build_append_byte(bus_table, 0x08); /* NameOp */
843 build_append_nameseg(bus_table, "_ADR");
844 build_append_value(bus_table, (PCI_SLOT(bus->parent_dev->devfn) << 16) |
845 PCI_FUNC(bus->parent_dev->devfn), 4);
846 } else {
847 op = 0x10; /* ScopeOp */;
848 build_append_nameseg(bus_table, "PCI0");
849 }
850
851 bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL);
852 if (bsel) {
853 build_append_byte(bus_table, 0x08); /* NameOp */
854 build_append_nameseg(bus_table, "BSEL");
855 build_append_int(bus_table, qint_get_int(qobject_to_qint(bsel)));
856 memset(slot_hotplug_enable, 0xff, sizeof slot_hotplug_enable);
857 } else {
858 /* No bsel - no slots are hot-pluggable */
859 memset(slot_hotplug_enable, 0x00, sizeof slot_hotplug_enable);
860 }
861
862 memset(slot_device_present, 0x00, sizeof slot_device_present);
863 memset(slot_device_system, 0x00, sizeof slot_device_present);
864 memset(slot_device_vga, 0x00, sizeof slot_device_vga);
865 memset(slot_device_qxl, 0x00, sizeof slot_device_qxl);
866
867 for (i = 0; i < ARRAY_SIZE(bus->devices); i += PCI_FUNC_MAX) {
868 DeviceClass *dc;
869 PCIDeviceClass *pc;
870 PCIDevice *pdev = bus->devices[i];
871 int slot = PCI_SLOT(i);
872 bool bridge_in_acpi;
873
874 if (!pdev) {
875 continue;
876 }
877
878 set_bit(slot, slot_device_present);
879 pc = PCI_DEVICE_GET_CLASS(pdev);
880 dc = DEVICE_GET_CLASS(pdev);
881
882 /* When hotplug for bridges is enabled, bridges are
883 * described in ACPI separately (see build_pci_bus_end).
884 * In this case they aren't themselves hot-pluggable.
885 */
886 bridge_in_acpi = pc->is_bridge && child->pcihp_bridge_en;
887
888 if (pc->class_id == PCI_CLASS_BRIDGE_ISA || bridge_in_acpi) {
889 set_bit(slot, slot_device_system);
890 }
891
892 if (pc->class_id == PCI_CLASS_DISPLAY_VGA) {
893 set_bit(slot, slot_device_vga);
894
895 if (object_dynamic_cast(OBJECT(pdev), "qxl-vga")) {
896 set_bit(slot, slot_device_qxl);
897 }
898 }
899
900 if (!dc->hotpluggable || bridge_in_acpi) {
901 clear_bit(slot, slot_hotplug_enable);
902 }
903 }
904
905 /* Append Device object for each slot */
906 for (i = 0; i < PCI_SLOT_MAX; i++) {
907 bool can_eject = test_bit(i, slot_hotplug_enable);
908 bool present = test_bit(i, slot_device_present);
909 bool vga = test_bit(i, slot_device_vga);
910 bool qxl = test_bit(i, slot_device_qxl);
911 bool system = test_bit(i, slot_device_system);
912 if (can_eject) {
913 void *pcihp = acpi_data_push(bus_table,
914 ACPI_PCIHP_SIZEOF);
915 memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF);
916 patch_pcihp(i, pcihp);
917 bus_hotplug_support = true;
918 } else if (qxl) {
919 void *pcihp = acpi_data_push(bus_table,
920 ACPI_PCIQXL_SIZEOF);
921 memcpy(pcihp, ACPI_PCIQXL_AML, ACPI_PCIQXL_SIZEOF);
922 patch_pciqxl(i, pcihp);
923 } else if (vga) {
924 void *pcihp = acpi_data_push(bus_table,
925 ACPI_PCIVGA_SIZEOF);
926 memcpy(pcihp, ACPI_PCIVGA_AML, ACPI_PCIVGA_SIZEOF);
927 patch_pcivga(i, pcihp);
928 } else if (system) {
929 /* Nothing to do: system devices are in DSDT or in SSDT above. */
930 } else if (present) {
931 void *pcihp = acpi_data_push(bus_table,
932 ACPI_PCINOHP_SIZEOF);
933 memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF);
934 patch_pcinohp(i, pcihp);
935 }
936 }
937
938 if (bsel) {
939 method = build_alloc_method("DVNT", 2);
940
941 for (i = 0; i < PCI_SLOT_MAX; i++) {
942 GArray *notify;
943 uint8_t op;
944
945 if (!test_bit(i, slot_hotplug_enable)) {
946 continue;
947 }
948
949 notify = build_alloc_array();
950 op = 0xA0; /* IfOp */
951
952 build_append_byte(notify, 0x7B); /* AndOp */
953 build_append_byte(notify, 0x68); /* Arg0Op */
954 build_append_int(notify, 0x1U << i);
955 build_append_byte(notify, 0x00); /* NullName */
956 build_append_byte(notify, 0x86); /* NotifyOp */
957 build_append_nameseg(notify, "S%.02X_", PCI_DEVFN(i, 0));
958 build_append_byte(notify, 0x69); /* Arg1Op */
959
960 /* Pack it up */
961 build_package(notify, op, 0);
962
963 build_append_array(method, notify);
964
965 build_free_array(notify);
966 }
967
968 build_append_and_cleanup_method(bus_table, method);
969 }
970
971 /* Append PCNT method to notify about events on local and child buses.
972 * Add unconditionally for root since DSDT expects it.
973 */
974 if (bus_hotplug_support || child->notify_table->len || !bus->parent_dev) {
975 method = build_alloc_method("PCNT", 0);
976
977 /* If bus supports hotplug select it and notify about local events */
978 if (bsel) {
979 build_append_byte(method, 0x70); /* StoreOp */
980 build_append_int(method, qint_get_int(qobject_to_qint(bsel)));
981 build_append_nameseg(method, "BNUM");
982 build_append_nameseg(method, "DVNT");
983 build_append_nameseg(method, "PCIU");
984 build_append_int(method, 1); /* Device Check */
985 build_append_nameseg(method, "DVNT");
986 build_append_nameseg(method, "PCID");
987 build_append_int(method, 3); /* Eject Request */
988 }
989
990 /* Notify about child bus events in any case */
991 build_append_array(method, child->notify_table);
992
993 build_append_and_cleanup_method(bus_table, method);
994
995 /* Append description of child buses */
996 build_append_array(bus_table, child->device_table);
997
998 /* Pack it up */
999 if (bus->parent_dev) {
1000 build_extop_package(bus_table, op);
1001 } else {
1002 build_package(bus_table, op, 0);
1003 }
1004
1005 /* Append our bus description to parent table */
1006 build_append_array(parent->device_table, bus_table);
1007
1008 /* Also tell parent how to notify us, invoking PCNT method.
1009 * At the moment this is not needed for root as we have a single root.
1010 */
1011 if (bus->parent_dev) {
1012 build_append_byte(parent->notify_table, '^'); /* ParentPrefixChar */
1013 build_append_byte(parent->notify_table, 0x2E); /* DualNamePrefix */
1014 build_append_nameseg(parent->notify_table, "S%.02X_",
1015 bus->parent_dev->devfn);
1016 build_append_nameseg(parent->notify_table, "PCNT");
1017 }
1018 }
1019
1020 qobject_decref(bsel);
1021 build_free_array(bus_table);
1022 build_pci_bus_state_cleanup(child);
1023 g_free(child);
1024 }
1025
1026 static void patch_pci_windows(PcPciInfo *pci, uint8_t *start, unsigned size)
1027 {
1028 ACPI_BUILD_SET_LE(start, size, acpi_pci32_start[0], 32, pci->w32.begin);
1029
1030 ACPI_BUILD_SET_LE(start, size, acpi_pci32_end[0], 32, pci->w32.end - 1);
1031
1032 if (pci->w64.end || pci->w64.begin) {
1033 ACPI_BUILD_SET_LE(start, size, acpi_pci64_valid[0], 8, 1);
1034 ACPI_BUILD_SET_LE(start, size, acpi_pci64_start[0], 64, pci->w64.begin);
1035 ACPI_BUILD_SET_LE(start, size, acpi_pci64_end[0], 64, pci->w64.end - 1);
1036 ACPI_BUILD_SET_LE(start, size, acpi_pci64_length[0], 64, pci->w64.end - pci->w64.begin);
1037 } else {
1038 ACPI_BUILD_SET_LE(start, size, acpi_pci64_valid[0], 8, 0);
1039 }
1040 }
1041
1042 static void
1043 build_ssdt(GArray *table_data, GArray *linker,
1044 AcpiCpuInfo *cpu, AcpiPmInfo *pm, AcpiMiscInfo *misc,
1045 PcPciInfo *pci, PcGuestInfo *guest_info)
1046 {
1047 MachineState *machine = MACHINE(qdev_get_machine());
1048 uint32_t nr_mem = machine->ram_slots;
1049 unsigned acpi_cpus = guest_info->apic_id_limit;
1050 int ssdt_start = table_data->len;
1051 uint8_t *ssdt_ptr;
1052 int i;
1053
1054 /* The current AML generator can cover the APIC ID range [0..255],
1055 * inclusive, for VCPU hotplug. */
1056 QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256);
1057 g_assert(acpi_cpus <= ACPI_CPU_HOTPLUG_ID_LIMIT);
1058
1059 /* Copy header and patch values in the S3_ / S4_ / S5_ packages */
1060 ssdt_ptr = acpi_data_push(table_data, sizeof(ssdp_misc_aml));
1061 memcpy(ssdt_ptr, ssdp_misc_aml, sizeof(ssdp_misc_aml));
1062 if (pm->s3_disabled) {
1063 ssdt_ptr[acpi_s3_name[0]] = 'X';
1064 }
1065 if (pm->s4_disabled) {
1066 ssdt_ptr[acpi_s4_name[0]] = 'X';
1067 } else {
1068 ssdt_ptr[acpi_s4_pkg[0] + 1] = ssdt_ptr[acpi_s4_pkg[0] + 3] =
1069 pm->s4_val;
1070 }
1071
1072 patch_pci_windows(pci, ssdt_ptr, sizeof(ssdp_misc_aml));
1073
1074 ACPI_BUILD_SET_LE(ssdt_ptr, sizeof(ssdp_misc_aml),
1075 ssdt_isa_pest[0], 16, misc->pvpanic_port);
1076
1077 ACPI_BUILD_SET_LE(ssdt_ptr, sizeof(ssdp_misc_aml),
1078 ssdt_mctrl_nr_slots[0], 32, nr_mem);
1079
1080 {
1081 GArray *sb_scope = build_alloc_array();
1082 uint8_t op = 0x10; /* ScopeOp */
1083
1084 build_append_nameseg(sb_scope, "_SB_");
1085
1086 /* build Processor object for each processor */
1087 for (i = 0; i < acpi_cpus; i++) {
1088 uint8_t *proc = acpi_data_push(sb_scope, ACPI_PROC_SIZEOF);
1089 memcpy(proc, ACPI_PROC_AML, ACPI_PROC_SIZEOF);
1090 proc[ACPI_PROC_OFFSET_CPUHEX] = acpi_get_hex(i >> 4);
1091 proc[ACPI_PROC_OFFSET_CPUHEX+1] = acpi_get_hex(i);
1092 proc[ACPI_PROC_OFFSET_CPUID1] = i;
1093 proc[ACPI_PROC_OFFSET_CPUID2] = i;
1094 }
1095
1096 /* build this code:
1097 * Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}
1098 */
1099 /* Arg0 = Processor ID = APIC ID */
1100 build_append_notify_method(sb_scope, "NTFY", "CP%0.02X", acpi_cpus);
1101
1102 /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })" */
1103 build_append_byte(sb_scope, 0x08); /* NameOp */
1104 build_append_nameseg(sb_scope, "CPON");
1105
1106 {
1107 GArray *package = build_alloc_array();
1108 uint8_t op;
1109
1110 /*
1111 * Note: The ability to create variable-sized packages was first introduced in ACPI 2.0. ACPI 1.0 only
1112 * allowed fixed-size packages with up to 255 elements.
1113 * Windows guests up to win2k8 fail when VarPackageOp is used.
1114 */
1115 if (acpi_cpus <= 255) {
1116 op = 0x12; /* PackageOp */
1117 build_append_byte(package, acpi_cpus); /* NumElements */
1118 } else {
1119 op = 0x13; /* VarPackageOp */
1120 build_append_int(package, acpi_cpus); /* VarNumElements */
1121 }
1122
1123 for (i = 0; i < acpi_cpus; i++) {
1124 uint8_t b = test_bit(i, cpu->found_cpus) ? 0x01 : 0x00;
1125 build_append_byte(package, b);
1126 }
1127
1128 build_package(package, op, 2);
1129 build_append_array(sb_scope, package);
1130 build_free_array(package);
1131 }
1132
1133 if (nr_mem) {
1134 assert(nr_mem <= ACPI_MAX_RAM_SLOTS);
1135 /* build memory devices */
1136 for (i = 0; i < nr_mem; i++) {
1137 char id[3];
1138 uint8_t *mem = acpi_data_push(sb_scope, ACPI_MEM_SIZEOF);
1139
1140 snprintf(id, sizeof(id), "%02X", i);
1141 memcpy(mem, ACPI_MEM_AML, ACPI_MEM_SIZEOF);
1142 memcpy(mem + ACPI_MEM_OFFSET_HEX, id, 2);
1143 memcpy(mem + ACPI_MEM_OFFSET_ID, id, 2);
1144 }
1145
1146 /* build Method(MEMORY_SLOT_NOTIFY_METHOD, 2) {
1147 * If (LEqual(Arg0, 0x00)) {Notify(MP00, Arg1)} ...
1148 */
1149 build_append_notify_method(sb_scope,
1150 stringify(MEMORY_SLOT_NOTIFY_METHOD),
1151 "MP%0.02X", nr_mem);
1152 }
1153
1154 {
1155 AcpiBuildPciBusHotplugState hotplug_state;
1156 Object *pci_host;
1157 PCIBus *bus = NULL;
1158 bool ambiguous;
1159
1160 pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous);
1161 if (!ambiguous && pci_host) {
1162 bus = PCI_HOST_BRIDGE(pci_host)->bus;
1163 }
1164
1165 build_pci_bus_state_init(&hotplug_state, NULL, pm->pcihp_bridge_en);
1166
1167 if (bus) {
1168 /* Scan all PCI buses. Generate tables to support hotplug. */
1169 pci_for_each_bus_depth_first(bus, build_pci_bus_begin,
1170 build_pci_bus_end, &hotplug_state);
1171 }
1172
1173 build_append_array(sb_scope, hotplug_state.device_table);
1174 build_pci_bus_state_cleanup(&hotplug_state);
1175 }
1176
1177 build_package(sb_scope, op, 3);
1178 build_append_array(table_data, sb_scope);
1179 build_free_array(sb_scope);
1180 }
1181
1182 build_header(linker, table_data,
1183 (void *)(table_data->data + ssdt_start),
1184 "SSDT", table_data->len - ssdt_start, 1);
1185 }
1186
1187 static void
1188 build_hpet(GArray *table_data, GArray *linker)
1189 {
1190 Acpi20Hpet *hpet;
1191
1192 hpet = acpi_data_push(table_data, sizeof(*hpet));
1193 /* Note timer_block_id value must be kept in sync with value advertised by
1194 * emulated hpet
1195 */
1196 hpet->timer_block_id = cpu_to_le32(0x8086a201);
1197 hpet->addr.address = cpu_to_le64(HPET_BASE);
1198 build_header(linker, table_data,
1199 (void *)hpet, "HPET", sizeof(*hpet), 1);
1200 }
1201
1202 typedef enum {
1203 MEM_AFFINITY_NOFLAGS = 0,
1204 MEM_AFFINITY_ENABLED = (1 << 0),
1205 MEM_AFFINITY_HOTPLUGGABLE = (1 << 1),
1206 MEM_AFFINITY_NON_VOLATILE = (1 << 2),
1207 } MemoryAffinityFlags;
1208
1209 static void
1210 acpi_build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base,
1211 uint64_t len, int node, MemoryAffinityFlags flags)
1212 {
1213 numamem->type = ACPI_SRAT_MEMORY;
1214 numamem->length = sizeof(*numamem);
1215 memset(numamem->proximity, 0, 4);
1216 numamem->proximity[0] = node;
1217 numamem->flags = cpu_to_le32(flags);
1218 numamem->base_addr = cpu_to_le64(base);
1219 numamem->range_length = cpu_to_le64(len);
1220 }
1221
1222 static void
1223 build_srat(GArray *table_data, GArray *linker,
1224 AcpiCpuInfo *cpu, PcGuestInfo *guest_info)
1225 {
1226 AcpiSystemResourceAffinityTable *srat;
1227 AcpiSratProcessorAffinity *core;
1228 AcpiSratMemoryAffinity *numamem;
1229
1230 int i;
1231 uint64_t curnode;
1232 int srat_start, numa_start, slots;
1233 uint64_t mem_len, mem_base, next_base;
1234 PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
1235 ram_addr_t hotplugabble_address_space_size =
1236 object_property_get_int(OBJECT(pcms), PC_MACHINE_MEMHP_REGION_SIZE,
1237 NULL);
1238
1239 srat_start = table_data->len;
1240
1241 srat = acpi_data_push(table_data, sizeof *srat);
1242 srat->reserved1 = cpu_to_le32(1);
1243 core = (void *)(srat + 1);
1244
1245 for (i = 0; i < guest_info->apic_id_limit; ++i) {
1246 core = acpi_data_push(table_data, sizeof *core);
1247 core->type = ACPI_SRAT_PROCESSOR;
1248 core->length = sizeof(*core);
1249 core->local_apic_id = i;
1250 curnode = guest_info->node_cpu[i];
1251 core->proximity_lo = curnode;
1252 memset(core->proximity_hi, 0, 3);
1253 core->local_sapic_eid = 0;
1254 if (test_bit(i, cpu->found_cpus)) {
1255 core->flags = cpu_to_le32(1);
1256 } else {
1257 core->flags = cpu_to_le32(0);
1258 }
1259 }
1260
1261
1262 /* the memory map is a bit tricky, it contains at least one hole
1263 * from 640k-1M and possibly another one from 3.5G-4G.
1264 */
1265 next_base = 0;
1266 numa_start = table_data->len;
1267
1268 numamem = acpi_data_push(table_data, sizeof *numamem);
1269 acpi_build_srat_memory(numamem, 0, 640*1024, 0, MEM_AFFINITY_ENABLED);
1270 next_base = 1024 * 1024;
1271 for (i = 1; i < guest_info->numa_nodes + 1; ++i) {
1272 mem_base = next_base;
1273 mem_len = guest_info->node_mem[i - 1];
1274 if (i == 1) {
1275 mem_len -= 1024 * 1024;
1276 }
1277 next_base = mem_base + mem_len;
1278
1279 /* Cut out the ACPI_PCI hole */
1280 if (mem_base <= guest_info->ram_size_below_4g &&
1281 next_base > guest_info->ram_size_below_4g) {
1282 mem_len -= next_base - guest_info->ram_size_below_4g;
1283 if (mem_len > 0) {
1284 numamem = acpi_data_push(table_data, sizeof *numamem);
1285 acpi_build_srat_memory(numamem, mem_base, mem_len, i - 1,
1286 MEM_AFFINITY_ENABLED);
1287 }
1288 mem_base = 1ULL << 32;
1289 mem_len = next_base - guest_info->ram_size_below_4g;
1290 next_base += (1ULL << 32) - guest_info->ram_size_below_4g;
1291 }
1292 numamem = acpi_data_push(table_data, sizeof *numamem);
1293 acpi_build_srat_memory(numamem, mem_base, mem_len, i - 1,
1294 MEM_AFFINITY_ENABLED);
1295 }
1296 slots = (table_data->len - numa_start) / sizeof *numamem;
1297 for (; slots < guest_info->numa_nodes + 2; slots++) {
1298 numamem = acpi_data_push(table_data, sizeof *numamem);
1299 acpi_build_srat_memory(numamem, 0, 0, 0, MEM_AFFINITY_NOFLAGS);
1300 }
1301
1302 /*
1303 * Entry is required for Windows to enable memory hotplug in OS.
1304 * Memory devices may override proximity set by this entry,
1305 * providing _PXM method if necessary.
1306 */
1307 if (hotplugabble_address_space_size) {
1308 numamem = acpi_data_push(table_data, sizeof *numamem);
1309 acpi_build_srat_memory(numamem, pcms->hotplug_memory_base,
1310 hotplugabble_address_space_size, 0,
1311 MEM_AFFINITY_HOTPLUGGABLE |
1312 MEM_AFFINITY_ENABLED);
1313 }
1314
1315 build_header(linker, table_data,
1316 (void *)(table_data->data + srat_start),
1317 "SRAT",
1318 table_data->len - srat_start, 1);
1319 }
1320
1321 static void
1322 build_mcfg_q35(GArray *table_data, GArray *linker, AcpiMcfgInfo *info)
1323 {
1324 AcpiTableMcfg *mcfg;
1325 const char *sig;
1326 int len = sizeof(*mcfg) + 1 * sizeof(mcfg->allocation[0]);
1327
1328 mcfg = acpi_data_push(table_data, len);
1329 mcfg->allocation[0].address = cpu_to_le64(info->mcfg_base);
1330 /* Only a single allocation so no need to play with segments */
1331 mcfg->allocation[0].pci_segment = cpu_to_le16(0);
1332 mcfg->allocation[0].start_bus_number = 0;
1333 mcfg->allocation[0].end_bus_number = PCIE_MMCFG_BUS(info->mcfg_size - 1);
1334
1335 /* MCFG is used for ECAM which can be enabled or disabled by guest.
1336 * To avoid table size changes (which create migration issues),
1337 * always create the table even if there are no allocations,
1338 * but set the signature to a reserved value in this case.
1339 * ACPI spec requires OSPMs to ignore such tables.
1340 */
1341 if (info->mcfg_base == PCIE_BASE_ADDR_UNMAPPED) {
1342 /* Reserved signature: ignored by OSPM */
1343 sig = "QEMU";
1344 } else {
1345 sig = "MCFG";
1346 }
1347 build_header(linker, table_data, (void *)mcfg, sig, len, 1);
1348 }
1349
1350 static void
1351 build_dsdt(GArray *table_data, GArray *linker, AcpiMiscInfo *misc)
1352 {
1353 AcpiTableHeader *dsdt;
1354
1355 assert(misc->dsdt_code && misc->dsdt_size);
1356
1357 dsdt = acpi_data_push(table_data, misc->dsdt_size);
1358 memcpy(dsdt, misc->dsdt_code, misc->dsdt_size);
1359
1360 memset(dsdt, 0, sizeof *dsdt);
1361 build_header(linker, table_data, dsdt, "DSDT",
1362 misc->dsdt_size, 1);
1363 }
1364
1365 /* Build final rsdt table */
1366 static void
1367 build_rsdt(GArray *table_data, GArray *linker, GArray *table_offsets)
1368 {
1369 AcpiRsdtDescriptorRev1 *rsdt;
1370 size_t rsdt_len;
1371 int i;
1372
1373 rsdt_len = sizeof(*rsdt) + sizeof(uint32_t) * table_offsets->len;
1374 rsdt = acpi_data_push(table_data, rsdt_len);
1375 memcpy(rsdt->table_offset_entry, table_offsets->data,
1376 sizeof(uint32_t) * table_offsets->len);
1377 for (i = 0; i < table_offsets->len; ++i) {
1378 /* rsdt->table_offset_entry to be filled by Guest linker */
1379 bios_linker_loader_add_pointer(linker,
1380 ACPI_BUILD_TABLE_FILE,
1381 ACPI_BUILD_TABLE_FILE,
1382 table_data, &rsdt->table_offset_entry[i],
1383 sizeof(uint32_t));
1384 }
1385 build_header(linker, table_data,
1386 (void *)rsdt, "RSDT", rsdt_len, 1);
1387 }
1388
1389 static GArray *
1390 build_rsdp(GArray *rsdp_table, GArray *linker, unsigned rsdt)
1391 {
1392 AcpiRsdpDescriptor *rsdp = acpi_data_push(rsdp_table, sizeof *rsdp);
1393
1394 bios_linker_loader_alloc(linker, ACPI_BUILD_RSDP_FILE, 1,
1395 true /* fseg memory */);
1396
1397 memcpy(&rsdp->signature, "RSD PTR ", 8);
1398 memcpy(rsdp->oem_id, ACPI_BUILD_APPNAME6, 6);
1399 rsdp->rsdt_physical_address = cpu_to_le32(rsdt);
1400 /* Address to be filled by Guest linker */
1401 bios_linker_loader_add_pointer(linker, ACPI_BUILD_RSDP_FILE,
1402 ACPI_BUILD_TABLE_FILE,
1403 rsdp_table, &rsdp->rsdt_physical_address,
1404 sizeof rsdp->rsdt_physical_address);
1405 rsdp->checksum = 0;
1406 /* Checksum to be filled by Guest linker */
1407 bios_linker_loader_add_checksum(linker, ACPI_BUILD_RSDP_FILE,
1408 rsdp, rsdp, sizeof *rsdp, &rsdp->checksum);
1409
1410 return rsdp_table;
1411 }
1412
1413 typedef
1414 struct AcpiBuildTables {
1415 GArray *table_data;
1416 GArray *rsdp;
1417 GArray *linker;
1418 } AcpiBuildTables;
1419
1420 static inline void acpi_build_tables_init(AcpiBuildTables *tables)
1421 {
1422 tables->rsdp = g_array_new(false, true /* clear */, 1);
1423 tables->table_data = g_array_new(false, true /* clear */, 1);
1424 tables->linker = bios_linker_loader_init();
1425 }
1426
1427 static inline void acpi_build_tables_cleanup(AcpiBuildTables *tables, bool mfre)
1428 {
1429 void *linker_data = bios_linker_loader_cleanup(tables->linker);
1430 if (mfre) {
1431 g_free(linker_data);
1432 }
1433 g_array_free(tables->rsdp, mfre);
1434 g_array_free(tables->table_data, mfre);
1435 }
1436
1437 typedef
1438 struct AcpiBuildState {
1439 /* Copy of table in RAM (for patching). */
1440 uint8_t *table_ram;
1441 uint32_t table_size;
1442 /* Is table patched? */
1443 uint8_t patched;
1444 PcGuestInfo *guest_info;
1445 } AcpiBuildState;
1446
1447 static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg)
1448 {
1449 Object *pci_host;
1450 QObject *o;
1451 bool ambiguous;
1452
1453 pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous);
1454 g_assert(!ambiguous);
1455 g_assert(pci_host);
1456
1457 o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_BASE, NULL);
1458 if (!o) {
1459 return false;
1460 }
1461 mcfg->mcfg_base = qint_get_int(qobject_to_qint(o));
1462 qobject_decref(o);
1463
1464 o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_SIZE, NULL);
1465 assert(o);
1466 mcfg->mcfg_size = qint_get_int(qobject_to_qint(o));
1467 qobject_decref(o);
1468 return true;
1469 }
1470
1471 static
1472 void acpi_build(PcGuestInfo *guest_info, AcpiBuildTables *tables)
1473 {
1474 GArray *table_offsets;
1475 unsigned facs, ssdt, dsdt, rsdt;
1476 AcpiCpuInfo cpu;
1477 AcpiPmInfo pm;
1478 AcpiMiscInfo misc;
1479 AcpiMcfgInfo mcfg;
1480 PcPciInfo pci;
1481 uint8_t *u;
1482 size_t aml_len = 0;
1483
1484 acpi_get_cpu_info(&cpu);
1485 acpi_get_pm_info(&pm);
1486 acpi_get_dsdt(&misc);
1487 acpi_get_misc_info(&misc);
1488 acpi_get_pci_info(&pci);
1489
1490 table_offsets = g_array_new(false, true /* clear */,
1491 sizeof(uint32_t));
1492 ACPI_BUILD_DPRINTF(3, "init ACPI tables\n");
1493
1494 bios_linker_loader_alloc(tables->linker, ACPI_BUILD_TABLE_FILE,
1495 64 /* Ensure FACS is aligned */,
1496 false /* high memory */);
1497
1498 /*
1499 * FACS is pointed to by FADT.
1500 * We place it first since it's the only table that has alignment
1501 * requirements.
1502 */
1503 facs = tables->table_data->len;
1504 build_facs(tables->table_data, tables->linker, guest_info);
1505
1506 /* DSDT is pointed to by FADT */
1507 dsdt = tables->table_data->len;
1508 build_dsdt(tables->table_data, tables->linker, &misc);
1509
1510 /* Count the size of the DSDT and SSDT, we will need it for legacy
1511 * sizing of ACPI tables.
1512 */
1513 aml_len += tables->table_data->len - dsdt;
1514
1515 /* ACPI tables pointed to by RSDT */
1516 acpi_add_table(table_offsets, tables->table_data);
1517 build_fadt(tables->table_data, tables->linker, &pm, facs, dsdt);
1518
1519 ssdt = tables->table_data->len;
1520 acpi_add_table(table_offsets, tables->table_data);
1521 build_ssdt(tables->table_data, tables->linker, &cpu, &pm, &misc, &pci,
1522 guest_info);
1523 aml_len += tables->table_data->len - ssdt;
1524
1525 acpi_add_table(table_offsets, tables->table_data);
1526 build_madt(tables->table_data, tables->linker, &cpu, guest_info);
1527
1528 if (misc.has_hpet) {
1529 acpi_add_table(table_offsets, tables->table_data);
1530 build_hpet(tables->table_data, tables->linker);
1531 }
1532 if (guest_info->numa_nodes) {
1533 acpi_add_table(table_offsets, tables->table_data);
1534 build_srat(tables->table_data, tables->linker, &cpu, guest_info);
1535 }
1536 if (acpi_get_mcfg(&mcfg)) {
1537 acpi_add_table(table_offsets, tables->table_data);
1538 build_mcfg_q35(tables->table_data, tables->linker, &mcfg);
1539 }
1540
1541 /* Add tables supplied by user (if any) */
1542 for (u = acpi_table_first(); u; u = acpi_table_next(u)) {
1543 unsigned len = acpi_table_len(u);
1544
1545 acpi_add_table(table_offsets, tables->table_data);
1546 g_array_append_vals(tables->table_data, u, len);
1547 }
1548
1549 /* RSDT is pointed to by RSDP */
1550 rsdt = tables->table_data->len;
1551 build_rsdt(tables->table_data, tables->linker, table_offsets);
1552
1553 /* RSDP is in FSEG memory, so allocate it separately */
1554 build_rsdp(tables->rsdp, tables->linker, rsdt);
1555
1556 /* We'll expose it all to Guest so we want to reduce
1557 * chance of size changes.
1558 * RSDP is small so it's easy to keep it immutable, no need to
1559 * bother with alignment.
1560 *
1561 * We used to align the tables to 4k, but of course this would
1562 * too simple to be enough. 4k turned out to be too small an
1563 * alignment very soon, and in fact it is almost impossible to
1564 * keep the table size stable for all (max_cpus, max_memory_slots)
1565 * combinations. So the table size is always 64k for pc-i440fx-2.1
1566 * and we give an error if the table grows beyond that limit.
1567 *
1568 * We still have the problem of migrating from "-M pc-i440fx-2.0". For
1569 * that, we exploit the fact that QEMU 2.1 generates _smaller_ tables
1570 * than 2.0 and we can always pad the smaller tables with zeros. We can
1571 * then use the exact size of the 2.0 tables.
1572 *
1573 * All this is for PIIX4, since QEMU 2.0 didn't support Q35 migration.
1574 */
1575 if (guest_info->legacy_acpi_table_size) {
1576 /* Subtracting aml_len gives the size of fixed tables. Then add the
1577 * size of the PIIX4 DSDT/SSDT in QEMU 2.0.
1578 */
1579 int legacy_aml_len =
1580 guest_info->legacy_acpi_table_size +
1581 ACPI_BUILD_LEGACY_CPU_AML_SIZE * max_cpus;
1582 int legacy_table_size =
1583 ROUND_UP(tables->table_data->len - aml_len + legacy_aml_len,
1584 ACPI_BUILD_ALIGN_SIZE);
1585 if (tables->table_data->len > legacy_table_size) {
1586 /* Should happen only with PCI bridges and -M pc-i440fx-2.0. */
1587 error_report("Warning: migration to QEMU 2.0 may not work.");
1588 }
1589 g_array_set_size(tables->table_data, legacy_table_size);
1590 } else {
1591 acpi_align_size(tables->table_data, ACPI_BUILD_ALIGN_SIZE);
1592 }
1593
1594 acpi_align_size(tables->linker, ACPI_BUILD_ALIGN_SIZE);
1595
1596 /* Cleanup memory that's no longer used. */
1597 g_array_free(table_offsets, true);
1598 }
1599
1600 static void acpi_build_update(void *build_opaque, uint32_t offset)
1601 {
1602 AcpiBuildState *build_state = build_opaque;
1603 AcpiBuildTables tables;
1604
1605 /* No state to update or already patched? Nothing to do. */
1606 if (!build_state || build_state->patched) {
1607 return;
1608 }
1609 build_state->patched = 1;
1610
1611 acpi_build_tables_init(&tables);
1612
1613 acpi_build(build_state->guest_info, &tables);
1614
1615 assert(acpi_data_len(tables.table_data) == build_state->table_size);
1616 memcpy(build_state->table_ram, tables.table_data->data,
1617 build_state->table_size);
1618
1619 acpi_build_tables_cleanup(&tables, true);
1620 }
1621
1622 static void acpi_build_reset(void *build_opaque)
1623 {
1624 AcpiBuildState *build_state = build_opaque;
1625 build_state->patched = 0;
1626 }
1627
1628 static void *acpi_add_rom_blob(AcpiBuildState *build_state, GArray *blob,
1629 const char *name)
1630 {
1631 return rom_add_blob(name, blob->data, acpi_data_len(blob), -1, name,
1632 acpi_build_update, build_state);
1633 }
1634
1635 static const VMStateDescription vmstate_acpi_build = {
1636 .name = "acpi_build",
1637 .version_id = 1,
1638 .minimum_version_id = 1,
1639 .fields = (VMStateField[]) {
1640 VMSTATE_UINT8(patched, AcpiBuildState),
1641 VMSTATE_END_OF_LIST()
1642 },
1643 };
1644
1645 void acpi_setup(PcGuestInfo *guest_info)
1646 {
1647 AcpiBuildTables tables;
1648 AcpiBuildState *build_state;
1649
1650 if (!guest_info->fw_cfg) {
1651 ACPI_BUILD_DPRINTF(3, "No fw cfg. Bailing out.\n");
1652 return;
1653 }
1654
1655 if (!guest_info->has_acpi_build) {
1656 ACPI_BUILD_DPRINTF(3, "ACPI build disabled. Bailing out.\n");
1657 return;
1658 }
1659
1660 if (!acpi_enabled) {
1661 ACPI_BUILD_DPRINTF(3, "ACPI disabled. Bailing out.\n");
1662 return;
1663 }
1664
1665 build_state = g_malloc0(sizeof *build_state);
1666
1667 build_state->guest_info = guest_info;
1668
1669 acpi_set_pci_info();
1670
1671 acpi_build_tables_init(&tables);
1672 acpi_build(build_state->guest_info, &tables);
1673
1674 /* Now expose it all to Guest */
1675 build_state->table_ram = acpi_add_rom_blob(build_state, tables.table_data,
1676 ACPI_BUILD_TABLE_FILE);
1677 build_state->table_size = acpi_data_len(tables.table_data);
1678
1679 acpi_add_rom_blob(NULL, tables.linker, "etc/table-loader");
1680
1681 /*
1682 * RSDP is small so it's easy to keep it immutable, no need to
1683 * bother with ROM blobs.
1684 */
1685 fw_cfg_add_file(guest_info->fw_cfg, ACPI_BUILD_RSDP_FILE,
1686 tables.rsdp->data, acpi_data_len(tables.rsdp));
1687
1688 qemu_register_reset(acpi_build_reset, build_state);
1689 acpi_build_reset(build_state);
1690 vmstate_register(NULL, 0, &vmstate_acpi_build, build_state);
1691
1692 /* Cleanup tables but don't free the memory: we track it
1693 * in build_state.
1694 */
1695 acpi_build_tables_cleanup(&tables, false);
1696 }
AR7 emulation for QEMU