s390x: upgrade status of KVM cores to "supported"
[qemu/ar7.git] / hw / display / virtio-vga.c
blob1e48009b74a6f96bed9cc9ad550524e78958118f
1 #include "qemu/osdep.h"
2 #include "hw/hw.h"
3 #include "hw/pci/pci.h"
4 #include "vga_int.h"
5 #include "hw/virtio/virtio-pci.h"
6 #include "hw/virtio/virtio-gpu.h"
7 #include "qapi/error.h"
9 /*
10 * virtio-vga: This extends VirtioPCIProxy.
12 #define TYPE_VIRTIO_VGA "virtio-vga"
13 #define VIRTIO_VGA(obj) \
14 OBJECT_CHECK(VirtIOVGA, (obj), TYPE_VIRTIO_VGA)
16 typedef struct VirtIOVGA {
17 VirtIOPCIProxy parent_obj;
18 VirtIOGPU vdev;
19 VGACommonState vga;
20 MemoryRegion vga_mrs[3];
21 } VirtIOVGA;
23 static void virtio_vga_invalidate_display(void *opaque)
25 VirtIOVGA *vvga = opaque;
27 if (vvga->vdev.enable) {
28 virtio_gpu_ops.invalidate(&vvga->vdev);
29 } else {
30 vvga->vga.hw_ops->invalidate(&vvga->vga);
34 static void virtio_vga_update_display(void *opaque)
36 VirtIOVGA *vvga = opaque;
38 if (vvga->vdev.enable) {
39 virtio_gpu_ops.gfx_update(&vvga->vdev);
40 } else {
41 vvga->vga.hw_ops->gfx_update(&vvga->vga);
45 static void virtio_vga_text_update(void *opaque, console_ch_t *chardata)
47 VirtIOVGA *vvga = opaque;
49 if (vvga->vdev.enable) {
50 if (virtio_gpu_ops.text_update) {
51 virtio_gpu_ops.text_update(&vvga->vdev, chardata);
53 } else {
54 if (vvga->vga.hw_ops->text_update) {
55 vvga->vga.hw_ops->text_update(&vvga->vga, chardata);
60 static int virtio_vga_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
62 VirtIOVGA *vvga = opaque;
64 if (virtio_gpu_ops.ui_info) {
65 return virtio_gpu_ops.ui_info(&vvga->vdev, idx, info);
67 return -1;
70 static void virtio_vga_gl_block(void *opaque, bool block)
72 VirtIOVGA *vvga = opaque;
74 if (virtio_gpu_ops.gl_block) {
75 virtio_gpu_ops.gl_block(&vvga->vdev, block);
79 static const GraphicHwOps virtio_vga_ops = {
80 .invalidate = virtio_vga_invalidate_display,
81 .gfx_update = virtio_vga_update_display,
82 .text_update = virtio_vga_text_update,
83 .ui_info = virtio_vga_ui_info,
84 .gl_block = virtio_vga_gl_block,
87 static const VMStateDescription vmstate_virtio_vga = {
88 .name = "virtio-vga",
89 .version_id = 2,
90 .minimum_version_id = 2,
91 .fields = (VMStateField[]) {
92 /* no pci stuff here, saving the virtio device will handle that */
93 VMSTATE_STRUCT(vga, VirtIOVGA, 0, vmstate_vga_common, VGACommonState),
94 VMSTATE_END_OF_LIST()
98 /* VGA device wrapper around PCI device around virtio GPU */
99 static void virtio_vga_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
101 VirtIOVGA *vvga = VIRTIO_VGA(vpci_dev);
102 VirtIOGPU *g = &vvga->vdev;
103 VGACommonState *vga = &vvga->vga;
104 Error *err = NULL;
105 uint32_t offset;
106 int i;
108 /* init vga compat bits */
109 vga->vram_size_mb = 8;
110 vga_common_init(vga, OBJECT(vpci_dev));
111 vga_init(vga, OBJECT(vpci_dev), pci_address_space(&vpci_dev->pci_dev),
112 pci_address_space_io(&vpci_dev->pci_dev), true);
113 pci_register_bar(&vpci_dev->pci_dev, 0,
114 PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
117 * Configure virtio bar and regions
119 * We use bar #2 for the mmio regions, to be compatible with stdvga.
120 * virtio regions are moved to the end of bar #2, to make room for
121 * the stdvga mmio registers at the start of bar #2.
123 vpci_dev->modern_mem_bar_idx = 2;
124 vpci_dev->msix_bar_idx = 4;
126 if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
128 * with page-per-vq=off there is no padding space we can use
129 * for the stdvga registers. Make the common and isr regions
130 * smaller then.
132 vpci_dev->common.size /= 2;
133 vpci_dev->isr.size /= 2;
136 offset = memory_region_size(&vpci_dev->modern_bar);
137 offset -= vpci_dev->notify.size;
138 vpci_dev->notify.offset = offset;
139 offset -= vpci_dev->device.size;
140 vpci_dev->device.offset = offset;
141 offset -= vpci_dev->isr.size;
142 vpci_dev->isr.offset = offset;
143 offset -= vpci_dev->common.size;
144 vpci_dev->common.offset = offset;
146 /* init virtio bits */
147 qdev_set_parent_bus(DEVICE(g), BUS(&vpci_dev->bus));
148 virtio_pci_force_virtio_1(vpci_dev);
149 object_property_set_bool(OBJECT(g), true, "realized", &err);
150 if (err) {
151 error_propagate(errp, err);
152 return;
155 /* add stdvga mmio regions */
156 pci_std_vga_mmio_region_init(vga, OBJECT(vvga), &vpci_dev->modern_bar,
157 vvga->vga_mrs, true, false);
159 vga->con = g->scanout[0].con;
160 graphic_console_set_hwops(vga->con, &virtio_vga_ops, vvga);
162 for (i = 0; i < g->conf.max_outputs; i++) {
163 object_property_set_link(OBJECT(g->scanout[i].con),
164 OBJECT(vpci_dev),
165 "device", errp);
169 static void virtio_vga_reset(DeviceState *dev)
171 VirtIOVGA *vvga = VIRTIO_VGA(dev);
173 /* reset virtio-gpu */
174 virtio_gpu_reset(VIRTIO_DEVICE(&vvga->vdev));
176 /* reset vga */
177 vga_common_reset(&vvga->vga);
178 vga_dirty_log_start(&vvga->vga);
181 static Property virtio_vga_properties[] = {
182 DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy),
183 DEFINE_PROP_END_OF_LIST(),
186 static void virtio_vga_class_init(ObjectClass *klass, void *data)
188 DeviceClass *dc = DEVICE_CLASS(klass);
189 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
190 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
192 set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
193 dc->props = virtio_vga_properties;
194 dc->reset = virtio_vga_reset;
195 dc->vmsd = &vmstate_virtio_vga;
196 dc->hotpluggable = false;
198 k->realize = virtio_vga_realize;
199 pcidev_k->romfile = "vgabios-virtio.bin";
200 pcidev_k->class_id = PCI_CLASS_DISPLAY_VGA;
203 static void virtio_vga_inst_initfn(Object *obj)
205 VirtIOVGA *dev = VIRTIO_VGA(obj);
207 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
208 TYPE_VIRTIO_GPU);
211 static VirtioPCIDeviceTypeInfo virtio_vga_info = {
212 .generic_name = TYPE_VIRTIO_VGA,
213 .instance_size = sizeof(struct VirtIOVGA),
214 .instance_init = virtio_vga_inst_initfn,
215 .class_init = virtio_vga_class_init,
218 static void virtio_vga_register_types(void)
220 virtio_pci_types_register(&virtio_vga_info);
223 type_init(virtio_vga_register_types)