hw/arm/omap_sx1.c

   1 /* omap_sx1.c Support for the Siemens SX1 smartphone emulation.
   2  *
   3  *   Copyright (C) 2008
   4  *      Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
   5  *   Copyright (C) 2007 Vladimir Ananiev <vovan888@gmail.com>
   6  *
   7  *   based on PalmOne's (TM) PDAs support (palm.c)
   8  */
   9
  10 /*
  11  * PalmOne's (TM) PDAs.
  12  *
  13  * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
  14  *
  15  * This program is free software; you can redistribute it and/or
  16  * modify it under the terms of the GNU General Public License as
  17  * published by the Free Software Foundation; either version 2 of
  18  * the License, or (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License along
  26  * with this program; if not, see <http://www.gnu.org/licenses/>.
  27  */
  28 #include "qemu/osdep.h"
  29 #include "qapi/error.h"
  30 #include "hw/hw.h"
  31 #include "ui/console.h"
  32 #include "hw/arm/omap.h"
  33 #include "hw/boards.h"
  34 #include "hw/arm/arm.h"
  35 #include "hw/block/flash.h"
  36 #include "sysemu/qtest.h"
  37 #include "exec/address-spaces.h"
  38 #include "cpu.h"
  39
  40 /*****************************************************************************/
  41 /* Siemens SX1 Cellphone V1 */
  42 /* - ARM OMAP310 processor
  43  * - SRAM                192 kB
  44  * - SDRAM                32 MB at 0x10000000
  45  * - Boot flash           16 MB at 0x00000000
  46  * - Application flash     8 MB at 0x04000000
  47  * - 3 serial ports
  48  * - 1 SecureDigital
  49  * - 1 LCD display
  50  * - 1 RTC
  51  */
  52
  53 /*****************************************************************************/
  54 /* Siemens SX1 Cellphone V2 */
  55 /* - ARM OMAP310 processor
  56  * - SRAM                192 kB
  57  * - SDRAM                32 MB at 0x10000000
  58  * - Boot flash           32 MB at 0x00000000
  59  * - 3 serial ports
  60  * - 1 SecureDigital
  61  * - 1 LCD display
  62  * - 1 RTC
  63  */
  64
  65 static uint64_t static_read(void *opaque, hwaddr offset,
  66                             unsigned size)
  67 {
  68     uint32_t *val = (uint32_t *) opaque;
  69     uint32_t mask = (4 / size) - 1;
  70
  71     return *val >> ((offset & mask) << 3);
  72 }
  73
  74 static void static_write(void *opaque, hwaddr offset,
  75                          uint64_t value, unsigned size)
  76 {
  77 #ifdef SPY
  78     printf("%s: value %" PRIx64 " %u bytes written at 0x%x\n",
  79                     __func__, value, size, (int)offset);
  80 #endif
  81 }
  82
  83 static const MemoryRegionOps static_ops = {
  84     .read = static_read,
  85     .write = static_write,
  86     .endianness = DEVICE_NATIVE_ENDIAN,
  87 };
  88
  89 #define sdram_size      0x02000000
  90 #define sector_size     (128 * 1024)
  91 #define flash0_size     (16 * 1024 * 1024)
  92 #define flash1_size     ( 8 * 1024 * 1024)
  93 #define flash2_size     (32 * 1024 * 1024)
  94 #define total_ram_v1    (sdram_size + flash0_size + flash1_size + OMAP15XX_SRAM_SIZE)
  95 #define total_ram_v2    (sdram_size + flash2_size + OMAP15XX_SRAM_SIZE)
  96
  97 static struct arm_boot_info sx1_binfo = {
  98     .loader_start = OMAP_EMIFF_BASE,
  99     .ram_size = sdram_size,
 100     .board_id = 0x265,
 101 };
 102
 103 static void sx1_init(MachineState *machine, const int version)
 104 {
 105     struct omap_mpu_state_s *mpu;
 106     MemoryRegion *address_space = get_system_memory();
 107     MemoryRegion *flash = g_new(MemoryRegion, 1);
 108     MemoryRegion *cs = g_new(MemoryRegion, 4);
 109     static uint32_t cs0val = 0x00213090;
 110     static uint32_t cs1val = 0x00215070;
 111     static uint32_t cs2val = 0x00001139;
 112     static uint32_t cs3val = 0x00001139;
 113     DriveInfo *dinfo;
 114     int fl_idx;
 115     uint32_t flash_size = flash0_size;
 116     int be;
 117
 118     if (version == 2) {
 119         flash_size = flash2_size;
 120     }
 121
 122     mpu = omap310_mpu_init(address_space, sx1_binfo.ram_size,
 123                            machine->cpu_type);
 124
 125     /* External Flash (EMIFS) */
 126     memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size,
 127                            &error_fatal);
 128     memory_region_set_readonly(flash, true);
 129     memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash);
 130
 131     memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val,
 132                           "sx1.cs0", OMAP_CS0_SIZE - flash_size);
 133     memory_region_add_subregion(address_space,
 134                                 OMAP_CS0_BASE + flash_size, &cs[0]);
 135
 136
 137     memory_region_init_io(&cs[2], NULL, &static_ops, &cs2val,
 138                           "sx1.cs2", OMAP_CS2_SIZE);
 139     memory_region_add_subregion(address_space,
 140                                 OMAP_CS2_BASE, &cs[2]);
 141
 142     memory_region_init_io(&cs[3], NULL, &static_ops, &cs3val,
 143                           "sx1.cs3", OMAP_CS3_SIZE);
 144     memory_region_add_subregion(address_space,
 145                                 OMAP_CS2_BASE, &cs[3]);
 146
 147     fl_idx = 0;
 148 #ifdef TARGET_WORDS_BIGENDIAN
 149     be = 1;
 150 #else
 151     be = 0;
 152 #endif
 153
 154     if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
 155         if (!pflash_cfi01_register(OMAP_CS0_BASE, NULL,
 156                                    "omap_sx1.flash0-1", flash_size,
 157                                    blk_by_legacy_dinfo(dinfo),
 158                                    sector_size, flash_size / sector_size,
 159                                    4, 0, 0, 0, 0, be)) {
 160             fprintf(stderr, "qemu: Error registering flash memory %d.\n",
 161                            fl_idx);
 162         }
 163         fl_idx++;
 164     }
 165
 166     if ((version == 1) &&
 167             (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
 168         MemoryRegion *flash_1 = g_new(MemoryRegion, 1);
 169         memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0",
 170                                flash1_size, &error_fatal);
 171         memory_region_set_readonly(flash_1, true);
 172         memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1);
 173
 174         memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
 175                               "sx1.cs1", OMAP_CS1_SIZE - flash1_size);
 176         memory_region_add_subregion(address_space,
 177                                 OMAP_CS1_BASE + flash1_size, &cs[1]);
 178
 179         if (!pflash_cfi01_register(OMAP_CS1_BASE, NULL,
 180                                    "omap_sx1.flash1-1", flash1_size,
 181                                    blk_by_legacy_dinfo(dinfo),
 182                                    sector_size, flash1_size / sector_size,
 183                                    4, 0, 0, 0, 0, be)) {
 184             fprintf(stderr, "qemu: Error registering flash memory %d.\n",
 185                            fl_idx);
 186         }
 187         fl_idx++;
 188     } else {
 189         memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
 190                               "sx1.cs1", OMAP_CS1_SIZE);
 191         memory_region_add_subregion(address_space,
 192                                 OMAP_CS1_BASE, &cs[1]);
 193     }
 194
 195     if (!machine->kernel_filename && !fl_idx && !qtest_enabled()) {
 196         error_report("Kernel or Flash image must be specified");
 197         exit(1);
 198     }
 199
 200     /* Load the kernel.  */
 201     sx1_binfo.kernel_filename = machine->kernel_filename;
 202     sx1_binfo.kernel_cmdline = machine->kernel_cmdline;
 203     sx1_binfo.initrd_filename = machine->initrd_filename;
 204     arm_load_kernel(mpu->cpu, &sx1_binfo);
 205
 206     /* TODO: fix next line */
 207     //~ qemu_console_resize(ds, 640, 480);
 208 }
 209
 210 static void sx1_init_v1(MachineState *machine)
 211 {
 212     sx1_init(machine, 1);
 213 }
 214
 215 static void sx1_init_v2(MachineState *machine)
 216 {
 217     sx1_init(machine, 2);
 218 }
 219
 220 static void sx1_machine_v2_class_init(ObjectClass *oc, void *data)
 221 {
 222     MachineClass *mc = MACHINE_CLASS(oc);
 223
 224     mc->desc = "Siemens SX1 (OMAP310) V2";
 225     mc->init = sx1_init_v2;
 226     mc->ignore_memory_transaction_failures = true;
 227     mc->default_cpu_type = ARM_CPU_TYPE_NAME("ti925t");
 228 }
 229
 230 static const TypeInfo sx1_machine_v2_type = {
 231     .name = MACHINE_TYPE_NAME("sx1"),
 232     .parent = TYPE_MACHINE,
 233     .class_init = sx1_machine_v2_class_init,
 234 };
 235
 236 static void sx1_machine_v1_class_init(ObjectClass *oc, void *data)
 237 {
 238     MachineClass *mc = MACHINE_CLASS(oc);
 239
 240     mc->desc = "Siemens SX1 (OMAP310) V1";
 241     mc->init = sx1_init_v1;
 242     mc->ignore_memory_transaction_failures = true;
 243     mc->default_cpu_type = ARM_CPU_TYPE_NAME("ti925t");
 244 }
 245
 246 static const TypeInfo sx1_machine_v1_type = {
 247     .name = MACHINE_TYPE_NAME("sx1-v1"),
 248     .parent = TYPE_MACHINE,
 249     .class_init = sx1_machine_v1_class_init,
 250 };
 251
 252 static void sx1_machine_init(void)
 253 {
 254     type_register_static(&sx1_machine_v1_type);
 255     type_register_static(&sx1_machine_v2_type);
 256 }
 257
 258 type_init(sx1_machine_init)