lsi: ignore write accesses to CTEST0 registers
[qemu/ar7.git] / include / hw / i386 / apic-msidef.h
blob6e2eb71f2f4fe99f3e2ce78da8b429def4d6aa44
1 #ifndef HW_APIC_MSIDEF_H
2 #define HW_APIC_MSIDEF_H
4 /*
5 * Intel APIC constants: from include/asm/msidef.h
6 */
8 /*
9 * Shifts for MSI data
12 #define MSI_DATA_VECTOR_SHIFT 0
13 #define MSI_DATA_VECTOR_MASK 0x000000ff
15 #define MSI_DATA_DELIVERY_MODE_SHIFT 8
16 #define MSI_DATA_LEVEL_SHIFT 14
17 #define MSI_DATA_TRIGGER_SHIFT 15
20 * Shift/mask fields for msi address
23 #define MSI_ADDR_DEST_MODE_SHIFT 2
25 #define MSI_ADDR_REDIRECTION_SHIFT 3
27 #define MSI_ADDR_DEST_ID_SHIFT 12
28 #define MSI_ADDR_DEST_ID_MASK 0x00ffff0
30 #endif /* HW_APIC_MSIDEF_H */