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memory: add big endian support to access_with_adjusted_size
[qemu/ar7.git] / memory.c
blob679bd8d8b0a617c9ef4e8ee3401ad018a88ab819
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qemu/bitops.h"
20 #include "sysemu/kvm.h"
21 #include <assert.h>
22
23 #include "exec/memory-internal.h"
24
25 //#define DEBUG_UNASSIGNED
26
27 static unsigned memory_region_transaction_depth;
28 static bool memory_region_update_pending;
29 static bool global_dirty_log = false;
30
31 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
32 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
33
34 static QTAILQ_HEAD(, AddressSpace) address_spaces
35 = QTAILQ_HEAD_INITIALIZER(address_spaces);
36
37 typedef struct AddrRange AddrRange;
38
39 /*
40 * Note using signed integers limits us to physical addresses at most
41 * 63 bits wide. They are needed for negative offsetting in aliases
42 * (large MemoryRegion::alias_offset).
43 */
44 struct AddrRange {
45 Int128 start;
46 Int128 size;
47 };
48
49 static AddrRange addrrange_make(Int128 start, Int128 size)
50 {
51 return (AddrRange) { start, size };
52 }
53
54 static bool addrrange_equal(AddrRange r1, AddrRange r2)
55 {
56 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
57 }
58
59 static Int128 addrrange_end(AddrRange r)
60 {
61 return int128_add(r.start, r.size);
62 }
63
64 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
65 {
66 int128_addto(&range.start, delta);
67 return range;
68 }
69
70 static bool addrrange_contains(AddrRange range, Int128 addr)
71 {
72 return int128_ge(addr, range.start)
73 && int128_lt(addr, addrrange_end(range));
74 }
75
76 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
77 {
78 return addrrange_contains(r1, r2.start)
79 || addrrange_contains(r2, r1.start);
80 }
81
82 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
83 {
84 Int128 start = int128_max(r1.start, r2.start);
85 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
86 return addrrange_make(start, int128_sub(end, start));
87 }
88
89 enum ListenerDirection { Forward, Reverse };
90
91 static bool memory_listener_match(MemoryListener *listener,
92 MemoryRegionSection *section)
93 {
94 return !listener->address_space_filter
95 || listener->address_space_filter == section->address_space;
96 }
97
98 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
99 do { \
100 MemoryListener *_listener; \
101 \
102 switch (_direction) { \
103 case Forward: \
104 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
105 if (_listener->_callback) { \
106 _listener->_callback(_listener, ##_args); \
107 } \
108 } \
109 break; \
110 case Reverse: \
111 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
112 memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 default: \
119 abort(); \
120 } \
121 } while (0)
122
123 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
124 do { \
125 MemoryListener *_listener; \
126 \
127 switch (_direction) { \
128 case Forward: \
129 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
130 if (_listener->_callback \
131 && memory_listener_match(_listener, _section)) { \
132 _listener->_callback(_listener, _section, ##_args); \
133 } \
134 } \
135 break; \
136 case Reverse: \
137 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
138 memory_listeners, link) { \
139 if (_listener->_callback \
140 && memory_listener_match(_listener, _section)) { \
141 _listener->_callback(_listener, _section, ##_args); \
142 } \
143 } \
144 break; \
145 default: \
146 abort(); \
147 } \
148 } while (0)
149
150 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
151 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
152 .mr = (fr)->mr, \
153 .address_space = (as), \
154 .offset_within_region = (fr)->offset_in_region, \
155 .size = int128_get64((fr)->addr.size), \
156 .offset_within_address_space = int128_get64((fr)->addr.start), \
157 .readonly = (fr)->readonly, \
158 }))
159
160 struct CoalescedMemoryRange {
161 AddrRange addr;
162 QTAILQ_ENTRY(CoalescedMemoryRange) link;
163 };
164
165 struct MemoryRegionIoeventfd {
166 AddrRange addr;
167 bool match_data;
168 uint64_t data;
169 EventNotifier *e;
170 };
171
172 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
173 MemoryRegionIoeventfd b)
174 {
175 if (int128_lt(a.addr.start, b.addr.start)) {
176 return true;
177 } else if (int128_gt(a.addr.start, b.addr.start)) {
178 return false;
179 } else if (int128_lt(a.addr.size, b.addr.size)) {
180 return true;
181 } else if (int128_gt(a.addr.size, b.addr.size)) {
182 return false;
183 } else if (a.match_data < b.match_data) {
184 return true;
185 } else if (a.match_data > b.match_data) {
186 return false;
187 } else if (a.match_data) {
188 if (a.data < b.data) {
189 return true;
190 } else if (a.data > b.data) {
191 return false;
192 }
193 }
194 if (a.e < b.e) {
195 return true;
196 } else if (a.e > b.e) {
197 return false;
198 }
199 return false;
200 }
201
202 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
203 MemoryRegionIoeventfd b)
204 {
205 return !memory_region_ioeventfd_before(a, b)
206 && !memory_region_ioeventfd_before(b, a);
207 }
208
209 typedef struct FlatRange FlatRange;
210 typedef struct FlatView FlatView;
211
212 /* Range of memory in the global map. Addresses are absolute. */
213 struct FlatRange {
214 MemoryRegion *mr;
215 hwaddr offset_in_region;
216 AddrRange addr;
217 uint8_t dirty_log_mask;
218 bool romd_mode;
219 bool readonly;
220 };
221
222 /* Flattened global view of current active memory hierarchy. Kept in sorted
223 * order.
224 */
225 struct FlatView {
226 FlatRange *ranges;
227 unsigned nr;
228 unsigned nr_allocated;
229 };
230
231 typedef struct AddressSpaceOps AddressSpaceOps;
232
233 #define FOR_EACH_FLAT_RANGE(var, view) \
234 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
235
236 static bool flatrange_equal(FlatRange *a, FlatRange *b)
237 {
238 return a->mr == b->mr
239 && addrrange_equal(a->addr, b->addr)
240 && a->offset_in_region == b->offset_in_region
241 && a->romd_mode == b->romd_mode
242 && a->readonly == b->readonly;
243 }
244
245 static void flatview_init(FlatView *view)
246 {
247 view->ranges = NULL;
248 view->nr = 0;
249 view->nr_allocated = 0;
250 }
251
252 /* Insert a range into a given position. Caller is responsible for maintaining
253 * sorting order.
254 */
255 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
256 {
257 if (view->nr == view->nr_allocated) {
258 view->nr_allocated = MAX(2 * view->nr, 10);
259 view->ranges = g_realloc(view->ranges,
260 view->nr_allocated * sizeof(*view->ranges));
261 }
262 memmove(view->ranges + pos + 1, view->ranges + pos,
263 (view->nr - pos) * sizeof(FlatRange));
264 view->ranges[pos] = *range;
265 ++view->nr;
266 }
267
268 static void flatview_destroy(FlatView *view)
269 {
270 g_free(view->ranges);
271 }
272
273 static bool can_merge(FlatRange *r1, FlatRange *r2)
274 {
275 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
276 && r1->mr == r2->mr
277 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
278 r1->addr.size),
279 int128_make64(r2->offset_in_region))
280 && r1->dirty_log_mask == r2->dirty_log_mask
281 && r1->romd_mode == r2->romd_mode
282 && r1->readonly == r2->readonly;
283 }
284
285 /* Attempt to simplify a view by merging ajacent ranges */
286 static void flatview_simplify(FlatView *view)
287 {
288 unsigned i, j;
289
290 i = 0;
291 while (i < view->nr) {
292 j = i + 1;
293 while (j < view->nr
294 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
295 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
296 ++j;
297 }
298 ++i;
299 memmove(&view->ranges[i], &view->ranges[j],
300 (view->nr - j) * sizeof(view->ranges[j]));
301 view->nr -= j - i;
302 }
303 }
304
305 static void memory_region_read_accessor(void *opaque,
306 hwaddr addr,
307 uint64_t *value,
308 unsigned size,
309 unsigned shift,
310 uint64_t mask)
311 {
312 MemoryRegion *mr = opaque;
313 uint64_t tmp;
314
315 if (mr->flush_coalesced_mmio) {
316 qemu_flush_coalesced_mmio_buffer();
317 }
318 tmp = mr->ops->read(mr->opaque, addr, size);
319 *value |= (tmp & mask) << shift;
320 }
321
322 static void memory_region_write_accessor(void *opaque,
323 hwaddr addr,
324 uint64_t *value,
325 unsigned size,
326 unsigned shift,
327 uint64_t mask)
328 {
329 MemoryRegion *mr = opaque;
330 uint64_t tmp;
331
332 if (mr->flush_coalesced_mmio) {
333 qemu_flush_coalesced_mmio_buffer();
334 }
335 tmp = (*value >> shift) & mask;
336 mr->ops->write(mr->opaque, addr, tmp, size);
337 }
338
339 static void access_with_adjusted_size(hwaddr addr,
340 uint64_t *value,
341 unsigned size,
342 unsigned access_size_min,
343 unsigned access_size_max,
344 void (*access)(void *opaque,
345 hwaddr addr,
346 uint64_t *value,
347 unsigned size,
348 unsigned shift,
349 uint64_t mask),
350 void *opaque)
351 {
352 uint64_t access_mask;
353 unsigned access_size;
354 unsigned i;
355
356 if (!access_size_min) {
357 access_size_min = 1;
358 }
359 if (!access_size_max) {
360 access_size_max = 4;
361 }
362 access_size = MAX(MIN(size, access_size_max), access_size_min);
363 access_mask = -1ULL >> (64 - access_size * 8);
364 for (i = 0; i < size; i += access_size) {
365 #ifdef TARGET_WORDS_BIGENDIAN
366 access(opaque, addr + i, value, access_size,
367 (size - access_size - i) * 8, access_mask);
368 #else
369 access(opaque, addr + i, value, access_size, i * 8, access_mask);
370 #endif
371 }
372 }
373
374 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
375 unsigned width, bool write)
376 {
377 const MemoryRegionPortio *mrp;
378
379 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
380 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
381 && width == mrp->size
382 && (write ? (bool)mrp->write : (bool)mrp->read)) {
383 return mrp;
384 }
385 }
386 return NULL;
387 }
388
389 static void memory_region_iorange_read(IORange *iorange,
390 uint64_t offset,
391 unsigned width,
392 uint64_t *data)
393 {
394 MemoryRegionIORange *mrio
395 = container_of(iorange, MemoryRegionIORange, iorange);
396 MemoryRegion *mr = mrio->mr;
397
398 offset += mrio->offset;
399 if (mr->ops->old_portio) {
400 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
401 width, false);
402
403 *data = ((uint64_t)1 << (width * 8)) - 1;
404 if (mrp) {
405 *data = mrp->read(mr->opaque, offset);
406 } else if (width == 2) {
407 mrp = find_portio(mr, offset - mrio->offset, 1, false);
408 assert(mrp);
409 *data = mrp->read(mr->opaque, offset) |
410 (mrp->read(mr->opaque, offset + 1) << 8);
411 }
412 return;
413 }
414 *data = 0;
415 access_with_adjusted_size(offset, data, width,
416 mr->ops->impl.min_access_size,
417 mr->ops->impl.max_access_size,
418 memory_region_read_accessor, mr);
419 }
420
421 static void memory_region_iorange_write(IORange *iorange,
422 uint64_t offset,
423 unsigned width,
424 uint64_t data)
425 {
426 MemoryRegionIORange *mrio
427 = container_of(iorange, MemoryRegionIORange, iorange);
428 MemoryRegion *mr = mrio->mr;
429
430 offset += mrio->offset;
431 if (mr->ops->old_portio) {
432 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
433 width, true);
434
435 if (mrp) {
436 mrp->write(mr->opaque, offset, data);
437 } else if (width == 2) {
438 mrp = find_portio(mr, offset - mrio->offset, 1, true);
439 assert(mrp);
440 mrp->write(mr->opaque, offset, data & 0xff);
441 mrp->write(mr->opaque, offset + 1, data >> 8);
442 }
443 return;
444 }
445 access_with_adjusted_size(offset, &data, width,
446 mr->ops->impl.min_access_size,
447 mr->ops->impl.max_access_size,
448 memory_region_write_accessor, mr);
449 }
450
451 static void memory_region_iorange_destructor(IORange *iorange)
452 {
453 g_free(container_of(iorange, MemoryRegionIORange, iorange));
454 }
455
456 const IORangeOps memory_region_iorange_ops = {
457 .read = memory_region_iorange_read,
458 .write = memory_region_iorange_write,
459 .destructor = memory_region_iorange_destructor,
460 };
461
462 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
463 {
464 AddressSpace *as;
465
466 while (mr->parent) {
467 mr = mr->parent;
468 }
469 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
470 if (mr == as->root) {
471 return as;
472 }
473 }
474 abort();
475 }
476
477 /* Render a memory region into the global view. Ranges in @view obscure
478 * ranges in @mr.
479 */
480 static void render_memory_region(FlatView *view,
481 MemoryRegion *mr,
482 Int128 base,
483 AddrRange clip,
484 bool readonly)
485 {
486 MemoryRegion *subregion;
487 unsigned i;
488 hwaddr offset_in_region;
489 Int128 remain;
490 Int128 now;
491 FlatRange fr;
492 AddrRange tmp;
493
494 if (!mr->enabled) {
495 return;
496 }
497
498 int128_addto(&base, int128_make64(mr->addr));
499 readonly |= mr->readonly;
500
501 tmp = addrrange_make(base, mr->size);
502
503 if (!addrrange_intersects(tmp, clip)) {
504 return;
505 }
506
507 clip = addrrange_intersection(tmp, clip);
508
509 if (mr->alias) {
510 int128_subfrom(&base, int128_make64(mr->alias->addr));
511 int128_subfrom(&base, int128_make64(mr->alias_offset));
512 render_memory_region(view, mr->alias, base, clip, readonly);
513 return;
514 }
515
516 /* Render subregions in priority order. */
517 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
518 render_memory_region(view, subregion, base, clip, readonly);
519 }
520
521 if (!mr->terminates) {
522 return;
523 }
524
525 offset_in_region = int128_get64(int128_sub(clip.start, base));
526 base = clip.start;
527 remain = clip.size;
528
529 /* Render the region itself into any gaps left by the current view. */
530 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
531 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
532 continue;
533 }
534 if (int128_lt(base, view->ranges[i].addr.start)) {
535 now = int128_min(remain,
536 int128_sub(view->ranges[i].addr.start, base));
537 fr.mr = mr;
538 fr.offset_in_region = offset_in_region;
539 fr.addr = addrrange_make(base, now);
540 fr.dirty_log_mask = mr->dirty_log_mask;
541 fr.romd_mode = mr->romd_mode;
542 fr.readonly = readonly;
543 flatview_insert(view, i, &fr);
544 ++i;
545 int128_addto(&base, now);
546 offset_in_region += int128_get64(now);
547 int128_subfrom(&remain, now);
548 }
549 now = int128_sub(int128_min(int128_add(base, remain),
550 addrrange_end(view->ranges[i].addr)),
551 base);
552 int128_addto(&base, now);
553 offset_in_region += int128_get64(now);
554 int128_subfrom(&remain, now);
555 }
556 if (int128_nz(remain)) {
557 fr.mr = mr;
558 fr.offset_in_region = offset_in_region;
559 fr.addr = addrrange_make(base, remain);
560 fr.dirty_log_mask = mr->dirty_log_mask;
561 fr.romd_mode = mr->romd_mode;
562 fr.readonly = readonly;
563 flatview_insert(view, i, &fr);
564 }
565 }
566
567 /* Render a memory topology into a list of disjoint absolute ranges. */
568 static FlatView generate_memory_topology(MemoryRegion *mr)
569 {
570 FlatView view;
571
572 flatview_init(&view);
573
574 if (mr) {
575 render_memory_region(&view, mr, int128_zero(),
576 addrrange_make(int128_zero(), int128_2_64()), false);
577 }
578 flatview_simplify(&view);
579
580 return view;
581 }
582
583 static void address_space_add_del_ioeventfds(AddressSpace *as,
584 MemoryRegionIoeventfd *fds_new,
585 unsigned fds_new_nb,
586 MemoryRegionIoeventfd *fds_old,
587 unsigned fds_old_nb)
588 {
589 unsigned iold, inew;
590 MemoryRegionIoeventfd *fd;
591 MemoryRegionSection section;
592
593 /* Generate a symmetric difference of the old and new fd sets, adding
594 * and deleting as necessary.
595 */
596
597 iold = inew = 0;
598 while (iold < fds_old_nb || inew < fds_new_nb) {
599 if (iold < fds_old_nb
600 && (inew == fds_new_nb
601 || memory_region_ioeventfd_before(fds_old[iold],
602 fds_new[inew]))) {
603 fd = &fds_old[iold];
604 section = (MemoryRegionSection) {
605 .address_space = as,
606 .offset_within_address_space = int128_get64(fd->addr.start),
607 .size = int128_get64(fd->addr.size),
608 };
609 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
610 fd->match_data, fd->data, fd->e);
611 ++iold;
612 } else if (inew < fds_new_nb
613 && (iold == fds_old_nb
614 || memory_region_ioeventfd_before(fds_new[inew],
615 fds_old[iold]))) {
616 fd = &fds_new[inew];
617 section = (MemoryRegionSection) {
618 .address_space = as,
619 .offset_within_address_space = int128_get64(fd->addr.start),
620 .size = int128_get64(fd->addr.size),
621 };
622 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
623 fd->match_data, fd->data, fd->e);
624 ++inew;
625 } else {
626 ++iold;
627 ++inew;
628 }
629 }
630 }
631
632 static void address_space_update_ioeventfds(AddressSpace *as)
633 {
634 FlatRange *fr;
635 unsigned ioeventfd_nb = 0;
636 MemoryRegionIoeventfd *ioeventfds = NULL;
637 AddrRange tmp;
638 unsigned i;
639
640 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
641 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
642 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
643 int128_sub(fr->addr.start,
644 int128_make64(fr->offset_in_region)));
645 if (addrrange_intersects(fr->addr, tmp)) {
646 ++ioeventfd_nb;
647 ioeventfds = g_realloc(ioeventfds,
648 ioeventfd_nb * sizeof(*ioeventfds));
649 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
650 ioeventfds[ioeventfd_nb-1].addr = tmp;
651 }
652 }
653 }
654
655 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
656 as->ioeventfds, as->ioeventfd_nb);
657
658 g_free(as->ioeventfds);
659 as->ioeventfds = ioeventfds;
660 as->ioeventfd_nb = ioeventfd_nb;
661 }
662
663 static void address_space_update_topology_pass(AddressSpace *as,
664 FlatView old_view,
665 FlatView new_view,
666 bool adding)
667 {
668 unsigned iold, inew;
669 FlatRange *frold, *frnew;
670
671 /* Generate a symmetric difference of the old and new memory maps.
672 * Kill ranges in the old map, and instantiate ranges in the new map.
673 */
674 iold = inew = 0;
675 while (iold < old_view.nr || inew < new_view.nr) {
676 if (iold < old_view.nr) {
677 frold = &old_view.ranges[iold];
678 } else {
679 frold = NULL;
680 }
681 if (inew < new_view.nr) {
682 frnew = &new_view.ranges[inew];
683 } else {
684 frnew = NULL;
685 }
686
687 if (frold
688 && (!frnew
689 || int128_lt(frold->addr.start, frnew->addr.start)
690 || (int128_eq(frold->addr.start, frnew->addr.start)
691 && !flatrange_equal(frold, frnew)))) {
692 /* In old, but (not in new, or in new but attributes changed). */
693
694 if (!adding) {
695 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
696 }
697
698 ++iold;
699 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
700 /* In both (logging may have changed) */
701
702 if (adding) {
703 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
704 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
705 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
706 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
707 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
708 }
709 }
710
711 ++iold;
712 ++inew;
713 } else {
714 /* In new */
715
716 if (adding) {
717 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
718 }
719
720 ++inew;
721 }
722 }
723 }
724
725
726 static void address_space_update_topology(AddressSpace *as)
727 {
728 FlatView old_view = *as->current_map;
729 FlatView new_view = generate_memory_topology(as->root);
730
731 address_space_update_topology_pass(as, old_view, new_view, false);
732 address_space_update_topology_pass(as, old_view, new_view, true);
733
734 *as->current_map = new_view;
735 flatview_destroy(&old_view);
736 address_space_update_ioeventfds(as);
737 }
738
739 void memory_region_transaction_begin(void)
740 {
741 qemu_flush_coalesced_mmio_buffer();
742 ++memory_region_transaction_depth;
743 }
744
745 void memory_region_transaction_commit(void)
746 {
747 AddressSpace *as;
748
749 assert(memory_region_transaction_depth);
750 --memory_region_transaction_depth;
751 if (!memory_region_transaction_depth && memory_region_update_pending) {
752 memory_region_update_pending = false;
753 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
754
755 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
756 address_space_update_topology(as);
757 }
758
759 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
760 }
761 }
762
763 static void memory_region_destructor_none(MemoryRegion *mr)
764 {
765 }
766
767 static void memory_region_destructor_ram(MemoryRegion *mr)
768 {
769 qemu_ram_free(mr->ram_addr);
770 }
771
772 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
773 {
774 qemu_ram_free_from_ptr(mr->ram_addr);
775 }
776
777 static void memory_region_destructor_rom_device(MemoryRegion *mr)
778 {
779 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
780 }
781
782 static bool memory_region_wrong_endianness(MemoryRegion *mr)
783 {
784 #ifdef TARGET_WORDS_BIGENDIAN
785 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
786 #else
787 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
788 #endif
789 }
790
791 void memory_region_init(MemoryRegion *mr,
792 const char *name,
793 uint64_t size)
794 {
795 mr->ops = &unassigned_mem_ops;
796 mr->opaque = NULL;
797 mr->parent = NULL;
798 mr->size = int128_make64(size);
799 if (size == UINT64_MAX) {
800 mr->size = int128_2_64();
801 }
802 mr->addr = 0;
803 mr->subpage = false;
804 mr->enabled = true;
805 mr->terminates = false;
806 mr->ram = false;
807 mr->romd_mode = true;
808 mr->readonly = false;
809 mr->rom_device = false;
810 mr->destructor = memory_region_destructor_none;
811 mr->priority = 0;
812 mr->may_overlap = false;
813 mr->alias = NULL;
814 QTAILQ_INIT(&mr->subregions);
815 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
816 QTAILQ_INIT(&mr->coalesced);
817 mr->name = g_strdup(name);
818 mr->dirty_log_mask = 0;
819 mr->ioeventfd_nb = 0;
820 mr->ioeventfds = NULL;
821 mr->flush_coalesced_mmio = false;
822 }
823
824 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
825 unsigned size)
826 {
827 #ifdef DEBUG_UNASSIGNED
828 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
829 #endif
830 #if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
831 cpu_unassigned_access(cpu_single_env, addr, 0, 0, 0, size);
832 #endif
833 return 0;
834 }
835
836 static void unassigned_mem_write(void *opaque, hwaddr addr,
837 uint64_t val, unsigned size)
838 {
839 #ifdef DEBUG_UNASSIGNED
840 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
841 #endif
842 #if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
843 cpu_unassigned_access(cpu_single_env, addr, 1, 0, 0, size);
844 #endif
845 }
846
847 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
848 unsigned size, bool is_write)
849 {
850 return false;
851 }
852
853 const MemoryRegionOps unassigned_mem_ops = {
854 .valid.accepts = unassigned_mem_accepts,
855 .endianness = DEVICE_NATIVE_ENDIAN,
856 };
857
858 bool memory_region_access_valid(MemoryRegion *mr,
859 hwaddr addr,
860 unsigned size,
861 bool is_write)
862 {
863 int access_size_min, access_size_max;
864 int access_size, i;
865
866 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
867 return false;
868 }
869
870 if (!mr->ops->valid.accepts) {
871 return true;
872 }
873
874 access_size_min = mr->ops->valid.min_access_size;
875 if (!mr->ops->valid.min_access_size) {
876 access_size_min = 1;
877 }
878
879 access_size_max = mr->ops->valid.max_access_size;
880 if (!mr->ops->valid.max_access_size) {
881 access_size_max = 4;
882 }
883
884 access_size = MAX(MIN(size, access_size_max), access_size_min);
885 for (i = 0; i < size; i += access_size) {
886 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
887 is_write)) {
888 return false;
889 }
890 }
891
892 return true;
893 }
894
895 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
896 hwaddr addr,
897 unsigned size)
898 {
899 uint64_t data = 0;
900
901 if (!memory_region_access_valid(mr, addr, size, false)) {
902 return unassigned_mem_read(mr, addr, size);
903 }
904
905 if (!mr->ops->read) {
906 return mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
907 }
908
909 /* FIXME: support unaligned access */
910 access_with_adjusted_size(addr, &data, size,
911 mr->ops->impl.min_access_size,
912 mr->ops->impl.max_access_size,
913 memory_region_read_accessor, mr);
914
915 return data;
916 }
917
918 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
919 {
920 if (memory_region_wrong_endianness(mr)) {
921 switch (size) {
922 case 1:
923 break;
924 case 2:
925 *data = bswap16(*data);
926 break;
927 case 4:
928 *data = bswap32(*data);
929 break;
930 default:
931 abort();
932 }
933 }
934 }
935
936 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
937 hwaddr addr,
938 unsigned size)
939 {
940 uint64_t ret;
941
942 ret = memory_region_dispatch_read1(mr, addr, size);
943 adjust_endianness(mr, &ret, size);
944 return ret;
945 }
946
947 static void memory_region_dispatch_write(MemoryRegion *mr,
948 hwaddr addr,
949 uint64_t data,
950 unsigned size)
951 {
952 if (!memory_region_access_valid(mr, addr, size, true)) {
953 unassigned_mem_write(mr, addr, data, size);
954 return;
955 }
956
957 adjust_endianness(mr, &data, size);
958
959 if (!mr->ops->write) {
960 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, data);
961 return;
962 }
963
964 /* FIXME: support unaligned access */
965 access_with_adjusted_size(addr, &data, size,
966 mr->ops->impl.min_access_size,
967 mr->ops->impl.max_access_size,
968 memory_region_write_accessor, mr);
969 }
970
971 void memory_region_init_io(MemoryRegion *mr,
972 const MemoryRegionOps *ops,
973 void *opaque,
974 const char *name,
975 uint64_t size)
976 {
977 memory_region_init(mr, name, size);
978 mr->ops = ops;
979 mr->opaque = opaque;
980 mr->terminates = true;
981 mr->ram_addr = ~(ram_addr_t)0;
982 }
983
984 void memory_region_init_ram(MemoryRegion *mr,
985 const char *name,
986 uint64_t size)
987 {
988 memory_region_init(mr, name, size);
989 mr->ram = true;
990 mr->terminates = true;
991 mr->destructor = memory_region_destructor_ram;
992 mr->ram_addr = qemu_ram_alloc(size, mr);
993 }
994
995 void memory_region_init_ram_ptr(MemoryRegion *mr,
996 const char *name,
997 uint64_t size,
998 void *ptr)
999 {
1000 memory_region_init(mr, name, size);
1001 mr->ram = true;
1002 mr->terminates = true;
1003 mr->destructor = memory_region_destructor_ram_from_ptr;
1004 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
1005 }
1006
1007 void memory_region_init_alias(MemoryRegion *mr,
1008 const char *name,
1009 MemoryRegion *orig,
1010 hwaddr offset,
1011 uint64_t size)
1012 {
1013 memory_region_init(mr, name, size);
1014 mr->alias = orig;
1015 mr->alias_offset = offset;
1016 }
1017
1018 void memory_region_init_rom_device(MemoryRegion *mr,
1019 const MemoryRegionOps *ops,
1020 void *opaque,
1021 const char *name,
1022 uint64_t size)
1023 {
1024 memory_region_init(mr, name, size);
1025 mr->ops = ops;
1026 mr->opaque = opaque;
1027 mr->terminates = true;
1028 mr->rom_device = true;
1029 mr->destructor = memory_region_destructor_rom_device;
1030 mr->ram_addr = qemu_ram_alloc(size, mr);
1031 }
1032
1033 void memory_region_init_reservation(MemoryRegion *mr,
1034 const char *name,
1035 uint64_t size)
1036 {
1037 memory_region_init_io(mr, &unassigned_mem_ops, mr, name, size);
1038 }
1039
1040 void memory_region_destroy(MemoryRegion *mr)
1041 {
1042 assert(QTAILQ_EMPTY(&mr->subregions));
1043 assert(memory_region_transaction_depth == 0);
1044 mr->destructor(mr);
1045 memory_region_clear_coalescing(mr);
1046 g_free((char *)mr->name);
1047 g_free(mr->ioeventfds);
1048 }
1049
1050 uint64_t memory_region_size(MemoryRegion *mr)
1051 {
1052 if (int128_eq(mr->size, int128_2_64())) {
1053 return UINT64_MAX;
1054 }
1055 return int128_get64(mr->size);
1056 }
1057
1058 const char *memory_region_name(MemoryRegion *mr)
1059 {
1060 return mr->name;
1061 }
1062
1063 bool memory_region_is_ram(MemoryRegion *mr)
1064 {
1065 return mr->ram;
1066 }
1067
1068 bool memory_region_is_logging(MemoryRegion *mr)
1069 {
1070 return mr->dirty_log_mask;
1071 }
1072
1073 bool memory_region_is_rom(MemoryRegion *mr)
1074 {
1075 return mr->ram && mr->readonly;
1076 }
1077
1078 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1079 {
1080 uint8_t mask = 1 << client;
1081
1082 memory_region_transaction_begin();
1083 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1084 memory_region_update_pending |= mr->enabled;
1085 memory_region_transaction_commit();
1086 }
1087
1088 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1089 hwaddr size, unsigned client)
1090 {
1091 assert(mr->terminates);
1092 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1093 1 << client);
1094 }
1095
1096 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1097 hwaddr size)
1098 {
1099 assert(mr->terminates);
1100 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1101 }
1102
1103 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1104 hwaddr size, unsigned client)
1105 {
1106 bool ret;
1107 assert(mr->terminates);
1108 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1109 1 << client);
1110 if (ret) {
1111 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1112 mr->ram_addr + addr + size,
1113 1 << client);
1114 }
1115 return ret;
1116 }
1117
1118
1119 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1120 {
1121 AddressSpace *as;
1122 FlatRange *fr;
1123
1124 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1125 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1126 if (fr->mr == mr) {
1127 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1128 }
1129 }
1130 }
1131 }
1132
1133 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1134 {
1135 if (mr->readonly != readonly) {
1136 memory_region_transaction_begin();
1137 mr->readonly = readonly;
1138 memory_region_update_pending |= mr->enabled;
1139 memory_region_transaction_commit();
1140 }
1141 }
1142
1143 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1144 {
1145 if (mr->romd_mode != romd_mode) {
1146 memory_region_transaction_begin();
1147 mr->romd_mode = romd_mode;
1148 memory_region_update_pending |= mr->enabled;
1149 memory_region_transaction_commit();
1150 }
1151 }
1152
1153 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1154 hwaddr size, unsigned client)
1155 {
1156 assert(mr->terminates);
1157 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1158 mr->ram_addr + addr + size,
1159 1 << client);
1160 }
1161
1162 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1163 {
1164 if (mr->alias) {
1165 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1166 }
1167
1168 assert(mr->terminates);
1169
1170 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1171 }
1172
1173 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1174 {
1175 FlatRange *fr;
1176 CoalescedMemoryRange *cmr;
1177 AddrRange tmp;
1178 MemoryRegionSection section;
1179
1180 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1181 if (fr->mr == mr) {
1182 section = (MemoryRegionSection) {
1183 .address_space = as,
1184 .offset_within_address_space = int128_get64(fr->addr.start),
1185 .size = int128_get64(fr->addr.size),
1186 };
1187
1188 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1189 int128_get64(fr->addr.start),
1190 int128_get64(fr->addr.size));
1191 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1192 tmp = addrrange_shift(cmr->addr,
1193 int128_sub(fr->addr.start,
1194 int128_make64(fr->offset_in_region)));
1195 if (!addrrange_intersects(tmp, fr->addr)) {
1196 continue;
1197 }
1198 tmp = addrrange_intersection(tmp, fr->addr);
1199 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1200 int128_get64(tmp.start),
1201 int128_get64(tmp.size));
1202 }
1203 }
1204 }
1205 }
1206
1207 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1208 {
1209 AddressSpace *as;
1210
1211 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1212 memory_region_update_coalesced_range_as(mr, as);
1213 }
1214 }
1215
1216 void memory_region_set_coalescing(MemoryRegion *mr)
1217 {
1218 memory_region_clear_coalescing(mr);
1219 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1220 }
1221
1222 void memory_region_add_coalescing(MemoryRegion *mr,
1223 hwaddr offset,
1224 uint64_t size)
1225 {
1226 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1227
1228 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1229 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1230 memory_region_update_coalesced_range(mr);
1231 memory_region_set_flush_coalesced(mr);
1232 }
1233
1234 void memory_region_clear_coalescing(MemoryRegion *mr)
1235 {
1236 CoalescedMemoryRange *cmr;
1237
1238 qemu_flush_coalesced_mmio_buffer();
1239 mr->flush_coalesced_mmio = false;
1240
1241 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1242 cmr = QTAILQ_FIRST(&mr->coalesced);
1243 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1244 g_free(cmr);
1245 }
1246 memory_region_update_coalesced_range(mr);
1247 }
1248
1249 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1250 {
1251 mr->flush_coalesced_mmio = true;
1252 }
1253
1254 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1255 {
1256 qemu_flush_coalesced_mmio_buffer();
1257 if (QTAILQ_EMPTY(&mr->coalesced)) {
1258 mr->flush_coalesced_mmio = false;
1259 }
1260 }
1261
1262 void memory_region_add_eventfd(MemoryRegion *mr,
1263 hwaddr addr,
1264 unsigned size,
1265 bool match_data,
1266 uint64_t data,
1267 EventNotifier *e)
1268 {
1269 MemoryRegionIoeventfd mrfd = {
1270 .addr.start = int128_make64(addr),
1271 .addr.size = int128_make64(size),
1272 .match_data = match_data,
1273 .data = data,
1274 .e = e,
1275 };
1276 unsigned i;
1277
1278 adjust_endianness(mr, &mrfd.data, size);
1279 memory_region_transaction_begin();
1280 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1281 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1282 break;
1283 }
1284 }
1285 ++mr->ioeventfd_nb;
1286 mr->ioeventfds = g_realloc(mr->ioeventfds,
1287 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1288 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1289 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1290 mr->ioeventfds[i] = mrfd;
1291 memory_region_update_pending |= mr->enabled;
1292 memory_region_transaction_commit();
1293 }
1294
1295 void memory_region_del_eventfd(MemoryRegion *mr,
1296 hwaddr addr,
1297 unsigned size,
1298 bool match_data,
1299 uint64_t data,
1300 EventNotifier *e)
1301 {
1302 MemoryRegionIoeventfd mrfd = {
1303 .addr.start = int128_make64(addr),
1304 .addr.size = int128_make64(size),
1305 .match_data = match_data,
1306 .data = data,
1307 .e = e,
1308 };
1309 unsigned i;
1310
1311 adjust_endianness(mr, &mrfd.data, size);
1312 memory_region_transaction_begin();
1313 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1314 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1315 break;
1316 }
1317 }
1318 assert(i != mr->ioeventfd_nb);
1319 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1320 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1321 --mr->ioeventfd_nb;
1322 mr->ioeventfds = g_realloc(mr->ioeventfds,
1323 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1324 memory_region_update_pending |= mr->enabled;
1325 memory_region_transaction_commit();
1326 }
1327
1328 static void memory_region_add_subregion_common(MemoryRegion *mr,
1329 hwaddr offset,
1330 MemoryRegion *subregion)
1331 {
1332 MemoryRegion *other;
1333
1334 memory_region_transaction_begin();
1335
1336 assert(!subregion->parent);
1337 subregion->parent = mr;
1338 subregion->addr = offset;
1339 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1340 if (subregion->may_overlap || other->may_overlap) {
1341 continue;
1342 }
1343 if (int128_ge(int128_make64(offset),
1344 int128_add(int128_make64(other->addr), other->size))
1345 || int128_le(int128_add(int128_make64(offset), subregion->size),
1346 int128_make64(other->addr))) {
1347 continue;
1348 }
1349 #if 0
1350 printf("warning: subregion collision %llx/%llx (%s) "
1351 "vs %llx/%llx (%s)\n",
1352 (unsigned long long)offset,
1353 (unsigned long long)int128_get64(subregion->size),
1354 subregion->name,
1355 (unsigned long long)other->addr,
1356 (unsigned long long)int128_get64(other->size),
1357 other->name);
1358 #endif
1359 }
1360 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1361 if (subregion->priority >= other->priority) {
1362 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1363 goto done;
1364 }
1365 }
1366 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1367 done:
1368 memory_region_update_pending |= mr->enabled && subregion->enabled;
1369 memory_region_transaction_commit();
1370 }
1371
1372
1373 void memory_region_add_subregion(MemoryRegion *mr,
1374 hwaddr offset,
1375 MemoryRegion *subregion)
1376 {
1377 subregion->may_overlap = false;
1378 subregion->priority = 0;
1379 memory_region_add_subregion_common(mr, offset, subregion);
1380 }
1381
1382 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1383 hwaddr offset,
1384 MemoryRegion *subregion,
1385 unsigned priority)
1386 {
1387 subregion->may_overlap = true;
1388 subregion->priority = priority;
1389 memory_region_add_subregion_common(mr, offset, subregion);
1390 }
1391
1392 void memory_region_del_subregion(MemoryRegion *mr,
1393 MemoryRegion *subregion)
1394 {
1395 memory_region_transaction_begin();
1396 assert(subregion->parent == mr);
1397 subregion->parent = NULL;
1398 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1399 memory_region_update_pending |= mr->enabled && subregion->enabled;
1400 memory_region_transaction_commit();
1401 }
1402
1403 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1404 {
1405 if (enabled == mr->enabled) {
1406 return;
1407 }
1408 memory_region_transaction_begin();
1409 mr->enabled = enabled;
1410 memory_region_update_pending = true;
1411 memory_region_transaction_commit();
1412 }
1413
1414 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1415 {
1416 MemoryRegion *parent = mr->parent;
1417 unsigned priority = mr->priority;
1418 bool may_overlap = mr->may_overlap;
1419
1420 if (addr == mr->addr || !parent) {
1421 mr->addr = addr;
1422 return;
1423 }
1424
1425 memory_region_transaction_begin();
1426 memory_region_del_subregion(parent, mr);
1427 if (may_overlap) {
1428 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1429 } else {
1430 memory_region_add_subregion(parent, addr, mr);
1431 }
1432 memory_region_transaction_commit();
1433 }
1434
1435 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1436 {
1437 assert(mr->alias);
1438
1439 if (offset == mr->alias_offset) {
1440 return;
1441 }
1442
1443 memory_region_transaction_begin();
1444 mr->alias_offset = offset;
1445 memory_region_update_pending |= mr->enabled;
1446 memory_region_transaction_commit();
1447 }
1448
1449 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1450 {
1451 return mr->ram_addr;
1452 }
1453
1454 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1455 {
1456 const AddrRange *addr = addr_;
1457 const FlatRange *fr = fr_;
1458
1459 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1460 return -1;
1461 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1462 return 1;
1463 }
1464 return 0;
1465 }
1466
1467 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1468 {
1469 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
1470 sizeof(FlatRange), cmp_flatrange_addr);
1471 }
1472
1473 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1474 hwaddr addr, uint64_t size)
1475 {
1476 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1477 MemoryRegion *root;
1478 AddressSpace *as;
1479 AddrRange range;
1480 FlatRange *fr;
1481
1482 addr += mr->addr;
1483 for (root = mr; root->parent; ) {
1484 root = root->parent;
1485 addr += root->addr;
1486 }
1487
1488 as = memory_region_to_address_space(root);
1489 range = addrrange_make(int128_make64(addr), int128_make64(size));
1490 fr = address_space_lookup(as, range);
1491 if (!fr) {
1492 return ret;
1493 }
1494
1495 while (fr > as->current_map->ranges
1496 && addrrange_intersects(fr[-1].addr, range)) {
1497 --fr;
1498 }
1499
1500 ret.mr = fr->mr;
1501 ret.address_space = as;
1502 range = addrrange_intersection(range, fr->addr);
1503 ret.offset_within_region = fr->offset_in_region;
1504 ret.offset_within_region += int128_get64(int128_sub(range.start,
1505 fr->addr.start));
1506 ret.size = int128_get64(range.size);
1507 ret.offset_within_address_space = int128_get64(range.start);
1508 ret.readonly = fr->readonly;
1509 return ret;
1510 }
1511
1512 void address_space_sync_dirty_bitmap(AddressSpace *as)
1513 {
1514 FlatRange *fr;
1515
1516 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1517 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1518 }
1519 }
1520
1521 void memory_global_dirty_log_start(void)
1522 {
1523 global_dirty_log = true;
1524 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1525 }
1526
1527 void memory_global_dirty_log_stop(void)
1528 {
1529 global_dirty_log = false;
1530 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1531 }
1532
1533 static void listener_add_address_space(MemoryListener *listener,
1534 AddressSpace *as)
1535 {
1536 FlatRange *fr;
1537
1538 if (listener->address_space_filter
1539 && listener->address_space_filter != as) {
1540 return;
1541 }
1542
1543 if (global_dirty_log) {
1544 if (listener->log_global_start) {
1545 listener->log_global_start(listener);
1546 }
1547 }
1548
1549 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1550 MemoryRegionSection section = {
1551 .mr = fr->mr,
1552 .address_space = as,
1553 .offset_within_region = fr->offset_in_region,
1554 .size = int128_get64(fr->addr.size),
1555 .offset_within_address_space = int128_get64(fr->addr.start),
1556 .readonly = fr->readonly,
1557 };
1558 if (listener->region_add) {
1559 listener->region_add(listener, &section);
1560 }
1561 }
1562 }
1563
1564 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1565 {
1566 MemoryListener *other = NULL;
1567 AddressSpace *as;
1568
1569 listener->address_space_filter = filter;
1570 if (QTAILQ_EMPTY(&memory_listeners)
1571 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1572 memory_listeners)->priority) {
1573 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1574 } else {
1575 QTAILQ_FOREACH(other, &memory_listeners, link) {
1576 if (listener->priority < other->priority) {
1577 break;
1578 }
1579 }
1580 QTAILQ_INSERT_BEFORE(other, listener, link);
1581 }
1582
1583 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1584 listener_add_address_space(listener, as);
1585 }
1586 }
1587
1588 void memory_listener_unregister(MemoryListener *listener)
1589 {
1590 QTAILQ_REMOVE(&memory_listeners, listener, link);
1591 }
1592
1593 void address_space_init(AddressSpace *as, MemoryRegion *root)
1594 {
1595 memory_region_transaction_begin();
1596 as->root = root;
1597 as->current_map = g_new(FlatView, 1);
1598 flatview_init(as->current_map);
1599 as->ioeventfd_nb = 0;
1600 as->ioeventfds = NULL;
1601 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1602 as->name = NULL;
1603 address_space_init_dispatch(as);
1604 memory_region_update_pending |= root->enabled;
1605 memory_region_transaction_commit();
1606 }
1607
1608 void address_space_destroy(AddressSpace *as)
1609 {
1610 /* Flush out anything from MemoryListeners listening in on this */
1611 memory_region_transaction_begin();
1612 as->root = NULL;
1613 memory_region_transaction_commit();
1614 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1615 address_space_destroy_dispatch(as);
1616 flatview_destroy(as->current_map);
1617 g_free(as->current_map);
1618 g_free(as->ioeventfds);
1619 }
1620
1621 uint64_t io_mem_read(MemoryRegion *mr, hwaddr addr, unsigned size)
1622 {
1623 return memory_region_dispatch_read(mr, addr, size);
1624 }
1625
1626 void io_mem_write(MemoryRegion *mr, hwaddr addr,
1627 uint64_t val, unsigned size)
1628 {
1629 memory_region_dispatch_write(mr, addr, val, size);
1630 }
1631
1632 typedef struct MemoryRegionList MemoryRegionList;
1633
1634 struct MemoryRegionList {
1635 const MemoryRegion *mr;
1636 bool printed;
1637 QTAILQ_ENTRY(MemoryRegionList) queue;
1638 };
1639
1640 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1641
1642 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1643 const MemoryRegion *mr, unsigned int level,
1644 hwaddr base,
1645 MemoryRegionListHead *alias_print_queue)
1646 {
1647 MemoryRegionList *new_ml, *ml, *next_ml;
1648 MemoryRegionListHead submr_print_queue;
1649 const MemoryRegion *submr;
1650 unsigned int i;
1651
1652 if (!mr || !mr->enabled) {
1653 return;
1654 }
1655
1656 for (i = 0; i < level; i++) {
1657 mon_printf(f, " ");
1658 }
1659
1660 if (mr->alias) {
1661 MemoryRegionList *ml;
1662 bool found = false;
1663
1664 /* check if the alias is already in the queue */
1665 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1666 if (ml->mr == mr->alias && !ml->printed) {
1667 found = true;
1668 }
1669 }
1670
1671 if (!found) {
1672 ml = g_new(MemoryRegionList, 1);
1673 ml->mr = mr->alias;
1674 ml->printed = false;
1675 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1676 }
1677 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1678 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1679 "-" TARGET_FMT_plx "\n",
1680 base + mr->addr,
1681 base + mr->addr
1682 + (hwaddr)int128_get64(mr->size) - 1,
1683 mr->priority,
1684 mr->romd_mode ? 'R' : '-',
1685 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1686 : '-',
1687 mr->name,
1688 mr->alias->name,
1689 mr->alias_offset,
1690 mr->alias_offset
1691 + (hwaddr)int128_get64(mr->size) - 1);
1692 } else {
1693 mon_printf(f,
1694 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1695 base + mr->addr,
1696 base + mr->addr
1697 + (hwaddr)int128_get64(mr->size) - 1,
1698 mr->priority,
1699 mr->romd_mode ? 'R' : '-',
1700 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1701 : '-',
1702 mr->name);
1703 }
1704
1705 QTAILQ_INIT(&submr_print_queue);
1706
1707 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1708 new_ml = g_new(MemoryRegionList, 1);
1709 new_ml->mr = submr;
1710 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1711 if (new_ml->mr->addr < ml->mr->addr ||
1712 (new_ml->mr->addr == ml->mr->addr &&
1713 new_ml->mr->priority > ml->mr->priority)) {
1714 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1715 new_ml = NULL;
1716 break;
1717 }
1718 }
1719 if (new_ml) {
1720 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1721 }
1722 }
1723
1724 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1725 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1726 alias_print_queue);
1727 }
1728
1729 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1730 g_free(ml);
1731 }
1732 }
1733
1734 void mtree_info(fprintf_function mon_printf, void *f)
1735 {
1736 MemoryRegionListHead ml_head;
1737 MemoryRegionList *ml, *ml2;
1738 AddressSpace *as;
1739
1740 QTAILQ_INIT(&ml_head);
1741
1742 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1743 if (!as->name) {
1744 continue;
1745 }
1746 mon_printf(f, "%s\n", as->name);
1747 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1748 }
1749
1750 mon_printf(f, "aliases\n");
1751 /* print aliased regions */
1752 QTAILQ_FOREACH(ml, &ml_head, queue) {
1753 if (!ml->printed) {
1754 mon_printf(f, "%s\n", ml->mr->name);
1755 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1756 }
1757 }
1758
1759 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1760 g_free(ml);
1761 }
1762 }
AR7 emulation for QEMU