4 * Copyright IBM, Corp. 2008
8 * Anthony Liguori <aliguori@us.ibm.com>
9 * Glauber Costa <gcosta@redhat.com>
11 * Copyright (c) 2011 Intel Corporation
13 * Jiang Yunhong<yunhong.jiang@intel.com>
14 * Xin Xiaohui<xiaohui.xin@intel.com>
15 * Zhang Xiantao<xiantao.zhang@intel.com>
17 * This work is licensed under the terms of the GNU GPL, version 2 or later.
18 * See the COPYING file in the top-level directory.
23 * HAX common code for both windows and darwin
26 #include "qemu/osdep.h"
28 #include "exec/address-spaces.h"
29 #include "exec/exec-all.h"
30 #include "exec/ioport.h"
32 #include "qemu-common.h"
35 #include "sysemu/accel.h"
36 #include "sysemu/sysemu.h"
37 #include "qemu/main-loop.h"
38 #include "hw/boards.h"
42 #define DPRINTF(fmt, ...) \
45 fprintf(stdout, fmt, ## __VA_ARGS__); \
50 const uint32_t hax_cur_version
= 0x4; /* API v4: unmapping and MMIO moves */
51 /* Minimum HAX kernel version */
52 const uint32_t hax_min_version
= 0x4; /* API v4: supports unmapping */
54 static bool hax_allowed
;
56 struct hax_state hax_global
;
58 static void hax_vcpu_sync_state(CPUArchState
*env
, int modified
);
59 static int hax_arch_get_registers(CPUArchState
*env
);
66 int valid_hax_tunnel_size(uint16_t size
)
68 return size
>= sizeof(struct hax_tunnel
);
71 hax_fd
hax_vcpu_get_fd(CPUArchState
*env
)
73 struct hax_vcpu_state
*vcpu
= ENV_GET_CPU(env
)->hax_vcpu
;
75 return HAX_INVALID_FD
;
80 static int hax_get_capability(struct hax_state
*hax
)
83 struct hax_capabilityinfo capinfo
, *cap
= &capinfo
;
85 ret
= hax_capability(hax
, cap
);
90 if ((cap
->wstatus
& HAX_CAP_WORKSTATUS_MASK
) == HAX_CAP_STATUS_NOTWORKING
) {
91 if (cap
->winfo
& HAX_CAP_FAILREASON_VT
) {
93 ("VTX feature is not enabled, HAX driver will not work.\n");
94 } else if (cap
->winfo
& HAX_CAP_FAILREASON_NX
) {
96 ("NX feature is not enabled, HAX driver will not work.\n");
102 if (!(cap
->winfo
& HAX_CAP_UG
)) {
103 fprintf(stderr
, "UG mode is not supported by the hardware.\n");
107 if (cap
->wstatus
& HAX_CAP_MEMQUOTA
) {
108 if (cap
->mem_quota
< hax
->mem_quota
) {
109 fprintf(stderr
, "The VM memory needed exceeds the driver limit.\n");
116 static int hax_version_support(struct hax_state
*hax
)
119 struct hax_module_version version
;
121 ret
= hax_mod_version(hax
, &version
);
126 if (hax_min_version
> version
.cur_version
) {
127 fprintf(stderr
, "Incompatible HAX module version %d,",
128 version
.cur_version
);
129 fprintf(stderr
, "requires minimum version %d\n", hax_min_version
);
132 if (hax_cur_version
< version
.compat_version
) {
133 fprintf(stderr
, "Incompatible QEMU HAX API version %x,",
135 fprintf(stderr
, "requires minimum HAX API version %x\n",
136 version
.compat_version
);
143 int hax_vcpu_create(int id
)
145 struct hax_vcpu_state
*vcpu
= NULL
;
148 if (!hax_global
.vm
) {
149 fprintf(stderr
, "vcpu %x created failed, vm is null\n", id
);
153 if (hax_global
.vm
->vcpus
[id
]) {
154 fprintf(stderr
, "vcpu %x allocated already\n", id
);
158 vcpu
= g_malloc(sizeof(struct hax_vcpu_state
));
160 fprintf(stderr
, "Failed to alloc vcpu state\n");
164 memset(vcpu
, 0, sizeof(struct hax_vcpu_state
));
166 ret
= hax_host_create_vcpu(hax_global
.vm
->fd
, id
);
168 fprintf(stderr
, "Failed to create vcpu %x\n", id
);
173 vcpu
->fd
= hax_host_open_vcpu(hax_global
.vm
->id
, id
);
174 if (hax_invalid_fd(vcpu
->fd
)) {
175 fprintf(stderr
, "Failed to open the vcpu\n");
180 hax_global
.vm
->vcpus
[id
] = vcpu
;
182 ret
= hax_host_setup_vcpu_channel(vcpu
);
184 fprintf(stderr
, "Invalid hax tunnel size\n");
191 /* vcpu and tunnel will be closed automatically */
192 if (vcpu
&& !hax_invalid_fd(vcpu
->fd
)) {
193 hax_close_fd(vcpu
->fd
);
196 hax_global
.vm
->vcpus
[id
] = NULL
;
201 int hax_vcpu_destroy(CPUState
*cpu
)
203 struct hax_vcpu_state
*vcpu
= cpu
->hax_vcpu
;
205 if (!hax_global
.vm
) {
206 fprintf(stderr
, "vcpu %x destroy failed, vm is null\n", vcpu
->vcpu_id
);
215 * 1. The hax_tunnel is also destroied when vcpu destroy
216 * 2. close fd will cause hax module vcpu be cleaned
218 hax_close_fd(vcpu
->fd
);
219 hax_global
.vm
->vcpus
[vcpu
->vcpu_id
] = NULL
;
224 int hax_init_vcpu(CPUState
*cpu
)
228 ret
= hax_vcpu_create(cpu
->cpu_index
);
230 fprintf(stderr
, "Failed to create HAX vcpu\n");
234 cpu
->hax_vcpu
= hax_global
.vm
->vcpus
[cpu
->cpu_index
];
235 cpu
->vcpu_dirty
= true;
236 qemu_register_reset(hax_reset_vcpu_state
, (CPUArchState
*) (cpu
->env_ptr
));
241 struct hax_vm
*hax_vm_create(struct hax_state
*hax
)
246 if (hax_invalid_fd(hax
->fd
)) {
254 vm
= g_malloc(sizeof(struct hax_vm
));
258 memset(vm
, 0, sizeof(struct hax_vm
));
259 ret
= hax_host_create_vm(hax
, &vm_id
);
261 fprintf(stderr
, "Failed to create vm %x\n", ret
);
265 vm
->fd
= hax_host_open_vm(hax
, vm_id
);
266 if (hax_invalid_fd(vm
->fd
)) {
267 fprintf(stderr
, "Failed to open vm %d\n", vm_id
);
280 int hax_vm_destroy(struct hax_vm
*vm
)
284 for (i
= 0; i
< HAX_MAX_VCPU
; i
++)
286 fprintf(stderr
, "VCPU should be cleaned before vm clean\n");
289 hax_close_fd(vm
->fd
);
291 hax_global
.vm
= NULL
;
295 static void hax_handle_interrupt(CPUState
*cpu
, int mask
)
297 cpu
->interrupt_request
|= mask
;
299 if (!qemu_cpu_is_self(cpu
)) {
304 static int hax_init(ram_addr_t ram_size
)
306 struct hax_state
*hax
= NULL
;
307 struct hax_qemu_version qversion
;
312 memset(hax
, 0, sizeof(struct hax_state
));
313 hax
->mem_quota
= ram_size
;
315 hax
->fd
= hax_mod_open();
316 if (hax_invalid_fd(hax
->fd
)) {
322 ret
= hax_get_capability(hax
);
325 if (ret
!= -ENOSPC
) {
331 if (!hax_version_support(hax
)) {
336 hax
->vm
= hax_vm_create(hax
);
338 fprintf(stderr
, "Failed to create HAX VM\n");
345 qversion
.cur_version
= hax_cur_version
;
346 qversion
.min_version
= hax_min_version
;
347 hax_notify_qemu_version(hax
->vm
->fd
, &qversion
);
348 cpu_interrupt_handler
= hax_handle_interrupt
;
353 hax_vm_destroy(hax
->vm
);
362 static int hax_accel_init(MachineState
*ms
)
364 int ret
= hax_init(ms
->ram_size
);
366 if (ret
&& (ret
!= -ENOSPC
)) {
367 fprintf(stderr
, "No accelerator found.\n");
369 fprintf(stdout
, "HAX is %s and emulator runs in %s mode.\n",
370 !ret
? "working" : "not working",
371 !ret
? "fast virt" : "emulation");
376 static int hax_handle_fastmmio(CPUArchState
*env
, struct hax_fastmmio
*hft
)
378 if (hft
->direction
< 2) {
379 cpu_physical_memory_rw(hft
->gpa
, (uint8_t *) &hft
->value
, hft
->size
,
383 * HAX API v4 supports transferring data between two MMIO addresses,
384 * hft->gpa and hft->gpa2 (instructions such as MOVS require this):
385 * hft->direction == 2: gpa ==> gpa2
388 cpu_physical_memory_rw(hft
->gpa
, (uint8_t *) &value
, hft
->size
, 0);
389 cpu_physical_memory_rw(hft
->gpa2
, (uint8_t *) &value
, hft
->size
, 1);
395 static int hax_handle_io(CPUArchState
*env
, uint32_t df
, uint16_t port
,
396 int direction
, int size
, int count
, void *buffer
)
400 MemTxAttrs attrs
= { 0 };
403 ptr
= (uint8_t *) buffer
;
405 ptr
= buffer
+ size
* count
- size
;
407 for (i
= 0; i
< count
; i
++) {
408 address_space_rw(&address_space_io
, port
, attrs
,
409 ptr
, size
, direction
== HAX_EXIT_IO_OUT
);
420 static int hax_vcpu_interrupt(CPUArchState
*env
)
422 CPUState
*cpu
= ENV_GET_CPU(env
);
423 struct hax_vcpu_state
*vcpu
= cpu
->hax_vcpu
;
424 struct hax_tunnel
*ht
= vcpu
->tunnel
;
427 * Try to inject an interrupt if the guest can accept it
428 * Unlike KVM, HAX kernel check for the eflags, instead of qemu
430 if (ht
->ready_for_interrupt_injection
&&
431 (cpu
->interrupt_request
& CPU_INTERRUPT_HARD
)) {
434 irq
= cpu_get_pic_interrupt(env
);
436 hax_inject_interrupt(env
, irq
);
437 cpu
->interrupt_request
&= ~CPU_INTERRUPT_HARD
;
441 /* If we have an interrupt but the guest is not ready to receive an
442 * interrupt, request an interrupt window exit. This will
443 * cause a return to userspace as soon as the guest is ready to
444 * receive interrupts. */
445 if ((cpu
->interrupt_request
& CPU_INTERRUPT_HARD
)) {
446 ht
->request_interrupt_window
= 1;
448 ht
->request_interrupt_window
= 0;
453 void hax_raise_event(CPUState
*cpu
)
455 struct hax_vcpu_state
*vcpu
= cpu
->hax_vcpu
;
460 vcpu
->tunnel
->user_event_pending
= 1;
464 * Ask hax kernel module to run the CPU for us till:
465 * 1. Guest crash or shutdown
466 * 2. Need QEMU's emulation like guest execute MMIO instruction
467 * 3. Guest execute HLT
468 * 4. QEMU have Signal/event pending
469 * 5. An unknown VMX exit happens
471 static int hax_vcpu_hax_exec(CPUArchState
*env
)
474 CPUState
*cpu
= ENV_GET_CPU(env
);
475 X86CPU
*x86_cpu
= X86_CPU(cpu
);
476 struct hax_vcpu_state
*vcpu
= cpu
->hax_vcpu
;
477 struct hax_tunnel
*ht
= vcpu
->tunnel
;
479 if (!hax_enabled()) {
480 DPRINTF("Trying to vcpu execute at eip:" TARGET_FMT_lx
"\n", env
->eip
);
486 if (cpu
->interrupt_request
& CPU_INTERRUPT_POLL
) {
487 cpu
->interrupt_request
&= ~CPU_INTERRUPT_POLL
;
488 apic_poll_irq(x86_cpu
->apic_state
);
491 if (cpu
->interrupt_request
& CPU_INTERRUPT_INIT
) {
492 DPRINTF("\nhax_vcpu_hax_exec: handling INIT for %d\n",
494 do_cpu_init(x86_cpu
);
495 hax_vcpu_sync_state(env
, 1);
498 if (cpu
->interrupt_request
& CPU_INTERRUPT_SIPI
) {
499 DPRINTF("hax_vcpu_hax_exec: handling SIPI for %d\n",
501 hax_vcpu_sync_state(env
, 0);
502 do_cpu_sipi(x86_cpu
);
503 hax_vcpu_sync_state(env
, 1);
509 if (cpu
->exit_request
) {
514 hax_vcpu_interrupt(env
);
516 qemu_mutex_unlock_iothread();
518 hax_ret
= hax_vcpu_run(vcpu
);
520 qemu_mutex_lock_iothread();
522 /* Simply continue the vcpu_run if system call interrupted */
523 if (hax_ret
== -EINTR
|| hax_ret
== -EAGAIN
) {
524 DPRINTF("io window interrupted\n");
529 fprintf(stderr
, "vcpu run failed for vcpu %x\n", vcpu
->vcpu_id
);
532 switch (ht
->_exit_status
) {
534 ret
= hax_handle_io(env
, ht
->pio
._df
, ht
->pio
._port
,
536 ht
->pio
._size
, ht
->pio
._count
, vcpu
->iobuf
);
538 case HAX_EXIT_FAST_MMIO
:
539 ret
= hax_handle_fastmmio(env
, (struct hax_fastmmio
*) vcpu
->iobuf
);
541 /* Guest state changed, currently only for shutdown */
542 case HAX_EXIT_STATECHANGE
:
543 fprintf(stdout
, "VCPU shutdown request\n");
544 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN
);
545 hax_vcpu_sync_state(env
, 0);
548 case HAX_EXIT_UNKNOWN_VMEXIT
:
549 fprintf(stderr
, "Unknown VMX exit %x from guest\n",
551 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET
);
552 hax_vcpu_sync_state(env
, 0);
553 cpu_dump_state(cpu
, stderr
, fprintf
, 0);
557 if (!(cpu
->interrupt_request
& CPU_INTERRUPT_HARD
) &&
558 !(cpu
->interrupt_request
& CPU_INTERRUPT_NMI
)) {
559 /* hlt instruction with interrupt disabled is shutdown */
560 env
->eflags
|= IF_MASK
;
562 cpu
->exception_index
= EXCP_HLT
;
566 /* these situations will continue to hax module */
567 case HAX_EXIT_INTERRUPT
:
568 case HAX_EXIT_PAUSED
:
571 /* Should not happen on UG system */
572 fprintf(stderr
, "HAX: unsupported MMIO emulation\n");
576 /* Should not happen on UG system */
577 fprintf(stderr
, "HAX: unimplemented real mode emulation\n");
581 fprintf(stderr
, "Unknown exit %x from HAX\n", ht
->_exit_status
);
582 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET
);
583 hax_vcpu_sync_state(env
, 0);
584 cpu_dump_state(cpu
, stderr
, fprintf
, 0);
590 if (cpu
->exit_request
) {
591 cpu
->exit_request
= 0;
592 cpu
->exception_index
= EXCP_INTERRUPT
;
597 static void do_hax_cpu_synchronize_state(CPUState
*cpu
, run_on_cpu_data arg
)
599 CPUArchState
*env
= cpu
->env_ptr
;
601 hax_arch_get_registers(env
);
602 cpu
->vcpu_dirty
= true;
605 void hax_cpu_synchronize_state(CPUState
*cpu
)
607 if (!cpu
->vcpu_dirty
) {
608 run_on_cpu(cpu
, do_hax_cpu_synchronize_state
, RUN_ON_CPU_NULL
);
612 static void do_hax_cpu_synchronize_post_reset(CPUState
*cpu
,
615 CPUArchState
*env
= cpu
->env_ptr
;
617 hax_vcpu_sync_state(env
, 1);
618 cpu
->vcpu_dirty
= false;
621 void hax_cpu_synchronize_post_reset(CPUState
*cpu
)
623 run_on_cpu(cpu
, do_hax_cpu_synchronize_post_reset
, RUN_ON_CPU_NULL
);
626 static void do_hax_cpu_synchronize_post_init(CPUState
*cpu
, run_on_cpu_data arg
)
628 CPUArchState
*env
= cpu
->env_ptr
;
630 hax_vcpu_sync_state(env
, 1);
631 cpu
->vcpu_dirty
= false;
634 void hax_cpu_synchronize_post_init(CPUState
*cpu
)
636 run_on_cpu(cpu
, do_hax_cpu_synchronize_post_init
, RUN_ON_CPU_NULL
);
639 static void do_hax_cpu_synchronize_pre_loadvm(CPUState
*cpu
, run_on_cpu_data arg
)
641 cpu
->vcpu_dirty
= true;
644 void hax_cpu_synchronize_pre_loadvm(CPUState
*cpu
)
646 run_on_cpu(cpu
, do_hax_cpu_synchronize_pre_loadvm
, RUN_ON_CPU_NULL
);
649 int hax_smp_cpu_exec(CPUState
*cpu
)
651 CPUArchState
*env
= (CPUArchState
*) (cpu
->env_ptr
);
656 if (cpu
->exception_index
>= EXCP_INTERRUPT
) {
657 ret
= cpu
->exception_index
;
658 cpu
->exception_index
= -1;
662 fatal
= hax_vcpu_hax_exec(env
);
665 fprintf(stderr
, "Unsupported HAX vcpu return\n");
673 static void set_v8086_seg(struct segment_desc_t
*lhs
, const SegmentCache
*rhs
)
675 memset(lhs
, 0, sizeof(struct segment_desc_t
));
676 lhs
->selector
= rhs
->selector
;
677 lhs
->base
= rhs
->base
;
678 lhs
->limit
= rhs
->limit
;
682 lhs
->operand_size
= 0;
685 lhs
->granularity
= 0;
689 static void get_seg(SegmentCache
*lhs
, const struct segment_desc_t
*rhs
)
691 lhs
->selector
= rhs
->selector
;
692 lhs
->base
= rhs
->base
;
693 lhs
->limit
= rhs
->limit
;
694 lhs
->flags
= (rhs
->type
<< DESC_TYPE_SHIFT
)
695 | (rhs
->present
* DESC_P_MASK
)
696 | (rhs
->dpl
<< DESC_DPL_SHIFT
)
697 | (rhs
->operand_size
<< DESC_B_SHIFT
)
698 | (rhs
->desc
* DESC_S_MASK
)
699 | (rhs
->long_mode
<< DESC_L_SHIFT
)
700 | (rhs
->granularity
* DESC_G_MASK
) | (rhs
->available
* DESC_AVL_MASK
);
703 static void set_seg(struct segment_desc_t
*lhs
, const SegmentCache
*rhs
)
705 unsigned flags
= rhs
->flags
;
707 memset(lhs
, 0, sizeof(struct segment_desc_t
));
708 lhs
->selector
= rhs
->selector
;
709 lhs
->base
= rhs
->base
;
710 lhs
->limit
= rhs
->limit
;
711 lhs
->type
= (flags
>> DESC_TYPE_SHIFT
) & 15;
712 lhs
->present
= (flags
& DESC_P_MASK
) != 0;
713 lhs
->dpl
= rhs
->selector
& 3;
714 lhs
->operand_size
= (flags
>> DESC_B_SHIFT
) & 1;
715 lhs
->desc
= (flags
& DESC_S_MASK
) != 0;
716 lhs
->long_mode
= (flags
>> DESC_L_SHIFT
) & 1;
717 lhs
->granularity
= (flags
& DESC_G_MASK
) != 0;
718 lhs
->available
= (flags
& DESC_AVL_MASK
) != 0;
721 static void hax_getput_reg(uint64_t *hax_reg
, target_ulong
*qemu_reg
, int set
)
723 target_ulong reg
= *hax_reg
;
726 *hax_reg
= *qemu_reg
;
732 /* The sregs has been synced with HAX kernel already before this call */
733 static int hax_get_segments(CPUArchState
*env
, struct vcpu_state_t
*sregs
)
735 get_seg(&env
->segs
[R_CS
], &sregs
->_cs
);
736 get_seg(&env
->segs
[R_DS
], &sregs
->_ds
);
737 get_seg(&env
->segs
[R_ES
], &sregs
->_es
);
738 get_seg(&env
->segs
[R_FS
], &sregs
->_fs
);
739 get_seg(&env
->segs
[R_GS
], &sregs
->_gs
);
740 get_seg(&env
->segs
[R_SS
], &sregs
->_ss
);
742 get_seg(&env
->tr
, &sregs
->_tr
);
743 get_seg(&env
->ldt
, &sregs
->_ldt
);
744 env
->idt
.limit
= sregs
->_idt
.limit
;
745 env
->idt
.base
= sregs
->_idt
.base
;
746 env
->gdt
.limit
= sregs
->_gdt
.limit
;
747 env
->gdt
.base
= sregs
->_gdt
.base
;
751 static int hax_set_segments(CPUArchState
*env
, struct vcpu_state_t
*sregs
)
753 if ((env
->eflags
& VM_MASK
)) {
754 set_v8086_seg(&sregs
->_cs
, &env
->segs
[R_CS
]);
755 set_v8086_seg(&sregs
->_ds
, &env
->segs
[R_DS
]);
756 set_v8086_seg(&sregs
->_es
, &env
->segs
[R_ES
]);
757 set_v8086_seg(&sregs
->_fs
, &env
->segs
[R_FS
]);
758 set_v8086_seg(&sregs
->_gs
, &env
->segs
[R_GS
]);
759 set_v8086_seg(&sregs
->_ss
, &env
->segs
[R_SS
]);
761 set_seg(&sregs
->_cs
, &env
->segs
[R_CS
]);
762 set_seg(&sregs
->_ds
, &env
->segs
[R_DS
]);
763 set_seg(&sregs
->_es
, &env
->segs
[R_ES
]);
764 set_seg(&sregs
->_fs
, &env
->segs
[R_FS
]);
765 set_seg(&sregs
->_gs
, &env
->segs
[R_GS
]);
766 set_seg(&sregs
->_ss
, &env
->segs
[R_SS
]);
768 if (env
->cr
[0] & CR0_PE_MASK
) {
769 /* force ss cpl to cs cpl */
770 sregs
->_ss
.selector
= (sregs
->_ss
.selector
& ~3) |
771 (sregs
->_cs
.selector
& 3);
772 sregs
->_ss
.dpl
= sregs
->_ss
.selector
& 3;
776 set_seg(&sregs
->_tr
, &env
->tr
);
777 set_seg(&sregs
->_ldt
, &env
->ldt
);
778 sregs
->_idt
.limit
= env
->idt
.limit
;
779 sregs
->_idt
.base
= env
->idt
.base
;
780 sregs
->_gdt
.limit
= env
->gdt
.limit
;
781 sregs
->_gdt
.base
= env
->gdt
.base
;
785 static int hax_sync_vcpu_register(CPUArchState
*env
, int set
)
787 struct vcpu_state_t regs
;
789 memset(®s
, 0, sizeof(struct vcpu_state_t
));
792 ret
= hax_sync_vcpu_state(env
, ®s
, 0);
798 /* generic register */
799 hax_getput_reg(®s
._rax
, &env
->regs
[R_EAX
], set
);
800 hax_getput_reg(®s
._rbx
, &env
->regs
[R_EBX
], set
);
801 hax_getput_reg(®s
._rcx
, &env
->regs
[R_ECX
], set
);
802 hax_getput_reg(®s
._rdx
, &env
->regs
[R_EDX
], set
);
803 hax_getput_reg(®s
._rsi
, &env
->regs
[R_ESI
], set
);
804 hax_getput_reg(®s
._rdi
, &env
->regs
[R_EDI
], set
);
805 hax_getput_reg(®s
._rsp
, &env
->regs
[R_ESP
], set
);
806 hax_getput_reg(®s
._rbp
, &env
->regs
[R_EBP
], set
);
808 hax_getput_reg(®s
._r8
, &env
->regs
[8], set
);
809 hax_getput_reg(®s
._r9
, &env
->regs
[9], set
);
810 hax_getput_reg(®s
._r10
, &env
->regs
[10], set
);
811 hax_getput_reg(®s
._r11
, &env
->regs
[11], set
);
812 hax_getput_reg(®s
._r12
, &env
->regs
[12], set
);
813 hax_getput_reg(®s
._r13
, &env
->regs
[13], set
);
814 hax_getput_reg(®s
._r14
, &env
->regs
[14], set
);
815 hax_getput_reg(®s
._r15
, &env
->regs
[15], set
);
817 hax_getput_reg(®s
._rflags
, &env
->eflags
, set
);
818 hax_getput_reg(®s
._rip
, &env
->eip
, set
);
821 regs
._cr0
= env
->cr
[0];
822 regs
._cr2
= env
->cr
[2];
823 regs
._cr3
= env
->cr
[3];
824 regs
._cr4
= env
->cr
[4];
825 hax_set_segments(env
, ®s
);
827 env
->cr
[0] = regs
._cr0
;
828 env
->cr
[2] = regs
._cr2
;
829 env
->cr
[3] = regs
._cr3
;
830 env
->cr
[4] = regs
._cr4
;
831 hax_get_segments(env
, ®s
);
835 ret
= hax_sync_vcpu_state(env
, ®s
, 1);
843 static void hax_msr_entry_set(struct vmx_msr
*item
, uint32_t index
,
850 static int hax_get_msrs(CPUArchState
*env
)
852 struct hax_msr_data md
;
853 struct vmx_msr
*msrs
= md
.entries
;
857 msrs
[n
++].entry
= MSR_IA32_SYSENTER_CS
;
858 msrs
[n
++].entry
= MSR_IA32_SYSENTER_ESP
;
859 msrs
[n
++].entry
= MSR_IA32_SYSENTER_EIP
;
860 msrs
[n
++].entry
= MSR_IA32_TSC
;
862 msrs
[n
++].entry
= MSR_EFER
;
863 msrs
[n
++].entry
= MSR_STAR
;
864 msrs
[n
++].entry
= MSR_LSTAR
;
865 msrs
[n
++].entry
= MSR_CSTAR
;
866 msrs
[n
++].entry
= MSR_FMASK
;
867 msrs
[n
++].entry
= MSR_KERNELGSBASE
;
870 ret
= hax_sync_msr(env
, &md
, 0);
875 for (i
= 0; i
< md
.done
; i
++) {
876 switch (msrs
[i
].entry
) {
877 case MSR_IA32_SYSENTER_CS
:
878 env
->sysenter_cs
= msrs
[i
].value
;
880 case MSR_IA32_SYSENTER_ESP
:
881 env
->sysenter_esp
= msrs
[i
].value
;
883 case MSR_IA32_SYSENTER_EIP
:
884 env
->sysenter_eip
= msrs
[i
].value
;
887 env
->tsc
= msrs
[i
].value
;
891 env
->efer
= msrs
[i
].value
;
894 env
->star
= msrs
[i
].value
;
897 env
->lstar
= msrs
[i
].value
;
900 env
->cstar
= msrs
[i
].value
;
903 env
->fmask
= msrs
[i
].value
;
905 case MSR_KERNELGSBASE
:
906 env
->kernelgsbase
= msrs
[i
].value
;
915 static int hax_set_msrs(CPUArchState
*env
)
917 struct hax_msr_data md
;
918 struct vmx_msr
*msrs
;
922 memset(&md
, 0, sizeof(struct hax_msr_data
));
923 hax_msr_entry_set(&msrs
[n
++], MSR_IA32_SYSENTER_CS
, env
->sysenter_cs
);
924 hax_msr_entry_set(&msrs
[n
++], MSR_IA32_SYSENTER_ESP
, env
->sysenter_esp
);
925 hax_msr_entry_set(&msrs
[n
++], MSR_IA32_SYSENTER_EIP
, env
->sysenter_eip
);
926 hax_msr_entry_set(&msrs
[n
++], MSR_IA32_TSC
, env
->tsc
);
928 hax_msr_entry_set(&msrs
[n
++], MSR_EFER
, env
->efer
);
929 hax_msr_entry_set(&msrs
[n
++], MSR_STAR
, env
->star
);
930 hax_msr_entry_set(&msrs
[n
++], MSR_LSTAR
, env
->lstar
);
931 hax_msr_entry_set(&msrs
[n
++], MSR_CSTAR
, env
->cstar
);
932 hax_msr_entry_set(&msrs
[n
++], MSR_FMASK
, env
->fmask
);
933 hax_msr_entry_set(&msrs
[n
++], MSR_KERNELGSBASE
, env
->kernelgsbase
);
938 return hax_sync_msr(env
, &md
, 1);
941 static int hax_get_fpu(CPUArchState
*env
)
943 struct fx_layout fpu
;
946 ret
= hax_sync_fpu(env
, &fpu
, 0);
951 env
->fpstt
= (fpu
.fsw
>> 11) & 7;
954 for (i
= 0; i
< 8; ++i
) {
955 env
->fptags
[i
] = !((fpu
.ftw
>> i
) & 1);
957 memcpy(env
->fpregs
, fpu
.st_mm
, sizeof(env
->fpregs
));
959 for (i
= 0; i
< 8; i
++) {
960 env
->xmm_regs
[i
].ZMM_Q(0) = ldq_p(&fpu
.mmx_1
[i
][0]);
961 env
->xmm_regs
[i
].ZMM_Q(1) = ldq_p(&fpu
.mmx_1
[i
][8]);
962 if (CPU_NB_REGS
> 8) {
963 env
->xmm_regs
[i
+ 8].ZMM_Q(0) = ldq_p(&fpu
.mmx_2
[i
][0]);
964 env
->xmm_regs
[i
+ 8].ZMM_Q(1) = ldq_p(&fpu
.mmx_2
[i
][8]);
967 env
->mxcsr
= fpu
.mxcsr
;
972 static int hax_set_fpu(CPUArchState
*env
)
974 struct fx_layout fpu
;
977 memset(&fpu
, 0, sizeof(fpu
));
978 fpu
.fsw
= env
->fpus
& ~(7 << 11);
979 fpu
.fsw
|= (env
->fpstt
& 7) << 11;
982 for (i
= 0; i
< 8; ++i
) {
983 fpu
.ftw
|= (!env
->fptags
[i
]) << i
;
986 memcpy(fpu
.st_mm
, env
->fpregs
, sizeof(env
->fpregs
));
987 for (i
= 0; i
< 8; i
++) {
988 stq_p(&fpu
.mmx_1
[i
][0], env
->xmm_regs
[i
].ZMM_Q(0));
989 stq_p(&fpu
.mmx_1
[i
][8], env
->xmm_regs
[i
].ZMM_Q(1));
990 if (CPU_NB_REGS
> 8) {
991 stq_p(&fpu
.mmx_2
[i
][0], env
->xmm_regs
[i
+ 8].ZMM_Q(0));
992 stq_p(&fpu
.mmx_2
[i
][8], env
->xmm_regs
[i
+ 8].ZMM_Q(1));
996 fpu
.mxcsr
= env
->mxcsr
;
998 return hax_sync_fpu(env
, &fpu
, 1);
1001 static int hax_arch_get_registers(CPUArchState
*env
)
1005 ret
= hax_sync_vcpu_register(env
, 0);
1010 ret
= hax_get_fpu(env
);
1015 ret
= hax_get_msrs(env
);
1020 x86_update_hflags(env
);
1024 static int hax_arch_set_registers(CPUArchState
*env
)
1027 ret
= hax_sync_vcpu_register(env
, 1);
1030 fprintf(stderr
, "Failed to sync vcpu reg\n");
1033 ret
= hax_set_fpu(env
);
1035 fprintf(stderr
, "FPU failed\n");
1038 ret
= hax_set_msrs(env
);
1040 fprintf(stderr
, "MSR failed\n");
1047 static void hax_vcpu_sync_state(CPUArchState
*env
, int modified
)
1049 if (hax_enabled()) {
1051 hax_arch_set_registers(env
);
1053 hax_arch_get_registers(env
);
1059 * much simpler than kvm, at least in first stage because:
1060 * We don't need consider the device pass-through, we don't need
1061 * consider the framebuffer, and we may even remove the bios at all
1063 int hax_sync_vcpus(void)
1065 if (hax_enabled()) {
1073 for (; cpu
!= NULL
; cpu
= CPU_NEXT(cpu
)) {
1076 ret
= hax_arch_set_registers(cpu
->env_ptr
);
1086 void hax_reset_vcpu_state(void *opaque
)
1089 for (cpu
= first_cpu
; cpu
!= NULL
; cpu
= CPU_NEXT(cpu
)) {
1090 cpu
->hax_vcpu
->tunnel
->user_event_pending
= 0;
1091 cpu
->hax_vcpu
->tunnel
->ready_for_interrupt_injection
= 0;
1095 static void hax_accel_class_init(ObjectClass
*oc
, void *data
)
1097 AccelClass
*ac
= ACCEL_CLASS(oc
);
1099 ac
->init_machine
= hax_accel_init
;
1100 ac
->allowed
= &hax_allowed
;
1103 static const TypeInfo hax_accel_type
= {
1104 .name
= ACCEL_CLASS_NAME("hax"),
1105 .parent
= TYPE_ACCEL
,
1106 .class_init
= hax_accel_class_init
,
1109 static void hax_type_init(void)
1111 type_register_static(&hax_accel_type
);
1114 type_init(hax_type_init
);