s390x: bump ADAPTER_ROUTES_MAX_GSI
[qemu/ar7.git] / qom / cpu.c
blobed87c50ceae11517717586c1ad3e6f47a278eec5
1 /*
2 * QEMU CPU model
4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "qemu-common.h"
24 #include "qom/cpu.h"
25 #include "sysemu/hw_accel.h"
26 #include "qemu/notify.h"
27 #include "qemu/log.h"
28 #include "exec/log.h"
29 #include "qemu/error-report.h"
30 #include "sysemu/sysemu.h"
31 #include "hw/qdev-properties.h"
32 #include "trace-root.h"
34 bool cpu_exists(int64_t id)
36 CPUState *cpu;
38 CPU_FOREACH(cpu) {
39 CPUClass *cc = CPU_GET_CLASS(cpu);
41 if (cc->get_arch_id(cpu) == id) {
42 return true;
45 return false;
48 CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
50 char *str, *name, *featurestr;
51 CPUState *cpu = NULL;
52 ObjectClass *oc;
53 CPUClass *cc;
54 Error *err = NULL;
56 str = g_strdup(cpu_model);
57 name = strtok(str, ",");
59 oc = cpu_class_by_name(typename, name);
60 if (oc == NULL) {
61 g_free(str);
62 return NULL;
65 cc = CPU_CLASS(oc);
66 featurestr = strtok(NULL, ",");
67 /* TODO: all callers of cpu_generic_init() need to be converted to
68 * call parse_features() only once, before calling cpu_generic_init().
70 cc->parse_features(object_class_get_name(oc), featurestr, &err);
71 g_free(str);
72 if (err != NULL) {
73 goto out;
76 cpu = CPU(object_new(object_class_get_name(oc)));
77 object_property_set_bool(OBJECT(cpu), true, "realized", &err);
79 out:
80 if (err != NULL) {
81 error_report_err(err);
82 object_unref(OBJECT(cpu));
83 return NULL;
86 return cpu;
89 bool cpu_paging_enabled(const CPUState *cpu)
91 CPUClass *cc = CPU_GET_CLASS(cpu);
93 return cc->get_paging_enabled(cpu);
96 static bool cpu_common_get_paging_enabled(const CPUState *cpu)
98 return false;
101 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
102 Error **errp)
104 CPUClass *cc = CPU_GET_CLASS(cpu);
106 cc->get_memory_mapping(cpu, list, errp);
109 static void cpu_common_get_memory_mapping(CPUState *cpu,
110 MemoryMappingList *list,
111 Error **errp)
113 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
116 void cpu_reset_interrupt(CPUState *cpu, int mask)
118 cpu->interrupt_request &= ~mask;
121 void cpu_exit(CPUState *cpu)
123 atomic_set(&cpu->exit_request, 1);
124 /* Ensure cpu_exec will see the exit request after TCG has exited. */
125 smp_wmb();
126 atomic_set(&cpu->tcg_exit_req, 1);
129 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
130 void *opaque)
132 CPUClass *cc = CPU_GET_CLASS(cpu);
134 return (*cc->write_elf32_qemunote)(f, cpu, opaque);
137 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
138 CPUState *cpu, void *opaque)
140 return 0;
143 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
144 int cpuid, void *opaque)
146 CPUClass *cc = CPU_GET_CLASS(cpu);
148 return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
151 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
152 CPUState *cpu, int cpuid,
153 void *opaque)
155 return -1;
158 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
159 void *opaque)
161 CPUClass *cc = CPU_GET_CLASS(cpu);
163 return (*cc->write_elf64_qemunote)(f, cpu, opaque);
166 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
167 CPUState *cpu, void *opaque)
169 return 0;
172 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
173 int cpuid, void *opaque)
175 CPUClass *cc = CPU_GET_CLASS(cpu);
177 return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
180 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
181 CPUState *cpu, int cpuid,
182 void *opaque)
184 return -1;
188 static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
190 return 0;
193 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
195 return 0;
198 static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
200 /* If no extra check is required, QEMU watchpoint match can be considered
201 * as an architectural match.
203 return true;
206 bool target_words_bigendian(void);
207 static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
209 return target_words_bigendian();
212 static void cpu_common_noop(CPUState *cpu)
216 static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
218 return false;
221 GuestPanicInformation *cpu_get_crash_info(CPUState *cpu)
223 CPUClass *cc = CPU_GET_CLASS(cpu);
224 GuestPanicInformation *res = NULL;
226 if (cc->get_crash_info) {
227 res = cc->get_crash_info(cpu);
229 return res;
232 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
233 int flags)
235 CPUClass *cc = CPU_GET_CLASS(cpu);
237 if (cc->dump_state) {
238 cpu_synchronize_state(cpu);
239 cc->dump_state(cpu, f, cpu_fprintf, flags);
243 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
244 int flags)
246 CPUClass *cc = CPU_GET_CLASS(cpu);
248 if (cc->dump_statistics) {
249 cc->dump_statistics(cpu, f, cpu_fprintf, flags);
253 void cpu_reset(CPUState *cpu)
255 CPUClass *klass = CPU_GET_CLASS(cpu);
257 if (klass->reset != NULL) {
258 (*klass->reset)(cpu);
261 trace_guest_cpu_reset(cpu);
264 static void cpu_common_reset(CPUState *cpu)
266 CPUClass *cc = CPU_GET_CLASS(cpu);
267 int i;
269 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
270 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
271 log_cpu_state(cpu, cc->reset_dump_flags);
274 cpu->interrupt_request = 0;
275 cpu->halted = 0;
276 cpu->mem_io_pc = 0;
277 cpu->mem_io_vaddr = 0;
278 cpu->icount_extra = 0;
279 cpu->icount_decr.u32 = 0;
280 cpu->can_do_io = 1;
281 cpu->exception_index = -1;
282 cpu->crash_occurred = false;
284 if (tcg_enabled()) {
285 for (i = 0; i < TB_JMP_CACHE_SIZE; ++i) {
286 atomic_set(&cpu->tb_jmp_cache[i], NULL);
289 #ifdef CONFIG_SOFTMMU
290 tlb_flush(cpu, 0);
291 #endif
295 static bool cpu_common_has_work(CPUState *cs)
297 return false;
300 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
302 CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
304 return cc->class_by_name(cpu_model);
307 static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
309 return NULL;
312 static void cpu_common_parse_features(const char *typename, char *features,
313 Error **errp)
315 char *featurestr; /* Single "key=value" string being parsed */
316 char *val;
317 static bool cpu_globals_initialized;
319 /* TODO: all callers of ->parse_features() need to be changed to
320 * call it only once, so we can remove this check (or change it
321 * to assert(!cpu_globals_initialized).
322 * Current callers of ->parse_features() are:
323 * - cpu_generic_init()
325 if (cpu_globals_initialized) {
326 return;
328 cpu_globals_initialized = true;
330 featurestr = features ? strtok(features, ",") : NULL;
332 while (featurestr) {
333 val = strchr(featurestr, '=');
334 if (val) {
335 GlobalProperty *prop = g_new0(typeof(*prop), 1);
336 *val = 0;
337 val++;
338 prop->driver = typename;
339 prop->property = g_strdup(featurestr);
340 prop->value = g_strdup(val);
341 prop->errp = &error_fatal;
342 qdev_prop_register_global(prop);
343 } else {
344 error_setg(errp, "Expected key=value format, found %s.",
345 featurestr);
346 return;
348 featurestr = strtok(NULL, ",");
352 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
354 CPUState *cpu = CPU(dev);
356 if (dev->hotplugged) {
357 cpu_synchronize_post_init(cpu);
358 cpu_resume(cpu);
361 /* NOTE: latest generic point where the cpu is fully realized */
362 trace_init_vcpu(cpu);
365 static void cpu_common_unrealizefn(DeviceState *dev, Error **errp)
367 CPUState *cpu = CPU(dev);
368 /* NOTE: latest generic point before the cpu is fully unrealized */
369 trace_fini_vcpu(cpu);
370 cpu_exec_unrealizefn(cpu);
373 static void cpu_common_initfn(Object *obj)
375 CPUState *cpu = CPU(obj);
376 CPUClass *cc = CPU_GET_CLASS(obj);
378 cpu->cpu_index = UNASSIGNED_CPU_INDEX;
379 cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
380 /* *-user doesn't have configurable SMP topology */
381 /* the default value is changed by qemu_init_vcpu() for softmmu */
382 cpu->nr_cores = 1;
383 cpu->nr_threads = 1;
385 qemu_mutex_init(&cpu->work_mutex);
386 QTAILQ_INIT(&cpu->breakpoints);
387 QTAILQ_INIT(&cpu->watchpoints);
389 cpu->trace_dstate = bitmap_new(trace_get_vcpu_event_count());
391 cpu_exec_initfn(cpu);
394 static void cpu_common_finalize(Object *obj)
396 CPUState *cpu = CPU(obj);
397 g_free(cpu->trace_dstate);
400 static int64_t cpu_common_get_arch_id(CPUState *cpu)
402 return cpu->cpu_index;
405 static vaddr cpu_adjust_watchpoint_address(CPUState *cpu, vaddr addr, int len)
407 return addr;
410 static void cpu_class_init(ObjectClass *klass, void *data)
412 DeviceClass *dc = DEVICE_CLASS(klass);
413 CPUClass *k = CPU_CLASS(klass);
415 k->class_by_name = cpu_common_class_by_name;
416 k->parse_features = cpu_common_parse_features;
417 k->reset = cpu_common_reset;
418 k->get_arch_id = cpu_common_get_arch_id;
419 k->has_work = cpu_common_has_work;
420 k->get_paging_enabled = cpu_common_get_paging_enabled;
421 k->get_memory_mapping = cpu_common_get_memory_mapping;
422 k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
423 k->write_elf32_note = cpu_common_write_elf32_note;
424 k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
425 k->write_elf64_note = cpu_common_write_elf64_note;
426 k->gdb_read_register = cpu_common_gdb_read_register;
427 k->gdb_write_register = cpu_common_gdb_write_register;
428 k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
429 k->debug_excp_handler = cpu_common_noop;
430 k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
431 k->cpu_exec_enter = cpu_common_noop;
432 k->cpu_exec_exit = cpu_common_noop;
433 k->cpu_exec_interrupt = cpu_common_exec_interrupt;
434 k->adjust_watchpoint_address = cpu_adjust_watchpoint_address;
435 set_bit(DEVICE_CATEGORY_CPU, dc->categories);
436 dc->realize = cpu_common_realizefn;
437 dc->unrealize = cpu_common_unrealizefn;
439 * Reason: CPUs still need special care by board code: wiring up
440 * IRQs, adding reset handlers, halting non-first CPUs, ...
442 dc->cannot_instantiate_with_device_add_yet = true;
445 static const TypeInfo cpu_type_info = {
446 .name = TYPE_CPU,
447 .parent = TYPE_DEVICE,
448 .instance_size = sizeof(CPUState),
449 .instance_init = cpu_common_initfn,
450 .instance_finalize = cpu_common_finalize,
451 .abstract = true,
452 .class_size = sizeof(CPUClass),
453 .class_init = cpu_class_init,
456 static void cpu_register_types(void)
458 type_register_static(&cpu_type_info);
461 type_init(cpu_register_types)