target-arm: Split AArch64 cases out of ats_write()
[qemu/ar7.git] / disas / libvixl / README
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2 The code in this directory is a subset of libvixl:
3  https://github.com/armvixl/vixl
4 (specifically, it is the set of files needed for disassembly only,
5 taken from libvixl 1.6).
6 Bugfixes should preferably be sent upstream initially.
8 The disassembler does not currently support the entire A64 instruction
9 set. Notably:
10  * No Advanced SIMD support.
11  * Limited support for system instructions.
12  * A few miscellaneous integer and floating point instructions are missing.