hw/watchdog/cmsdk_apb_watchdog: Implement CMSDK APB watchdog module
[qemu/ar7.git] / include / hw / watchdog / cmsdk-apb-watchdog.h
blobab8b5987a1917e709114e0b636dea7486a077d52
1 /*
2 * ARM CMSDK APB watchdog emulation
4 * Copyright (c) 2018 Linaro Limited
5 * Written by Peter Maydell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 or
9 * (at your option) any later version.
13 * This is a model of the "APB watchdog" which is part of the Cortex-M
14 * System Design Kit (CMSDK) and documented in the Cortex-M System
15 * Design Kit Technical Reference Manual (ARM DDI0479C):
16 * https://developer.arm.com/products/system-design/system-design-kits/cortex-m-system-design-kit
18 * QEMU interface:
19 * + QOM property "wdogclk-frq": frequency at which the watchdog is clocked
20 * + sysbus MMIO region 0: the register bank
21 * + sysbus IRQ 0: watchdog interrupt
23 * In real hardware the watchdog's reset output is just a GPIO line
24 * which can then be masked by the board or treated as a simple interrupt.
25 * (For instance the IoTKit does this with the non-secure watchdog, so that
26 * secure code can control whether non-secure code can perform a system
27 * reset via its watchdog.) In QEMU, we just wire up the watchdog reset
28 * to watchdog_perform_action(), at least for the moment.
31 #ifndef CMSDK_APB_WATCHDOG_H
32 #define CMSDK_APB_WATCHDOG_H
34 #include "hw/sysbus.h"
35 #include "hw/ptimer.h"
37 #define TYPE_CMSDK_APB_WATCHDOG "cmsdk-apb-watchdog"
38 #define CMSDK_APB_WATCHDOG(obj) OBJECT_CHECK(CMSDKAPBWatchdog, (obj), \
39 TYPE_CMSDK_APB_WATCHDOG)
41 typedef struct CMSDKAPBWatchdog {
42 /*< private >*/
43 SysBusDevice parent_obj;
45 /*< public >*/
46 MemoryRegion iomem;
47 qemu_irq wdogint;
48 uint32_t wdogclk_frq;
49 struct ptimer_state *timer;
51 uint32_t control;
52 uint32_t intstatus;
53 uint32_t lock;
54 uint32_t itcr;
55 uint32_t itop;
56 uint32_t resetstatus;
57 } CMSDKAPBWatchdog;
59 #endif