x86/cpuid: Fix crash on -cpu ""
[qemu/ar7.git] / disas.c
blob3b1fd977a8ef80833eb916fdf75dea8f0cb19c96
1 /* General "disassemble this chunk" code. Used for debugging. */
2 #include "config.h"
3 #include "dis-asm.h"
4 #include "elf.h"
5 #include <errno.h>
7 #include "cpu.h"
8 #include "disas.h"
10 /* Filled in by elfload.c. Simplistic, but will do for now. */
11 struct syminfo *syminfos = NULL;
13 /* Get LENGTH bytes from info's buffer, at target address memaddr.
14 Transfer them to myaddr. */
15 int
16 buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
17 struct disassemble_info *info)
19 if (memaddr < info->buffer_vma
20 || memaddr + length > info->buffer_vma + info->buffer_length)
21 /* Out of bounds. Use EIO because GDB uses it. */
22 return EIO;
23 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
24 return 0;
27 /* Get LENGTH bytes from info's buffer, at target address memaddr.
28 Transfer them to myaddr. */
29 static int
30 target_read_memory (bfd_vma memaddr,
31 bfd_byte *myaddr,
32 int length,
33 struct disassemble_info *info)
35 cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0);
36 return 0;
39 /* Print an error message. We can assume that this is in response to
40 an error return from buffer_read_memory. */
41 void
42 perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
44 if (status != EIO)
45 /* Can't happen. */
46 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
47 else
48 /* Actually, address between memaddr and memaddr + len was
49 out of bounds. */
50 (*info->fprintf_func) (info->stream,
51 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
54 /* This could be in a separate file, to save miniscule amounts of space
55 in statically linked executables. */
57 /* Just print the address is hex. This is included for completeness even
58 though both GDB and objdump provide their own (to print symbolic
59 addresses). */
61 void
62 generic_print_address (bfd_vma addr, struct disassemble_info *info)
64 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
67 /* Just return the given address. */
69 int
70 generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
72 return 1;
75 bfd_vma bfd_getl64 (const bfd_byte *addr)
77 unsigned long long v;
79 v = (unsigned long long) addr[0];
80 v |= (unsigned long long) addr[1] << 8;
81 v |= (unsigned long long) addr[2] << 16;
82 v |= (unsigned long long) addr[3] << 24;
83 v |= (unsigned long long) addr[4] << 32;
84 v |= (unsigned long long) addr[5] << 40;
85 v |= (unsigned long long) addr[6] << 48;
86 v |= (unsigned long long) addr[7] << 56;
87 return (bfd_vma) v;
90 bfd_vma bfd_getl32 (const bfd_byte *addr)
92 unsigned long v;
94 v = (unsigned long) addr[0];
95 v |= (unsigned long) addr[1] << 8;
96 v |= (unsigned long) addr[2] << 16;
97 v |= (unsigned long) addr[3] << 24;
98 return (bfd_vma) v;
101 bfd_vma bfd_getb32 (const bfd_byte *addr)
103 unsigned long v;
105 v = (unsigned long) addr[0] << 24;
106 v |= (unsigned long) addr[1] << 16;
107 v |= (unsigned long) addr[2] << 8;
108 v |= (unsigned long) addr[3];
109 return (bfd_vma) v;
112 bfd_vma bfd_getl16 (const bfd_byte *addr)
114 unsigned long v;
116 v = (unsigned long) addr[0];
117 v |= (unsigned long) addr[1] << 8;
118 return (bfd_vma) v;
121 bfd_vma bfd_getb16 (const bfd_byte *addr)
123 unsigned long v;
125 v = (unsigned long) addr[0] << 24;
126 v |= (unsigned long) addr[1] << 16;
127 return (bfd_vma) v;
130 #ifdef TARGET_ARM
131 static int
132 print_insn_thumb1(bfd_vma pc, disassemble_info *info)
134 return print_insn_arm(pc | 1, info);
136 #endif
138 /* Disassemble this for me please... (debugging). 'flags' has the following
139 values:
140 i386 - 1 means 16 bit code, 2 means 64 bit code
141 arm - nonzero means thumb code
142 ppc - nonzero means little endian
143 other targets - unused
145 void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
147 target_ulong pc;
148 int count;
149 struct disassemble_info disasm_info;
150 int (*print_insn)(bfd_vma pc, disassemble_info *info);
152 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
154 disasm_info.read_memory_func = target_read_memory;
155 disasm_info.buffer_vma = code;
156 disasm_info.buffer_length = size;
158 #ifdef TARGET_WORDS_BIGENDIAN
159 disasm_info.endian = BFD_ENDIAN_BIG;
160 #else
161 disasm_info.endian = BFD_ENDIAN_LITTLE;
162 #endif
163 #if defined(TARGET_I386)
164 if (flags == 2)
165 disasm_info.mach = bfd_mach_x86_64;
166 else if (flags == 1)
167 disasm_info.mach = bfd_mach_i386_i8086;
168 else
169 disasm_info.mach = bfd_mach_i386_i386;
170 print_insn = print_insn_i386;
171 #elif defined(TARGET_ARM)
172 if (flags)
173 print_insn = print_insn_thumb1;
174 else
175 print_insn = print_insn_arm;
176 #elif defined(TARGET_SPARC)
177 print_insn = print_insn_sparc;
178 #ifdef TARGET_SPARC64
179 disasm_info.mach = bfd_mach_sparc_v9b;
180 #endif
181 #elif defined(TARGET_PPC)
182 if (flags >> 16)
183 disasm_info.endian = BFD_ENDIAN_LITTLE;
184 if (flags & 0xFFFF) {
185 /* If we have a precise definitions of the instructions set, use it */
186 disasm_info.mach = flags & 0xFFFF;
187 } else {
188 #ifdef TARGET_PPC64
189 disasm_info.mach = bfd_mach_ppc64;
190 #else
191 disasm_info.mach = bfd_mach_ppc;
192 #endif
194 print_insn = print_insn_ppc;
195 #elif defined(TARGET_M68K)
196 print_insn = print_insn_m68k;
197 #elif defined(TARGET_MIPS)
198 #ifdef TARGET_WORDS_BIGENDIAN
199 print_insn = print_insn_big_mips;
200 #else
201 print_insn = print_insn_little_mips;
202 #endif
203 #elif defined(TARGET_SH4)
204 disasm_info.mach = bfd_mach_sh4;
205 print_insn = print_insn_sh;
206 #elif defined(TARGET_ALPHA)
207 disasm_info.mach = bfd_mach_alpha_ev6;
208 print_insn = print_insn_alpha;
209 #elif defined(TARGET_CRIS)
210 if (flags != 32) {
211 disasm_info.mach = bfd_mach_cris_v0_v10;
212 print_insn = print_insn_crisv10;
213 } else {
214 disasm_info.mach = bfd_mach_cris_v32;
215 print_insn = print_insn_crisv32;
217 #elif defined(TARGET_S390X)
218 disasm_info.mach = bfd_mach_s390_64;
219 print_insn = print_insn_s390;
220 #elif defined(TARGET_MICROBLAZE)
221 disasm_info.mach = bfd_arch_microblaze;
222 print_insn = print_insn_microblaze;
223 #else
224 fprintf(out, "0x" TARGET_FMT_lx
225 ": Asm output not supported on this arch\n", code);
226 return;
227 #endif
229 for (pc = code; size > 0; pc += count, size -= count) {
230 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
231 count = print_insn(pc, &disasm_info);
232 #if 0
234 int i;
235 uint8_t b;
236 fprintf(out, " {");
237 for(i = 0; i < count; i++) {
238 target_read_memory(pc + i, &b, 1, &disasm_info);
239 fprintf(out, " %02x", b);
241 fprintf(out, " }");
243 #endif
244 fprintf(out, "\n");
245 if (count < 0)
246 break;
247 if (size < count) {
248 fprintf(out,
249 "Disassembler disagrees with translator over instruction "
250 "decoding\n"
251 "Please report this to qemu-devel@nongnu.org\n");
252 break;
257 /* Disassemble this for me please... (debugging). */
258 void disas(FILE *out, void *code, unsigned long size)
260 unsigned long pc;
261 int count;
262 struct disassemble_info disasm_info;
263 int (*print_insn)(bfd_vma pc, disassemble_info *info);
265 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
267 disasm_info.buffer = code;
268 disasm_info.buffer_vma = (unsigned long)code;
269 disasm_info.buffer_length = size;
271 #ifdef HOST_WORDS_BIGENDIAN
272 disasm_info.endian = BFD_ENDIAN_BIG;
273 #else
274 disasm_info.endian = BFD_ENDIAN_LITTLE;
275 #endif
276 #if defined(CONFIG_TCG_INTERPRETER)
277 print_insn = print_insn_tci;
278 #elif defined(__i386__)
279 disasm_info.mach = bfd_mach_i386_i386;
280 print_insn = print_insn_i386;
281 #elif defined(__x86_64__)
282 disasm_info.mach = bfd_mach_x86_64;
283 print_insn = print_insn_i386;
284 #elif defined(_ARCH_PPC)
285 print_insn = print_insn_ppc;
286 #elif defined(__alpha__)
287 print_insn = print_insn_alpha;
288 #elif defined(__sparc__)
289 print_insn = print_insn_sparc;
290 #if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
291 disasm_info.mach = bfd_mach_sparc_v9b;
292 #endif
293 #elif defined(__arm__)
294 print_insn = print_insn_arm;
295 #elif defined(__MIPSEB__)
296 print_insn = print_insn_big_mips;
297 #elif defined(__MIPSEL__)
298 print_insn = print_insn_little_mips;
299 #elif defined(__m68k__)
300 print_insn = print_insn_m68k;
301 #elif defined(__s390__)
302 print_insn = print_insn_s390;
303 #elif defined(__hppa__)
304 print_insn = print_insn_hppa;
305 #elif defined(__ia64__)
306 print_insn = print_insn_ia64;
307 #else
308 fprintf(out, "0x%lx: Asm output not supported on this arch\n",
309 (long) code);
310 return;
311 #endif
312 for (pc = (unsigned long)code; size > 0; pc += count, size -= count) {
313 fprintf(out, "0x%08lx: ", pc);
314 count = print_insn(pc, &disasm_info);
315 fprintf(out, "\n");
316 if (count < 0)
317 break;
321 /* Look up symbol for debugging purpose. Returns "" if unknown. */
322 const char *lookup_symbol(target_ulong orig_addr)
324 const char *symbol = "";
325 struct syminfo *s;
327 for (s = syminfos; s; s = s->next) {
328 symbol = s->lookup_symbol(s, orig_addr);
329 if (symbol[0] != '\0') {
330 break;
334 return symbol;
337 #if !defined(CONFIG_USER_ONLY)
339 #include "monitor.h"
341 static int monitor_disas_is_physical;
342 static CPUState *monitor_disas_env;
344 static int
345 monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
346 struct disassemble_info *info)
348 if (monitor_disas_is_physical) {
349 cpu_physical_memory_read(memaddr, myaddr, length);
350 } else {
351 cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
353 return 0;
356 static int GCC_FMT_ATTR(2, 3)
357 monitor_fprintf(FILE *stream, const char *fmt, ...)
359 va_list ap;
360 va_start(ap, fmt);
361 monitor_vprintf((Monitor *)stream, fmt, ap);
362 va_end(ap);
363 return 0;
366 void monitor_disas(Monitor *mon, CPUState *env,
367 target_ulong pc, int nb_insn, int is_physical, int flags)
369 int count, i;
370 struct disassemble_info disasm_info;
371 int (*print_insn)(bfd_vma pc, disassemble_info *info);
373 INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf);
375 monitor_disas_env = env;
376 monitor_disas_is_physical = is_physical;
377 disasm_info.read_memory_func = monitor_read_memory;
379 disasm_info.buffer_vma = pc;
381 #ifdef TARGET_WORDS_BIGENDIAN
382 disasm_info.endian = BFD_ENDIAN_BIG;
383 #else
384 disasm_info.endian = BFD_ENDIAN_LITTLE;
385 #endif
386 #if defined(TARGET_I386)
387 if (flags == 2)
388 disasm_info.mach = bfd_mach_x86_64;
389 else if (flags == 1)
390 disasm_info.mach = bfd_mach_i386_i8086;
391 else
392 disasm_info.mach = bfd_mach_i386_i386;
393 print_insn = print_insn_i386;
394 #elif defined(TARGET_ARM)
395 print_insn = print_insn_arm;
396 #elif defined(TARGET_ALPHA)
397 print_insn = print_insn_alpha;
398 #elif defined(TARGET_SPARC)
399 print_insn = print_insn_sparc;
400 #ifdef TARGET_SPARC64
401 disasm_info.mach = bfd_mach_sparc_v9b;
402 #endif
403 #elif defined(TARGET_PPC)
404 #ifdef TARGET_PPC64
405 disasm_info.mach = bfd_mach_ppc64;
406 #else
407 disasm_info.mach = bfd_mach_ppc;
408 #endif
409 print_insn = print_insn_ppc;
410 #elif defined(TARGET_M68K)
411 print_insn = print_insn_m68k;
412 #elif defined(TARGET_MIPS)
413 #ifdef TARGET_WORDS_BIGENDIAN
414 print_insn = print_insn_big_mips;
415 #else
416 print_insn = print_insn_little_mips;
417 #endif
418 #elif defined(TARGET_SH4)
419 disasm_info.mach = bfd_mach_sh4;
420 print_insn = print_insn_sh;
421 #elif defined(TARGET_S390X)
422 disasm_info.mach = bfd_mach_s390_64;
423 print_insn = print_insn_s390;
424 #else
425 monitor_printf(mon, "0x" TARGET_FMT_lx
426 ": Asm output not supported on this arch\n", pc);
427 return;
428 #endif
430 for(i = 0; i < nb_insn; i++) {
431 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
432 count = print_insn(pc, &disasm_info);
433 monitor_printf(mon, "\n");
434 if (count < 0)
435 break;
436 pc += count;
439 #endif