2 * QEMU sPAPR IOMMU (TCE) code
4 * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com>
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
22 #include "sysemu/kvm.h"
25 #include "sysemu/dma.h"
26 #include "exec/address-spaces.h"
29 #include "hw/ppc/spapr.h"
30 #include "hw/ppc/spapr_vio.h"
41 #define IOMMU_PAGE_SIZE(shift) (1ULL << (shift))
42 #define IOMMU_PAGE_MASK(shift) (~(IOMMU_PAGE_SIZE(shift) - 1))
44 static QLIST_HEAD(spapr_tce_tables
, sPAPRTCETable
) spapr_tce_tables
;
46 sPAPRTCETable
*spapr_tce_find_by_liobn(target_ulong liobn
)
50 if (liobn
& 0xFFFFFFFF00000000ULL
) {
51 hcall_dprintf("Request for out-of-bounds LIOBN 0x" TARGET_FMT_lx
"\n",
56 QLIST_FOREACH(tcet
, &spapr_tce_tables
, list
) {
57 if (tcet
->liobn
== (uint32_t)liobn
) {
65 static IOMMUAccessFlags
spapr_tce_iommu_access_flags(uint64_t tce
)
67 switch (tce
& SPAPR_TCE_RW
) {
74 default: /* SPAPR_TCE_RW */
79 /* Called from RCU critical section */
80 static IOMMUTLBEntry
spapr_tce_translate_iommu(MemoryRegion
*iommu
, hwaddr addr
,
83 sPAPRTCETable
*tcet
= container_of(iommu
, sPAPRTCETable
, iommu
);
86 .target_as
= &address_space_memory
,
89 .addr_mask
= ~(hwaddr
)0,
93 if ((addr
>> tcet
->page_shift
) < tcet
->nb_table
) {
94 /* Check if we are in bound */
95 hwaddr page_mask
= IOMMU_PAGE_MASK(tcet
->page_shift
);
97 tce
= tcet
->table
[addr
>> tcet
->page_shift
];
98 ret
.iova
= addr
& page_mask
;
99 ret
.translated_addr
= tce
& page_mask
;
100 ret
.addr_mask
= ~page_mask
;
101 ret
.perm
= spapr_tce_iommu_access_flags(tce
);
103 trace_spapr_iommu_xlate(tcet
->liobn
, addr
, ret
.iova
, ret
.perm
,
109 static int spapr_tce_table_post_load(void *opaque
, int version_id
)
111 sPAPRTCETable
*tcet
= SPAPR_TCE_TABLE(opaque
);
114 spapr_vio_set_bypass(tcet
->vdev
, tcet
->bypass
);
120 static const VMStateDescription vmstate_spapr_tce_table
= {
121 .name
= "spapr_iommu",
123 .minimum_version_id
= 2,
124 .post_load
= spapr_tce_table_post_load
,
125 .fields
= (VMStateField
[]) {
127 VMSTATE_UINT32_EQUAL(liobn
, sPAPRTCETable
),
128 VMSTATE_UINT32_EQUAL(nb_table
, sPAPRTCETable
),
131 VMSTATE_BOOL(bypass
, sPAPRTCETable
),
132 VMSTATE_VARRAY_UINT32(table
, sPAPRTCETable
, nb_table
, 0, vmstate_info_uint64
, uint64_t),
134 VMSTATE_END_OF_LIST()
138 static MemoryRegionIOMMUOps spapr_iommu_ops
= {
139 .translate
= spapr_tce_translate_iommu
,
142 static int spapr_tce_table_realize(DeviceState
*dev
)
144 sPAPRTCETable
*tcet
= SPAPR_TCE_TABLE(dev
);
145 uint64_t window_size
= (uint64_t)tcet
->nb_table
<< tcet
->page_shift
;
147 if (kvm_enabled() && !(window_size
>> 32)) {
148 tcet
->table
= kvmppc_create_spapr_tce(tcet
->liobn
,
155 size_t table_size
= tcet
->nb_table
* sizeof(uint64_t);
156 tcet
->table
= g_malloc0(table_size
);
159 trace_spapr_iommu_new_table(tcet
->liobn
, tcet
, tcet
->table
, tcet
->fd
);
161 memory_region_init_iommu(&tcet
->iommu
, OBJECT(dev
), &spapr_iommu_ops
,
163 (uint64_t)tcet
->nb_table
<< tcet
->page_shift
);
165 QLIST_INSERT_HEAD(&spapr_tce_tables
, tcet
, list
);
167 vmstate_register(DEVICE(tcet
), tcet
->liobn
, &vmstate_spapr_tce_table
,
173 void spapr_tce_set_need_vfio(sPAPRTCETable
*tcet
, bool need_vfio
)
175 size_t table_size
= tcet
->nb_table
* sizeof(uint64_t);
178 if (need_vfio
== tcet
->need_vfio
) {
184 /* FIXME: We don't support transition back to KVM accelerated
189 tcet
->need_vfio
= true;
192 /* Table is already in userspace, nothing to be do */
196 newtable
= g_malloc(table_size
);
197 memcpy(newtable
, tcet
->table
, table_size
);
199 kvmppc_remove_spapr_tce(tcet
->table
, tcet
->fd
, tcet
->nb_table
);
202 tcet
->table
= newtable
;
205 sPAPRTCETable
*spapr_tce_new_table(DeviceState
*owner
, uint32_t liobn
,
214 if (spapr_tce_find_by_liobn(liobn
)) {
215 fprintf(stderr
, "Attempted to create TCE table with duplicate"
216 " LIOBN 0x%x\n", liobn
);
224 tcet
= SPAPR_TCE_TABLE(object_new(TYPE_SPAPR_TCE_TABLE
));
226 tcet
->bus_offset
= bus_offset
;
227 tcet
->page_shift
= page_shift
;
228 tcet
->nb_table
= nb_table
;
229 tcet
->need_vfio
= need_vfio
;
231 snprintf(tmp
, sizeof(tmp
), "tce-table-%x", liobn
);
232 object_property_add_child(OBJECT(owner
), tmp
, OBJECT(tcet
), NULL
);
234 object_property_set_bool(OBJECT(tcet
), true, "realized", NULL
);
239 static void spapr_tce_table_unrealize(DeviceState
*dev
, Error
**errp
)
241 sPAPRTCETable
*tcet
= SPAPR_TCE_TABLE(dev
);
243 QLIST_REMOVE(tcet
, list
);
245 if (!kvm_enabled() ||
246 (kvmppc_remove_spapr_tce(tcet
->table
, tcet
->fd
,
247 tcet
->nb_table
) != 0)) {
252 MemoryRegion
*spapr_tce_get_iommu(sPAPRTCETable
*tcet
)
257 static void spapr_tce_reset(DeviceState
*dev
)
259 sPAPRTCETable
*tcet
= SPAPR_TCE_TABLE(dev
);
260 size_t table_size
= tcet
->nb_table
* sizeof(uint64_t);
262 memset(tcet
->table
, 0, table_size
);
265 static target_ulong
put_tce_emu(sPAPRTCETable
*tcet
, target_ulong ioba
,
269 hwaddr page_mask
= IOMMU_PAGE_MASK(tcet
->page_shift
);
270 unsigned long index
= (ioba
- tcet
->bus_offset
) >> tcet
->page_shift
;
272 if (index
>= tcet
->nb_table
) {
273 hcall_dprintf("spapr_vio_put_tce on out-of-bounds IOBA 0x"
274 TARGET_FMT_lx
"\n", ioba
);
278 tcet
->table
[index
] = tce
;
280 entry
.target_as
= &address_space_memory
,
281 entry
.iova
= ioba
& page_mask
;
282 entry
.translated_addr
= tce
& page_mask
;
283 entry
.addr_mask
= ~page_mask
;
284 entry
.perm
= spapr_tce_iommu_access_flags(tce
);
285 memory_region_notify_iommu(&tcet
->iommu
, entry
);
290 static target_ulong
h_put_tce_indirect(PowerPCCPU
*cpu
,
291 sPAPRMachineState
*spapr
,
292 target_ulong opcode
, target_ulong
*args
)
295 target_ulong liobn
= args
[0];
296 target_ulong ioba
= args
[1];
297 target_ulong ioba1
= ioba
;
298 target_ulong tce_list
= args
[2];
299 target_ulong npages
= args
[3];
300 target_ulong ret
= H_PARAMETER
, tce
= 0;
301 sPAPRTCETable
*tcet
= spapr_tce_find_by_liobn(liobn
);
302 CPUState
*cs
= CPU(cpu
);
303 hwaddr page_mask
, page_size
;
309 if ((npages
> 512) || (tce_list
& SPAPR_TCE_PAGE_MASK
)) {
313 page_mask
= IOMMU_PAGE_MASK(tcet
->page_shift
);
314 page_size
= IOMMU_PAGE_SIZE(tcet
->page_shift
);
317 for (i
= 0; i
< npages
; ++i
, ioba
+= page_size
) {
318 tce
= ldq_be_phys(cs
->as
, tce_list
+ i
* sizeof(target_ulong
));
320 ret
= put_tce_emu(tcet
, ioba
, tce
);
326 /* Trace last successful or the first problematic entry */
328 if (SPAPR_IS_PCI_LIOBN(liobn
)) {
329 trace_spapr_iommu_pci_indirect(liobn
, ioba1
, tce_list
, i
, tce
, ret
);
331 trace_spapr_iommu_indirect(liobn
, ioba1
, tce_list
, i
, tce
, ret
);
336 static target_ulong
h_stuff_tce(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
337 target_ulong opcode
, target_ulong
*args
)
340 target_ulong liobn
= args
[0];
341 target_ulong ioba
= args
[1];
342 target_ulong tce_value
= args
[2];
343 target_ulong npages
= args
[3];
344 target_ulong ret
= H_PARAMETER
;
345 sPAPRTCETable
*tcet
= spapr_tce_find_by_liobn(liobn
);
346 hwaddr page_mask
, page_size
;
352 if (npages
> tcet
->nb_table
) {
356 page_mask
= IOMMU_PAGE_MASK(tcet
->page_shift
);
357 page_size
= IOMMU_PAGE_SIZE(tcet
->page_shift
);
360 for (i
= 0; i
< npages
; ++i
, ioba
+= page_size
) {
361 ret
= put_tce_emu(tcet
, ioba
, tce_value
);
366 if (SPAPR_IS_PCI_LIOBN(liobn
)) {
367 trace_spapr_iommu_pci_stuff(liobn
, ioba
, tce_value
, npages
, ret
);
369 trace_spapr_iommu_stuff(liobn
, ioba
, tce_value
, npages
, ret
);
375 static target_ulong
h_put_tce(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
376 target_ulong opcode
, target_ulong
*args
)
378 target_ulong liobn
= args
[0];
379 target_ulong ioba
= args
[1];
380 target_ulong tce
= args
[2];
381 target_ulong ret
= H_PARAMETER
;
382 sPAPRTCETable
*tcet
= spapr_tce_find_by_liobn(liobn
);
385 hwaddr page_mask
= IOMMU_PAGE_MASK(tcet
->page_shift
);
389 ret
= put_tce_emu(tcet
, ioba
, tce
);
391 if (SPAPR_IS_PCI_LIOBN(liobn
)) {
392 trace_spapr_iommu_pci_put(liobn
, ioba
, tce
, ret
);
394 trace_spapr_iommu_put(liobn
, ioba
, tce
, ret
);
400 static target_ulong
get_tce_emu(sPAPRTCETable
*tcet
, target_ulong ioba
,
403 unsigned long index
= (ioba
- tcet
->bus_offset
) >> tcet
->page_shift
;
405 if (index
>= tcet
->nb_table
) {
406 hcall_dprintf("spapr_iommu_get_tce on out-of-bounds IOBA 0x"
407 TARGET_FMT_lx
"\n", ioba
);
411 *tce
= tcet
->table
[index
];
416 static target_ulong
h_get_tce(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
417 target_ulong opcode
, target_ulong
*args
)
419 target_ulong liobn
= args
[0];
420 target_ulong ioba
= args
[1];
421 target_ulong tce
= 0;
422 target_ulong ret
= H_PARAMETER
;
423 sPAPRTCETable
*tcet
= spapr_tce_find_by_liobn(liobn
);
426 hwaddr page_mask
= IOMMU_PAGE_MASK(tcet
->page_shift
);
430 ret
= get_tce_emu(tcet
, ioba
, &tce
);
435 if (SPAPR_IS_PCI_LIOBN(liobn
)) {
436 trace_spapr_iommu_pci_get(liobn
, ioba
, ret
, tce
);
438 trace_spapr_iommu_get(liobn
, ioba
, ret
, tce
);
444 int spapr_dma_dt(void *fdt
, int node_off
, const char *propname
,
445 uint32_t liobn
, uint64_t window
, uint32_t size
)
447 uint32_t dma_prop
[5];
450 dma_prop
[0] = cpu_to_be32(liobn
);
451 dma_prop
[1] = cpu_to_be32(window
>> 32);
452 dma_prop
[2] = cpu_to_be32(window
& 0xFFFFFFFF);
453 dma_prop
[3] = 0; /* window size is 32 bits */
454 dma_prop
[4] = cpu_to_be32(size
);
456 ret
= fdt_setprop_cell(fdt
, node_off
, "ibm,#dma-address-cells", 2);
461 ret
= fdt_setprop_cell(fdt
, node_off
, "ibm,#dma-size-cells", 2);
466 ret
= fdt_setprop(fdt
, node_off
, propname
, dma_prop
, sizeof(dma_prop
));
474 int spapr_tcet_dma_dt(void *fdt
, int node_off
, const char *propname
,
481 return spapr_dma_dt(fdt
, node_off
, propname
,
482 tcet
->liobn
, 0, tcet
->nb_table
<< tcet
->page_shift
);
485 static void spapr_tce_table_class_init(ObjectClass
*klass
, void *data
)
487 DeviceClass
*dc
= DEVICE_CLASS(klass
);
488 dc
->init
= spapr_tce_table_realize
;
489 dc
->reset
= spapr_tce_reset
;
490 dc
->unrealize
= spapr_tce_table_unrealize
;
492 QLIST_INIT(&spapr_tce_tables
);
495 spapr_register_hypercall(H_PUT_TCE
, h_put_tce
);
496 spapr_register_hypercall(H_GET_TCE
, h_get_tce
);
497 spapr_register_hypercall(H_PUT_TCE_INDIRECT
, h_put_tce_indirect
);
498 spapr_register_hypercall(H_STUFF_TCE
, h_stuff_tce
);
501 static TypeInfo spapr_tce_table_info
= {
502 .name
= TYPE_SPAPR_TCE_TABLE
,
503 .parent
= TYPE_DEVICE
,
504 .instance_size
= sizeof(sPAPRTCETable
),
505 .class_init
= spapr_tce_table_class_init
,
508 static void register_types(void)
510 type_register_static(&spapr_tce_table_info
);
513 type_init(register_types
);