tcg/tcg.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #ifndef TCG_H
  26 #define TCG_H
  27
  28 #include "qemu-common.h"
  29 #include "qemu/bitops.h"
  30 #include "tcg-target.h"
  31
  32 /* Default target word size to pointer size.  */
  33 #ifndef TCG_TARGET_REG_BITS
  34 # if UINTPTR_MAX == UINT32_MAX
  35 #  define TCG_TARGET_REG_BITS 32
  36 # elif UINTPTR_MAX == UINT64_MAX
  37 #  define TCG_TARGET_REG_BITS 64
  38 # else
  39 #  error Unknown pointer size for tcg target
  40 # endif
  41 #endif
  42
  43 #if TCG_TARGET_REG_BITS == 32
  44 typedef int32_t tcg_target_long;
  45 typedef uint32_t tcg_target_ulong;
  46 #define TCG_PRIlx PRIx32
  47 #define TCG_PRIld PRId32
  48 #elif TCG_TARGET_REG_BITS == 64
  49 typedef int64_t tcg_target_long;
  50 typedef uint64_t tcg_target_ulong;
  51 #define TCG_PRIlx PRIx64
  52 #define TCG_PRIld PRId64
  53 #else
  54 #error unsupported
  55 #endif
  56
  57 #if TCG_TARGET_NB_REGS <= 32
  58 typedef uint32_t TCGRegSet;
  59 #elif TCG_TARGET_NB_REGS <= 64
  60 typedef uint64_t TCGRegSet;
  61 #else
  62 #error unsupported
  63 #endif
  64
  65 #if TCG_TARGET_REG_BITS == 32
  66 /* Turn some undef macros into false macros.  */
  67 #define TCG_TARGET_HAS_trunc_shr_i32    0
  68 #define TCG_TARGET_HAS_div_i64          0
  69 #define TCG_TARGET_HAS_rem_i64          0
  70 #define TCG_TARGET_HAS_div2_i64         0
  71 #define TCG_TARGET_HAS_rot_i64          0
  72 #define TCG_TARGET_HAS_ext8s_i64        0
  73 #define TCG_TARGET_HAS_ext16s_i64       0
  74 #define TCG_TARGET_HAS_ext32s_i64       0
  75 #define TCG_TARGET_HAS_ext8u_i64        0
  76 #define TCG_TARGET_HAS_ext16u_i64       0
  77 #define TCG_TARGET_HAS_ext32u_i64       0
  78 #define TCG_TARGET_HAS_bswap16_i64      0
  79 #define TCG_TARGET_HAS_bswap32_i64      0
  80 #define TCG_TARGET_HAS_bswap64_i64      0
  81 #define TCG_TARGET_HAS_neg_i64          0
  82 #define TCG_TARGET_HAS_not_i64          0
  83 #define TCG_TARGET_HAS_andc_i64         0
  84 #define TCG_TARGET_HAS_orc_i64          0
  85 #define TCG_TARGET_HAS_eqv_i64          0
  86 #define TCG_TARGET_HAS_nand_i64         0
  87 #define TCG_TARGET_HAS_nor_i64          0
  88 #define TCG_TARGET_HAS_deposit_i64      0
  89 #define TCG_TARGET_HAS_movcond_i64      0
  90 #define TCG_TARGET_HAS_add2_i64         0
  91 #define TCG_TARGET_HAS_sub2_i64         0
  92 #define TCG_TARGET_HAS_mulu2_i64        0
  93 #define TCG_TARGET_HAS_muls2_i64        0
  94 #define TCG_TARGET_HAS_muluh_i64        0
  95 #define TCG_TARGET_HAS_mulsh_i64        0
  96 /* Turn some undef macros into true macros.  */
  97 #define TCG_TARGET_HAS_add2_i32         1
  98 #define TCG_TARGET_HAS_sub2_i32         1
  99 #endif
 100
 101 #ifndef TCG_TARGET_deposit_i32_valid
 102 #define TCG_TARGET_deposit_i32_valid(ofs, len) 1
 103 #endif
 104 #ifndef TCG_TARGET_deposit_i64_valid
 105 #define TCG_TARGET_deposit_i64_valid(ofs, len) 1
 106 #endif
 107
 108 /* Only one of DIV or DIV2 should be defined.  */
 109 #if defined(TCG_TARGET_HAS_div_i32)
 110 #define TCG_TARGET_HAS_div2_i32         0
 111 #elif defined(TCG_TARGET_HAS_div2_i32)
 112 #define TCG_TARGET_HAS_div_i32          0
 113 #define TCG_TARGET_HAS_rem_i32          0
 114 #endif
 115 #if defined(TCG_TARGET_HAS_div_i64)
 116 #define TCG_TARGET_HAS_div2_i64         0
 117 #elif defined(TCG_TARGET_HAS_div2_i64)
 118 #define TCG_TARGET_HAS_div_i64          0
 119 #define TCG_TARGET_HAS_rem_i64          0
 120 #endif
 121
 122 /* For 32-bit targets, some sort of unsigned widening multiply is required.  */
 123 #if TCG_TARGET_REG_BITS == 32 \
 124     && !(defined(TCG_TARGET_HAS_mulu2_i32) \
 125          || defined(TCG_TARGET_HAS_muluh_i32))
 126 # error "Missing unsigned widening multiply"
 127 #endif
 128
 129 typedef enum TCGOpcode {
 130 #define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name,
 131 #include "tcg-opc.h"
 132 #undef DEF
 133     NB_OPS,
 134 } TCGOpcode;
 135
 136 #define tcg_regset_clear(d) (d) = 0
 137 #define tcg_regset_set(d, s) (d) = (s)
 138 #define tcg_regset_set32(d, reg, val32) (d) |= (val32) << (reg)
 139 #define tcg_regset_set_reg(d, r) (d) |= 1L << (r)
 140 #define tcg_regset_reset_reg(d, r) (d) &= ~(1L << (r))
 141 #define tcg_regset_test_reg(d, r) (((d) >> (r)) & 1)
 142 #define tcg_regset_or(d, a, b) (d) = (a) | (b)
 143 #define tcg_regset_and(d, a, b) (d) = (a) & (b)
 144 #define tcg_regset_andnot(d, a, b) (d) = (a) & ~(b)
 145 #define tcg_regset_not(d, a) (d) = ~(a)
 146
 147 #ifndef TCG_TARGET_INSN_UNIT_SIZE
 148 # error "Missing TCG_TARGET_INSN_UNIT_SIZE"
 149 #elif TCG_TARGET_INSN_UNIT_SIZE == 1
 150 typedef uint8_t tcg_insn_unit;
 151 #elif TCG_TARGET_INSN_UNIT_SIZE == 2
 152 typedef uint16_t tcg_insn_unit;
 153 #elif TCG_TARGET_INSN_UNIT_SIZE == 4
 154 typedef uint32_t tcg_insn_unit;
 155 #elif TCG_TARGET_INSN_UNIT_SIZE == 8
 156 typedef uint64_t tcg_insn_unit;
 157 #else
 158 /* The port better have done this.  */
 159 #endif
 160
 161
 162 typedef struct TCGRelocation {
 163     struct TCGRelocation *next;
 164     int type;
 165     tcg_insn_unit *ptr;
 166     intptr_t addend;
 167 } TCGRelocation;
 168
 169 typedef struct TCGLabel {
 170     int has_value;
 171     union {
 172         uintptr_t value;
 173         tcg_insn_unit *value_ptr;
 174         TCGRelocation *first_reloc;
 175     } u;
 176 } TCGLabel;
 177
 178 typedef struct TCGPool {
 179     struct TCGPool *next;
 180     int size;
 181     uint8_t data[0] __attribute__ ((aligned));
 182 } TCGPool;
 183
 184 #define TCG_POOL_CHUNK_SIZE 32768
 185
 186 #define TCG_MAX_LABELS 512
 187
 188 #define TCG_MAX_TEMPS 512
 189
 190 /* when the size of the arguments of a called function is smaller than
 191    this value, they are statically allocated in the TB stack frame */
 192 #define TCG_STATIC_CALL_ARGS_SIZE 128
 193
 194 typedef enum TCGType {
 195     TCG_TYPE_I32,
 196     TCG_TYPE_I64,
 197     TCG_TYPE_COUNT, /* number of different types */
 198
 199     /* An alias for the size of the host register.  */
 200 #if TCG_TARGET_REG_BITS == 32
 201     TCG_TYPE_REG = TCG_TYPE_I32,
 202 #else
 203     TCG_TYPE_REG = TCG_TYPE_I64,
 204 #endif
 205
 206     /* An alias for the size of the native pointer.  */
 207 #if UINTPTR_MAX == UINT32_MAX
 208     TCG_TYPE_PTR = TCG_TYPE_I32,
 209 #else
 210     TCG_TYPE_PTR = TCG_TYPE_I64,
 211 #endif
 212
 213     /* An alias for the size of the target "long", aka register.  */
 214 #if TARGET_LONG_BITS == 64
 215     TCG_TYPE_TL = TCG_TYPE_I64,
 216 #else
 217     TCG_TYPE_TL = TCG_TYPE_I32,
 218 #endif
 219 } TCGType;
 220
 221 /* Constants for qemu_ld and qemu_st for the Memory Operation field.  */
 222 typedef enum TCGMemOp {
 223     MO_8     = 0,
 224     MO_16    = 1,
 225     MO_32    = 2,
 226     MO_64    = 3,
 227     MO_SIZE  = 3,   /* Mask for the above.  */
 228
 229     MO_SIGN  = 4,   /* Sign-extended, otherwise zero-extended.  */
 230
 231     MO_BSWAP = 8,   /* Host reverse endian.  */
 232 #ifdef HOST_WORDS_BIGENDIAN
 233     MO_LE    = MO_BSWAP,
 234     MO_BE    = 0,
 235 #else
 236     MO_LE    = 0,
 237     MO_BE    = MO_BSWAP,
 238 #endif
 239 #ifdef TARGET_WORDS_BIGENDIAN
 240     MO_TE    = MO_BE,
 241 #else
 242     MO_TE    = MO_LE,
 243 #endif
 244
 245     /* Combinations of the above, for ease of use.  */
 246     MO_UB    = MO_8,
 247     MO_UW    = MO_16,
 248     MO_UL    = MO_32,
 249     MO_SB    = MO_SIGN | MO_8,
 250     MO_SW    = MO_SIGN | MO_16,
 251     MO_SL    = MO_SIGN | MO_32,
 252     MO_Q     = MO_64,
 253
 254     MO_LEUW  = MO_LE | MO_UW,
 255     MO_LEUL  = MO_LE | MO_UL,
 256     MO_LESW  = MO_LE | MO_SW,
 257     MO_LESL  = MO_LE | MO_SL,
 258     MO_LEQ   = MO_LE | MO_Q,
 259
 260     MO_BEUW  = MO_BE | MO_UW,
 261     MO_BEUL  = MO_BE | MO_UL,
 262     MO_BESW  = MO_BE | MO_SW,
 263     MO_BESL  = MO_BE | MO_SL,
 264     MO_BEQ   = MO_BE | MO_Q,
 265
 266     MO_TEUW  = MO_TE | MO_UW,
 267     MO_TEUL  = MO_TE | MO_UL,
 268     MO_TESW  = MO_TE | MO_SW,
 269     MO_TESL  = MO_TE | MO_SL,
 270     MO_TEQ   = MO_TE | MO_Q,
 271
 272     MO_SSIZE = MO_SIZE | MO_SIGN,
 273 } TCGMemOp;
 274
 275 typedef tcg_target_ulong TCGArg;
 276
 277 /* Define a type and accessor macros for variables.  Using pointer types
 278    is nice because it gives some level of type safely.  Converting to and
 279    from intptr_t rather than int reduces the number of sign-extension
 280    instructions that get implied on 64-bit hosts.  Users of tcg_gen_* don't
 281    need to know about any of this, and should treat TCGv as an opaque type.
 282    In addition we do typechecking for different types of variables.  TCGv_i32
 283    and TCGv_i64 are 32/64-bit variables respectively.  TCGv and TCGv_ptr
 284    are aliases for target_ulong and host pointer sized values respectively.  */
 285
 286 typedef struct TCGv_i32_d *TCGv_i32;
 287 typedef struct TCGv_i64_d *TCGv_i64;
 288 typedef struct TCGv_ptr_d *TCGv_ptr;
 289
 290 static inline TCGv_i32 QEMU_ARTIFICIAL MAKE_TCGV_I32(intptr_t i)
 291 {
 292     return (TCGv_i32)i;
 293 }
 294
 295 static inline TCGv_i64 QEMU_ARTIFICIAL MAKE_TCGV_I64(intptr_t i)
 296 {
 297     return (TCGv_i64)i;
 298 }
 299
 300 static inline TCGv_ptr QEMU_ARTIFICIAL MAKE_TCGV_PTR(intptr_t i)
 301 {
 302     return (TCGv_ptr)i;
 303 }
 304
 305 static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_I32(TCGv_i32 t)
 306 {
 307     return (intptr_t)t;
 308 }
 309
 310 static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_I64(TCGv_i64 t)
 311 {
 312     return (intptr_t)t;
 313 }
 314
 315 static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_PTR(TCGv_ptr t)
 316 {
 317     return (intptr_t)t;
 318 }
 319
 320 #if TCG_TARGET_REG_BITS == 32
 321 #define TCGV_LOW(t) MAKE_TCGV_I32(GET_TCGV_I64(t))
 322 #define TCGV_HIGH(t) MAKE_TCGV_I32(GET_TCGV_I64(t) + 1)
 323 #endif
 324
 325 #define TCGV_EQUAL_I32(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
 326 #define TCGV_EQUAL_I64(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
 327 #define TCGV_EQUAL_PTR(a, b) (GET_TCGV_PTR(a) == GET_TCGV_PTR(b))
 328
 329 /* Dummy definition to avoid compiler warnings.  */
 330 #define TCGV_UNUSED_I32(x) x = MAKE_TCGV_I32(-1)
 331 #define TCGV_UNUSED_I64(x) x = MAKE_TCGV_I64(-1)
 332 #define TCGV_UNUSED_PTR(x) x = MAKE_TCGV_PTR(-1)
 333
 334 #define TCGV_IS_UNUSED_I32(x) (GET_TCGV_I32(x) == -1)
 335 #define TCGV_IS_UNUSED_I64(x) (GET_TCGV_I64(x) == -1)
 336 #define TCGV_IS_UNUSED_PTR(x) (GET_TCGV_PTR(x) == -1)
 337
 338 /* call flags */
 339 /* Helper does not read globals (either directly or through an exception). It
 340    implies TCG_CALL_NO_WRITE_GLOBALS. */
 341 #define TCG_CALL_NO_READ_GLOBALS    0x0010
 342 /* Helper does not write globals */
 343 #define TCG_CALL_NO_WRITE_GLOBALS   0x0020
 344 /* Helper can be safely suppressed if the return value is not used. */
 345 #define TCG_CALL_NO_SIDE_EFFECTS    0x0040
 346
 347 /* convenience version of most used call flags */
 348 #define TCG_CALL_NO_RWG         TCG_CALL_NO_READ_GLOBALS
 349 #define TCG_CALL_NO_WG          TCG_CALL_NO_WRITE_GLOBALS
 350 #define TCG_CALL_NO_SE          TCG_CALL_NO_SIDE_EFFECTS
 351 #define TCG_CALL_NO_RWG_SE      (TCG_CALL_NO_RWG | TCG_CALL_NO_SE)
 352 #define TCG_CALL_NO_WG_SE       (TCG_CALL_NO_WG | TCG_CALL_NO_SE)
 353
 354 /* used to align parameters */
 355 #define TCG_CALL_DUMMY_TCGV     MAKE_TCGV_I32(-1)
 356 #define TCG_CALL_DUMMY_ARG      ((TCGArg)(-1))
 357
 358 /* Conditions.  Note that these are laid out for easy manipulation by
 359    the functions below:
 360      bit 0 is used for inverting;
 361      bit 1 is signed,
 362      bit 2 is unsigned,
 363      bit 3 is used with bit 0 for swapping signed/unsigned.  */
 364 typedef enum {
 365     /* non-signed */
 366     TCG_COND_NEVER  = 0 | 0 | 0 | 0,
 367     TCG_COND_ALWAYS = 0 | 0 | 0 | 1,
 368     TCG_COND_EQ     = 8 | 0 | 0 | 0,
 369     TCG_COND_NE     = 8 | 0 | 0 | 1,
 370     /* signed */
 371     TCG_COND_LT     = 0 | 0 | 2 | 0,
 372     TCG_COND_GE     = 0 | 0 | 2 | 1,
 373     TCG_COND_LE     = 8 | 0 | 2 | 0,
 374     TCG_COND_GT     = 8 | 0 | 2 | 1,
 375     /* unsigned */
 376     TCG_COND_LTU    = 0 | 4 | 0 | 0,
 377     TCG_COND_GEU    = 0 | 4 | 0 | 1,
 378     TCG_COND_LEU    = 8 | 4 | 0 | 0,
 379     TCG_COND_GTU    = 8 | 4 | 0 | 1,
 380 } TCGCond;
 381
 382 /* Invert the sense of the comparison.  */
 383 static inline TCGCond tcg_invert_cond(TCGCond c)
 384 {
 385     return (TCGCond)(c ^ 1);
 386 }
 387
 388 /* Swap the operands in a comparison.  */
 389 static inline TCGCond tcg_swap_cond(TCGCond c)
 390 {
 391     return c & 6 ? (TCGCond)(c ^ 9) : c;
 392 }
 393
 394 /* Create an "unsigned" version of a "signed" comparison.  */
 395 static inline TCGCond tcg_unsigned_cond(TCGCond c)
 396 {
 397     return c & 2 ? (TCGCond)(c ^ 6) : c;
 398 }
 399
 400 /* Must a comparison be considered unsigned?  */
 401 static inline bool is_unsigned_cond(TCGCond c)
 402 {
 403     return (c & 4) != 0;
 404 }
 405
 406 /* Create a "high" version of a double-word comparison.
 407    This removes equality from a LTE or GTE comparison.  */
 408 static inline TCGCond tcg_high_cond(TCGCond c)
 409 {
 410     switch (c) {
 411     case TCG_COND_GE:
 412     case TCG_COND_LE:
 413     case TCG_COND_GEU:
 414     case TCG_COND_LEU:
 415         return (TCGCond)(c ^ 8);
 416     default:
 417         return c;
 418     }
 419 }
 420
 421 #define TEMP_VAL_DEAD  0
 422 #define TEMP_VAL_REG   1
 423 #define TEMP_VAL_MEM   2
 424 #define TEMP_VAL_CONST 3
 425
 426 /* XXX: optimize memory layout */
 427 typedef struct TCGTemp {
 428     TCGType base_type;
 429     TCGType type;
 430     int val_type;
 431     int reg;
 432     tcg_target_long val;
 433     int mem_reg;
 434     intptr_t mem_offset;
 435     unsigned int fixed_reg:1;
 436     unsigned int mem_coherent:1;
 437     unsigned int mem_allocated:1;
 438     unsigned int temp_local:1; /* If true, the temp is saved across
 439                                   basic blocks. Otherwise, it is not
 440                                   preserved across basic blocks. */
 441     unsigned int temp_allocated:1; /* never used for code gen */
 442     const char *name;
 443 } TCGTemp;
 444
 445 typedef struct TCGContext TCGContext;
 446
 447 typedef struct TCGTempSet {
 448     unsigned long l[BITS_TO_LONGS(TCG_MAX_TEMPS)];
 449 } TCGTempSet;
 450
 451 typedef struct TCGOp {
 452     TCGOpcode opc   : 8;
 453
 454     /* The number of out and in parameter for a call.  */
 455     unsigned callo  : 2;
 456     unsigned calli  : 6;
 457
 458     /* Index of the arguments for this op, or -1 for zero-operand ops.  */
 459     signed args     : 16;
 460
 461     /* Index of the prex/next op, or -1 for the end of the list.  */
 462     signed prev     : 16;
 463     signed next     : 16;
 464 } TCGOp;
 465
 466 QEMU_BUILD_BUG_ON(NB_OPS > 0xff);
 467 QEMU_BUILD_BUG_ON(OPC_BUF_SIZE >= 0x7fff);
 468 QEMU_BUILD_BUG_ON(OPPARAM_BUF_SIZE >= 0x7fff);
 469
 470 struct TCGContext {
 471     uint8_t *pool_cur, *pool_end;
 472     TCGPool *pool_first, *pool_current, *pool_first_large;
 473     int nb_labels;
 474     int nb_globals;
 475     int nb_temps;
 476
 477     /* goto_tb support */
 478     tcg_insn_unit *code_buf;
 479     uintptr_t *tb_next;
 480     uint16_t *tb_next_offset;
 481     uint16_t *tb_jmp_offset; /* != NULL if USE_DIRECT_JUMP */
 482
 483     /* liveness analysis */
 484     uint16_t *op_dead_args; /* for each operation, each bit tells if the
 485                                corresponding argument is dead */
 486     uint8_t *op_sync_args;  /* for each operation, each bit tells if the
 487                                corresponding output argument needs to be
 488                                sync to memory. */
 489
 490     TCGRegSet reserved_regs;
 491     intptr_t current_frame_offset;
 492     intptr_t frame_start;
 493     intptr_t frame_end;
 494     int frame_reg;
 495
 496     tcg_insn_unit *code_ptr;
 497
 498     GHashTable *helpers;
 499
 500 #ifdef CONFIG_PROFILER
 501     /* profiling info */
 502     int64_t tb_count1;
 503     int64_t tb_count;
 504     int64_t op_count; /* total insn count */
 505     int op_count_max; /* max insn per TB */
 506     int64_t temp_count;
 507     int temp_count_max;
 508     int64_t del_op_count;
 509     int64_t code_in_len;
 510     int64_t code_out_len;
 511     int64_t interm_time;
 512     int64_t code_time;
 513     int64_t la_time;
 514     int64_t opt_time;
 515     int64_t restore_count;
 516     int64_t restore_time;
 517 #endif
 518
 519 #ifdef CONFIG_DEBUG_TCG
 520     int temps_in_use;
 521     int goto_tb_issue_mask;
 522 #endif
 523
 524     int gen_first_op_idx;
 525     int gen_last_op_idx;
 526     int gen_next_op_idx;
 527     int gen_next_parm_idx;
 528
 529     /* Code generation.  Note that we specifically do not use tcg_insn_unit
 530        here, because there's too much arithmetic throughout that relies
 531        on addition and subtraction working on bytes.  Rely on the GCC
 532        extension that allows arithmetic on void*.  */
 533     int code_gen_max_blocks;
 534     void *code_gen_prologue;
 535     void *code_gen_buffer;
 536     size_t code_gen_buffer_size;
 537     /* threshold to flush the translated code buffer */
 538     size_t code_gen_buffer_max_size;
 539     void *code_gen_ptr;
 540
 541     TBContext tb_ctx;
 542
 543     /* The TCGBackendData structure is private to tcg-target.c.  */
 544     struct TCGBackendData *be;
 545
 546     TCGTempSet free_temps[TCG_TYPE_COUNT * 2];
 547     TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */
 548
 549     /* tells in which temporary a given register is. It does not take
 550        into account fixed registers */
 551     int reg_to_temp[TCG_TARGET_NB_REGS];
 552
 553     TCGOp gen_op_buf[OPC_BUF_SIZE];
 554     TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
 555
 556     target_ulong gen_opc_pc[OPC_BUF_SIZE];
 557     uint16_t gen_opc_icount[OPC_BUF_SIZE];
 558     uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
 559
 560     TCGLabel labels[TCG_MAX_LABELS];
 561 };
 562
 563 extern TCGContext tcg_ctx;
 564
 565 /* The number of opcodes emitted so far.  */
 566 static inline int tcg_op_buf_count(void)
 567 {
 568     return tcg_ctx.gen_next_op_idx;
 569 }
 570
 571 /* Test for whether to terminate the TB for using too many opcodes.  */
 572 static inline bool tcg_op_buf_full(void)
 573 {
 574     return tcg_op_buf_count() >= OPC_MAX_SIZE;
 575 }
 576
 577 /* pool based memory allocation */
 578
 579 void *tcg_malloc_internal(TCGContext *s, int size);
 580 void tcg_pool_reset(TCGContext *s);
 581 void tcg_pool_delete(TCGContext *s);
 582
 583 static inline void *tcg_malloc(int size)
 584 {
 585     TCGContext *s = &tcg_ctx;
 586     uint8_t *ptr, *ptr_end;
 587     size = (size + sizeof(long) - 1) & ~(sizeof(long) - 1);
 588     ptr = s->pool_cur;
 589     ptr_end = ptr + size;
 590     if (unlikely(ptr_end > s->pool_end)) {
 591         return tcg_malloc_internal(&tcg_ctx, size);
 592     } else {
 593         s->pool_cur = ptr_end;
 594         return ptr;
 595     }
 596 }
 597
 598 void tcg_context_init(TCGContext *s);
 599 void tcg_prologue_init(TCGContext *s);
 600 void tcg_func_start(TCGContext *s);
 601
 602 int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf);
 603 int tcg_gen_code_search_pc(TCGContext *s, tcg_insn_unit *gen_code_buf,
 604                            long offset);
 605
 606 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size);
 607
 608 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name);
 609 TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name);
 610 TCGv_i32 tcg_temp_new_internal_i32(int temp_local);
 611 static inline TCGv_i32 tcg_temp_new_i32(void)
 612 {
 613     return tcg_temp_new_internal_i32(0);
 614 }
 615 static inline TCGv_i32 tcg_temp_local_new_i32(void)
 616 {
 617     return tcg_temp_new_internal_i32(1);
 618 }
 619 void tcg_temp_free_i32(TCGv_i32 arg);
 620 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg);
 621
 622 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name);
 623 TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name);
 624 TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
 625 static inline TCGv_i64 tcg_temp_new_i64(void)
 626 {
 627     return tcg_temp_new_internal_i64(0);
 628 }
 629 static inline TCGv_i64 tcg_temp_local_new_i64(void)
 630 {
 631     return tcg_temp_new_internal_i64(1);
 632 }
 633 void tcg_temp_free_i64(TCGv_i64 arg);
 634 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg);
 635
 636 #if defined(CONFIG_DEBUG_TCG)
 637 /* If you call tcg_clear_temp_count() at the start of a section of
 638  * code which is not supposed to leak any TCG temporaries, then
 639  * calling tcg_check_temp_count() at the end of the section will
 640  * return 1 if the section did in fact leak a temporary.
 641  */
 642 void tcg_clear_temp_count(void);
 643 int tcg_check_temp_count(void);
 644 #else
 645 #define tcg_clear_temp_count() do { } while (0)
 646 #define tcg_check_temp_count() 0
 647 #endif
 648
 649 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf);
 650 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf);
 651
 652 #define TCG_CT_ALIAS  0x80
 653 #define TCG_CT_IALIAS 0x40
 654 #define TCG_CT_REG    0x01
 655 #define TCG_CT_CONST  0x02 /* any constant of register size */
 656
 657 typedef struct TCGArgConstraint {
 658     uint16_t ct;
 659     uint8_t alias_index;
 660     union {
 661         TCGRegSet regs;
 662     } u;
 663 } TCGArgConstraint;
 664
 665 #define TCG_MAX_OP_ARGS 16
 666
 667 /* Bits for TCGOpDef->flags, 8 bits available.  */
 668 enum {
 669     /* Instruction defines the end of a basic block.  */
 670     TCG_OPF_BB_END       = 0x01,
 671     /* Instruction clobbers call registers and potentially update globals.  */
 672     TCG_OPF_CALL_CLOBBER = 0x02,
 673     /* Instruction has side effects: it cannot be removed if its outputs
 674        are not used, and might trigger exceptions.  */
 675     TCG_OPF_SIDE_EFFECTS = 0x04,
 676     /* Instruction operands are 64-bits (otherwise 32-bits).  */
 677     TCG_OPF_64BIT        = 0x08,
 678     /* Instruction is optional and not implemented by the host, or insn
 679        is generic and should not be implemened by the host.  */
 680     TCG_OPF_NOT_PRESENT  = 0x10,
 681 };
 682
 683 typedef struct TCGOpDef {
 684     const char *name;
 685     uint8_t nb_oargs, nb_iargs, nb_cargs, nb_args;
 686     uint8_t flags;
 687     TCGArgConstraint *args_ct;
 688     int *sorted_args;
 689 #if defined(CONFIG_DEBUG_TCG)
 690     int used;
 691 #endif
 692 } TCGOpDef;
 693
 694 extern TCGOpDef tcg_op_defs[];
 695 extern const size_t tcg_op_defs_max;
 696
 697 typedef struct TCGTargetOpDef {
 698     TCGOpcode op;
 699     const char *args_ct_str[TCG_MAX_OP_ARGS];
 700 } TCGTargetOpDef;
 701
 702 #define tcg_abort() \
 703 do {\
 704     fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\
 705     abort();\
 706 } while (0)
 707
 708 #ifdef CONFIG_DEBUG_TCG
 709 # define tcg_debug_assert(X) do { assert(X); } while (0)
 710 #elif QEMU_GNUC_PREREQ(4, 5)
 711 # define tcg_debug_assert(X) \
 712     do { if (!(X)) { __builtin_unreachable(); } } while (0)
 713 #else
 714 # define tcg_debug_assert(X) do { (void)(X); } while (0)
 715 #endif
 716
 717 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs);
 718
 719 #if UINTPTR_MAX == UINT32_MAX
 720 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I32(n))
 721 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I32(GET_TCGV_PTR(n))
 722
 723 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i32((intptr_t)(V)))
 724 #define tcg_global_reg_new_ptr(R, N) \
 725     TCGV_NAT_TO_PTR(tcg_global_reg_new_i32((R), (N)))
 726 #define tcg_global_mem_new_ptr(R, O, N) \
 727     TCGV_NAT_TO_PTR(tcg_global_mem_new_i32((R), (O), (N)))
 728 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i32())
 729 #define tcg_temp_free_ptr(T) tcg_temp_free_i32(TCGV_PTR_TO_NAT(T))
 730 #else
 731 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I64(n))
 732 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I64(GET_TCGV_PTR(n))
 733
 734 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i64((intptr_t)(V)))
 735 #define tcg_global_reg_new_ptr(R, N) \
 736     TCGV_NAT_TO_PTR(tcg_global_reg_new_i64((R), (N)))
 737 #define tcg_global_mem_new_ptr(R, O, N) \
 738     TCGV_NAT_TO_PTR(tcg_global_mem_new_i64((R), (O), (N)))
 739 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i64())
 740 #define tcg_temp_free_ptr(T) tcg_temp_free_i64(TCGV_PTR_TO_NAT(T))
 741 #endif
 742
 743 void tcg_gen_callN(TCGContext *s, void *func,
 744                    TCGArg ret, int nargs, TCGArg *args);
 745
 746 void tcg_op_remove(TCGContext *s, TCGOp *op);
 747 void tcg_optimize(TCGContext *s);
 748
 749 /* only used for debugging purposes */
 750 void tcg_dump_ops(TCGContext *s);
 751
 752 void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf);
 753 TCGv_i32 tcg_const_i32(int32_t val);
 754 TCGv_i64 tcg_const_i64(int64_t val);
 755 TCGv_i32 tcg_const_local_i32(int32_t val);
 756 TCGv_i64 tcg_const_local_i64(int64_t val);
 757
 758 /**
 759  * tcg_ptr_byte_diff
 760  * @a, @b: addresses to be differenced
 761  *
 762  * There are many places within the TCG backends where we need a byte
 763  * difference between two pointers.  While this can be accomplished
 764  * with local casting, it's easy to get wrong -- especially if one is
 765  * concerned with the signedness of the result.
 766  *
 767  * This version relies on GCC's void pointer arithmetic to get the
 768  * correct result.
 769  */
 770
 771 static inline ptrdiff_t tcg_ptr_byte_diff(void *a, void *b)
 772 {
 773     return a - b;
 774 }
 775
 776 /**
 777  * tcg_pcrel_diff
 778  * @s: the tcg context
 779  * @target: address of the target
 780  *
 781  * Produce a pc-relative difference, from the current code_ptr
 782  * to the destination address.
 783  */
 784
 785 static inline ptrdiff_t tcg_pcrel_diff(TCGContext *s, void *target)
 786 {
 787     return tcg_ptr_byte_diff(target, s->code_ptr);
 788 }
 789
 790 /**
 791  * tcg_current_code_size
 792  * @s: the tcg context
 793  *
 794  * Compute the current code size within the translation block.
 795  * This is used to fill in qemu's data structures for goto_tb.
 796  */
 797
 798 static inline size_t tcg_current_code_size(TCGContext *s)
 799 {
 800     return tcg_ptr_byte_diff(s->code_ptr, s->code_buf);
 801 }
 802
 803 /**
 804  * tcg_qemu_tb_exec:
 805  * @env: CPUArchState * for the CPU
 806  * @tb_ptr: address of generated code for the TB to execute
 807  *
 808  * Start executing code from a given translation block.
 809  * Where translation blocks have been linked, execution
 810  * may proceed from the given TB into successive ones.
 811  * Control eventually returns only when some action is needed
 812  * from the top-level loop: either control must pass to a TB
 813  * which has not yet been directly linked, or an asynchronous
 814  * event such as an interrupt needs handling.
 815  *
 816  * The return value is a pointer to the next TB to execute
 817  * (if known; otherwise zero). This pointer is assumed to be
 818  * 4-aligned, and the bottom two bits are used to return further
 819  * information:
 820  *  0, 1: the link between this TB and the next is via the specified
 821  *        TB index (0 or 1). That is, we left the TB via (the equivalent
 822  *        of) "goto_tb <index>". The main loop uses this to determine
 823  *        how to link the TB just executed to the next.
 824  *  2:    we are using instruction counting code generation, and we
 825  *        did not start executing this TB because the instruction counter
 826  *        would hit zero midway through it. In this case the next-TB pointer
 827  *        returned is the TB we were about to execute, and the caller must
 828  *        arrange to execute the remaining count of instructions.
 829  *  3:    we stopped because the CPU's exit_request flag was set
 830  *        (usually meaning that there is an interrupt that needs to be
 831  *        handled). The next-TB pointer returned is the TB we were
 832  *        about to execute when we noticed the pending exit request.
 833  *
 834  * If the bottom two bits indicate an exit-via-index then the CPU
 835  * state is correctly synchronised and ready for execution of the next
 836  * TB (and in particular the guest PC is the address to execute next).
 837  * Otherwise, we gave up on execution of this TB before it started, and
 838  * the caller must fix up the CPU state by calling cpu_pc_from_tb()
 839  * with the next-TB pointer we return.
 840  *
 841  * Note that TCG targets may use a different definition of tcg_qemu_tb_exec
 842  * to this default (which just calls the prologue.code emitted by
 843  * tcg_target_qemu_prologue()).
 844  */
 845 #define TB_EXIT_MASK 3
 846 #define TB_EXIT_IDX0 0
 847 #define TB_EXIT_IDX1 1
 848 #define TB_EXIT_ICOUNT_EXPIRED 2
 849 #define TB_EXIT_REQUESTED 3
 850
 851 #if !defined(tcg_qemu_tb_exec)
 852 # define tcg_qemu_tb_exec(env, tb_ptr) \
 853     ((uintptr_t (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, tb_ptr)
 854 #endif
 855
 856 void tcg_register_jit(void *buf, size_t buf_size);
 857
 858 /*
 859  * Memory helpers that will be used by TCG generated code.
 860  */
 861 #ifdef CONFIG_SOFTMMU
 862 /* Value zero-extended to tcg register size.  */
 863 tcg_target_ulong helper_ret_ldub_mmu(CPUArchState *env, target_ulong addr,
 864                                      int mmu_idx, uintptr_t retaddr);
 865 tcg_target_ulong helper_le_lduw_mmu(CPUArchState *env, target_ulong addr,
 866                                     int mmu_idx, uintptr_t retaddr);
 867 tcg_target_ulong helper_le_ldul_mmu(CPUArchState *env, target_ulong addr,
 868                                     int mmu_idx, uintptr_t retaddr);
 869 uint64_t helper_le_ldq_mmu(CPUArchState *env, target_ulong addr,
 870                            int mmu_idx, uintptr_t retaddr);
 871 tcg_target_ulong helper_be_lduw_mmu(CPUArchState *env, target_ulong addr,
 872                                     int mmu_idx, uintptr_t retaddr);
 873 tcg_target_ulong helper_be_ldul_mmu(CPUArchState *env, target_ulong addr,
 874                                     int mmu_idx, uintptr_t retaddr);
 875 uint64_t helper_be_ldq_mmu(CPUArchState *env, target_ulong addr,
 876                            int mmu_idx, uintptr_t retaddr);
 877
 878 /* Value sign-extended to tcg register size.  */
 879 tcg_target_ulong helper_ret_ldsb_mmu(CPUArchState *env, target_ulong addr,
 880                                      int mmu_idx, uintptr_t retaddr);
 881 tcg_target_ulong helper_le_ldsw_mmu(CPUArchState *env, target_ulong addr,
 882                                     int mmu_idx, uintptr_t retaddr);
 883 tcg_target_ulong helper_le_ldsl_mmu(CPUArchState *env, target_ulong addr,
 884                                     int mmu_idx, uintptr_t retaddr);
 885 tcg_target_ulong helper_be_ldsw_mmu(CPUArchState *env, target_ulong addr,
 886                                     int mmu_idx, uintptr_t retaddr);
 887 tcg_target_ulong helper_be_ldsl_mmu(CPUArchState *env, target_ulong addr,
 888                                     int mmu_idx, uintptr_t retaddr);
 889
 890 void helper_ret_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,
 891                         int mmu_idx, uintptr_t retaddr);
 892 void helper_le_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
 893                        int mmu_idx, uintptr_t retaddr);
 894 void helper_le_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
 895                        int mmu_idx, uintptr_t retaddr);
 896 void helper_le_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
 897                        int mmu_idx, uintptr_t retaddr);
 898 void helper_be_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
 899                        int mmu_idx, uintptr_t retaddr);
 900 void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
 901                        int mmu_idx, uintptr_t retaddr);
 902 void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
 903                        int mmu_idx, uintptr_t retaddr);
 904
 905 /* Temporary aliases until backends are converted.  */
 906 #ifdef TARGET_WORDS_BIGENDIAN
 907 # define helper_ret_ldsw_mmu  helper_be_ldsw_mmu
 908 # define helper_ret_lduw_mmu  helper_be_lduw_mmu
 909 # define helper_ret_ldsl_mmu  helper_be_ldsl_mmu
 910 # define helper_ret_ldul_mmu  helper_be_ldul_mmu
 911 # define helper_ret_ldq_mmu   helper_be_ldq_mmu
 912 # define helper_ret_stw_mmu   helper_be_stw_mmu
 913 # define helper_ret_stl_mmu   helper_be_stl_mmu
 914 # define helper_ret_stq_mmu   helper_be_stq_mmu
 915 #else
 916 # define helper_ret_ldsw_mmu  helper_le_ldsw_mmu
 917 # define helper_ret_lduw_mmu  helper_le_lduw_mmu
 918 # define helper_ret_ldsl_mmu  helper_le_ldsl_mmu
 919 # define helper_ret_ldul_mmu  helper_le_ldul_mmu
 920 # define helper_ret_ldq_mmu   helper_le_ldq_mmu
 921 # define helper_ret_stw_mmu   helper_le_stw_mmu
 922 # define helper_ret_stl_mmu   helper_le_stl_mmu
 923 # define helper_ret_stq_mmu   helper_le_stq_mmu
 924 #endif
 925
 926 #endif /* CONFIG_SOFTMMU */
 927
 928 #endif /* TCG_H */