hw/arm/spitz.c

   1 /*
   2  * PXA270-based Clamshell PDA platforms.
   3  *
   4  * Copyright (c) 2006 Openedhand Ltd.
   5  * Written by Andrzej Zaborowski <balrog@zabor.org>
   6  *
   7  * This code is licensed under the GNU GPL v2.
   8  *
   9  * Contributions after 2012-01-13 are licensed under the terms of the
  10  * GNU GPL, version 2 or (at your option) any later version.
  11  */
  12
  13 #include "qemu/osdep.h"
  14 #include "qapi/error.h"
  15 #include "hw/hw.h"
  16 #include "hw/arm/pxa.h"
  17 #include "hw/arm/arm.h"
  18 #include "sysemu/sysemu.h"
  19 #include "hw/pcmcia.h"
  20 #include "hw/i2c/i2c.h"
  21 #include "hw/ssi/ssi.h"
  22 #include "hw/block/flash.h"
  23 #include "qemu/timer.h"
  24 #include "hw/devices.h"
  25 #include "hw/arm/sharpsl.h"
  26 #include "ui/console.h"
  27 #include "hw/audio/wm8750.h"
  28 #include "audio/audio.h"
  29 #include "hw/boards.h"
  30 #include "hw/sysbus.h"
  31 #include "exec/address-spaces.h"
  32 #include "cpu.h"
  33
  34 #undef REG_FMT
  35 #define REG_FMT                 "0x%02lx"
  36
  37 /* Spitz Flash */
  38 #define FLASH_BASE              0x0c000000
  39 #define FLASH_ECCLPLB           0x00    /* Line parity 7 - 0 bit */
  40 #define FLASH_ECCLPUB           0x04    /* Line parity 15 - 8 bit */
  41 #define FLASH_ECCCP             0x08    /* Column parity 5 - 0 bit */
  42 #define FLASH_ECCCNTR           0x0c    /* ECC byte counter */
  43 #define FLASH_ECCCLRR           0x10    /* Clear ECC */
  44 #define FLASH_FLASHIO           0x14    /* Flash I/O */
  45 #define FLASH_FLASHCTL          0x18    /* Flash Control */
  46
  47 #define FLASHCTL_CE0            (1 << 0)
  48 #define FLASHCTL_CLE            (1 << 1)
  49 #define FLASHCTL_ALE            (1 << 2)
  50 #define FLASHCTL_WP             (1 << 3)
  51 #define FLASHCTL_CE1            (1 << 4)
  52 #define FLASHCTL_RYBY           (1 << 5)
  53 #define FLASHCTL_NCE            (FLASHCTL_CE0 | FLASHCTL_CE1)
  54
  55 #define TYPE_SL_NAND "sl-nand"
  56 #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
  57
  58 typedef struct {
  59     SysBusDevice parent_obj;
  60
  61     MemoryRegion iomem;
  62     DeviceState *nand;
  63     uint8_t ctl;
  64     uint8_t manf_id;
  65     uint8_t chip_id;
  66     ECCState ecc;
  67 } SLNANDState;
  68
  69 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
  70 {
  71     SLNANDState *s = (SLNANDState *) opaque;
  72     int ryby;
  73
  74     switch (addr) {
  75 #define BSHR(byte, from, to)    ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
  76     case FLASH_ECCLPLB:
  77         return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
  78                 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
  79
  80 #define BSHL(byte, from, to)    ((s->ecc.lp[byte] << (to - from)) & (1 << to))
  81     case FLASH_ECCLPUB:
  82         return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
  83                 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
  84
  85     case FLASH_ECCCP:
  86         return s->ecc.cp;
  87
  88     case FLASH_ECCCNTR:
  89         return s->ecc.count & 0xff;
  90
  91     case FLASH_FLASHCTL:
  92         nand_getpins(s->nand, &ryby);
  93         if (ryby)
  94             return s->ctl | FLASHCTL_RYBY;
  95         else
  96             return s->ctl;
  97
  98     case FLASH_FLASHIO:
  99         if (size == 4) {
 100             return ecc_digest(&s->ecc, nand_getio(s->nand)) |
 101                 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
 102         }
 103         return ecc_digest(&s->ecc, nand_getio(s->nand));
 104
 105     default:
 106         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 107     }
 108     return 0;
 109 }
 110
 111 static void sl_write(void *opaque, hwaddr addr,
 112                      uint64_t value, unsigned size)
 113 {
 114     SLNANDState *s = (SLNANDState *) opaque;
 115
 116     switch (addr) {
 117     case FLASH_ECCCLRR:
 118         /* Value is ignored.  */
 119         ecc_reset(&s->ecc);
 120         break;
 121
 122     case FLASH_FLASHCTL:
 123         s->ctl = value & 0xff & ~FLASHCTL_RYBY;
 124         nand_setpins(s->nand,
 125                         s->ctl & FLASHCTL_CLE,
 126                         s->ctl & FLASHCTL_ALE,
 127                         s->ctl & FLASHCTL_NCE,
 128                         s->ctl & FLASHCTL_WP,
 129                         0);
 130         break;
 131
 132     case FLASH_FLASHIO:
 133         nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
 134         break;
 135
 136     default:
 137         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 138     }
 139 }
 140
 141 enum {
 142     FLASH_128M,
 143     FLASH_1024M,
 144 };
 145
 146 static const MemoryRegionOps sl_ops = {
 147     .read = sl_read,
 148     .write = sl_write,
 149     .endianness = DEVICE_NATIVE_ENDIAN,
 150 };
 151
 152 static void sl_flash_register(PXA2xxState *cpu, int size)
 153 {
 154     DeviceState *dev;
 155
 156     dev = qdev_create(NULL, TYPE_SL_NAND);
 157
 158     qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
 159     if (size == FLASH_128M)
 160         qdev_prop_set_uint8(dev, "chip_id", 0x73);
 161     else if (size == FLASH_1024M)
 162         qdev_prop_set_uint8(dev, "chip_id", 0xf1);
 163
 164     qdev_init_nofail(dev);
 165     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
 166 }
 167
 168 static void sl_nand_init(Object *obj)
 169 {
 170     SLNANDState *s = SL_NAND(obj);
 171     SysBusDevice *dev = SYS_BUS_DEVICE(obj);
 172     DriveInfo *nand;
 173
 174     s->ctl = 0;
 175     /* FIXME use a qdev drive property instead of drive_get() */
 176     nand = drive_get(IF_MTD, 0, 0);
 177     s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL,
 178                         s->manf_id, s->chip_id);
 179
 180     memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40);
 181     sysbus_init_mmio(dev, &s->iomem);
 182 }
 183
 184 /* Spitz Keyboard */
 185
 186 #define SPITZ_KEY_STROBE_NUM    11
 187 #define SPITZ_KEY_SENSE_NUM     7
 188
 189 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
 190     12, 17, 91, 34, 36, 38, 39
 191 };
 192
 193 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
 194     88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
 195 };
 196
 197 /* Eighth additional row maps the special keys */
 198 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
 199     { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
 200     {  -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
 201     { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25,  -1 ,  -1 ,  -1  },
 202     { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26,  -1 , 0x36,  -1  },
 203     { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34,  -1 , 0x1c, 0x2a,  -1  },
 204     { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33,  -1 , 0x48,  -1 ,  -1 , 0x38 },
 205     { 0x37, 0x3d,  -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d,  -1 ,  -1  },
 206     { 0x52, 0x43, 0x01, 0x47, 0x49,  -1 ,  -1 ,  -1 ,  -1 ,  -1 ,  -1  },
 207 };
 208
 209 #define SPITZ_GPIO_AK_INT       13      /* Remote control */
 210 #define SPITZ_GPIO_SYNC         16      /* Sync button */
 211 #define SPITZ_GPIO_ON_KEY       95      /* Power button */
 212 #define SPITZ_GPIO_SWA          97      /* Lid */
 213 #define SPITZ_GPIO_SWB          96      /* Tablet mode */
 214
 215 /* The special buttons are mapped to unused keys */
 216 static const int spitz_gpiomap[5] = {
 217     SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
 218     SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
 219 };
 220
 221 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
 222 #define SPITZ_KEYBOARD(obj) \
 223     OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
 224
 225 typedef struct {
 226     SysBusDevice parent_obj;
 227
 228     qemu_irq sense[SPITZ_KEY_SENSE_NUM];
 229     qemu_irq gpiomap[5];
 230     int keymap[0x80];
 231     uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
 232     uint16_t strobe_state;
 233     uint16_t sense_state;
 234
 235     uint16_t pre_map[0x100];
 236     uint16_t modifiers;
 237     uint16_t imodifiers;
 238     uint8_t fifo[16];
 239     int fifopos, fifolen;
 240     QEMUTimer *kbdtimer;
 241 } SpitzKeyboardState;
 242
 243 static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
 244 {
 245     int i;
 246     uint16_t strobe, sense = 0;
 247     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
 248         strobe = s->keyrow[i] & s->strobe_state;
 249         if (strobe) {
 250             sense |= 1 << i;
 251             if (!(s->sense_state & (1 << i)))
 252                 qemu_irq_raise(s->sense[i]);
 253         } else if (s->sense_state & (1 << i))
 254             qemu_irq_lower(s->sense[i]);
 255     }
 256
 257     s->sense_state = sense;
 258 }
 259
 260 static void spitz_keyboard_strobe(void *opaque, int line, int level)
 261 {
 262     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 263
 264     if (level)
 265         s->strobe_state |= 1 << line;
 266     else
 267         s->strobe_state &= ~(1 << line);
 268     spitz_keyboard_sense_update(s);
 269 }
 270
 271 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
 272 {
 273     int spitz_keycode = s->keymap[keycode & 0x7f];
 274     if (spitz_keycode == -1)
 275         return;
 276
 277     /* Handle the additional keys */
 278     if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
 279         qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
 280         return;
 281     }
 282
 283     if (keycode & 0x80)
 284         s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
 285     else
 286         s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
 287
 288     spitz_keyboard_sense_update(s);
 289 }
 290
 291 #define SPITZ_MOD_SHIFT   (1 << 7)
 292 #define SPITZ_MOD_CTRL    (1 << 8)
 293 #define SPITZ_MOD_FN      (1 << 9)
 294
 295 #define QUEUE_KEY(c)    s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
 296
 297 static void spitz_keyboard_handler(void *opaque, int keycode)
 298 {
 299     SpitzKeyboardState *s = opaque;
 300     uint16_t code;
 301     int mapcode;
 302     switch (keycode) {
 303     case 0x2a:  /* Left Shift */
 304         s->modifiers |= 1;
 305         break;
 306     case 0xaa:
 307         s->modifiers &= ~1;
 308         break;
 309     case 0x36:  /* Right Shift */
 310         s->modifiers |= 2;
 311         break;
 312     case 0xb6:
 313         s->modifiers &= ~2;
 314         break;
 315     case 0x1d:  /* Control */
 316         s->modifiers |= 4;
 317         break;
 318     case 0x9d:
 319         s->modifiers &= ~4;
 320         break;
 321     case 0x38:  /* Alt */
 322         s->modifiers |= 8;
 323         break;
 324     case 0xb8:
 325         s->modifiers &= ~8;
 326         break;
 327     }
 328
 329     code = s->pre_map[mapcode = ((s->modifiers & 3) ?
 330             (keycode | SPITZ_MOD_SHIFT) :
 331             (keycode & ~SPITZ_MOD_SHIFT))];
 332
 333     if (code != mapcode) {
 334 #if 0
 335         if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) {
 336             QUEUE_KEY(0x2a | (keycode & 0x80));
 337         }
 338         if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) {
 339             QUEUE_KEY(0x1d | (keycode & 0x80));
 340         }
 341         if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) {
 342             QUEUE_KEY(0x38 | (keycode & 0x80));
 343         }
 344         if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) {
 345             QUEUE_KEY(0x2a | (~keycode & 0x80));
 346         }
 347         if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) {
 348             QUEUE_KEY(0x36 | (~keycode & 0x80));
 349         }
 350 #else
 351         if (keycode & 0x80) {
 352             if ((s->imodifiers & 1   ) && !(s->modifiers & 1))
 353                 QUEUE_KEY(0x2a | 0x80);
 354             if ((s->imodifiers & 4   ) && !(s->modifiers & 4))
 355                 QUEUE_KEY(0x1d | 0x80);
 356             if ((s->imodifiers & 8   ) && !(s->modifiers & 8))
 357                 QUEUE_KEY(0x38 | 0x80);
 358             if ((s->imodifiers & 0x10) && (s->modifiers & 1))
 359                 QUEUE_KEY(0x2a);
 360             if ((s->imodifiers & 0x20) && (s->modifiers & 2))
 361                 QUEUE_KEY(0x36);
 362             s->imodifiers = 0;
 363         } else {
 364             if ((code & SPITZ_MOD_SHIFT) &&
 365                 !((s->modifiers | s->imodifiers) & 1)) {
 366                 QUEUE_KEY(0x2a);
 367                 s->imodifiers |= 1;
 368             }
 369             if ((code & SPITZ_MOD_CTRL) &&
 370                 !((s->modifiers | s->imodifiers) & 4)) {
 371                 QUEUE_KEY(0x1d);
 372                 s->imodifiers |= 4;
 373             }
 374             if ((code & SPITZ_MOD_FN) &&
 375                 !((s->modifiers | s->imodifiers) & 8)) {
 376                 QUEUE_KEY(0x38);
 377                 s->imodifiers |= 8;
 378             }
 379             if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) &&
 380                             !(s->imodifiers & 0x10)) {
 381                 QUEUE_KEY(0x2a | 0x80);
 382                 s->imodifiers |= 0x10;
 383             }
 384             if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) &&
 385                             !(s->imodifiers & 0x20)) {
 386                 QUEUE_KEY(0x36 | 0x80);
 387                 s->imodifiers |= 0x20;
 388             }
 389         }
 390 #endif
 391     }
 392
 393     QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
 394 }
 395
 396 static void spitz_keyboard_tick(void *opaque)
 397 {
 398     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 399
 400     if (s->fifolen) {
 401         spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
 402         s->fifolen --;
 403         if (s->fifopos >= 16)
 404             s->fifopos = 0;
 405     }
 406
 407     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
 408                    NANOSECONDS_PER_SECOND / 32);
 409 }
 410
 411 static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
 412 {
 413     int i;
 414     for (i = 0; i < 0x100; i ++)
 415         s->pre_map[i] = i;
 416     s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */
 417     s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */
 418     s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */
 419     s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */
 420     s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */
 421     s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */
 422     s->pre_map[0x28]                   = 0x08 | SPITZ_MOD_SHIFT; /* ' */
 423     s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */
 424     s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */
 425     s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */
 426     s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */
 427     s->pre_map[0xd3]                   = 0x0e | SPITZ_MOD_FN;    /* Delete */
 428     s->pre_map[0x3a]                   = 0x0f | SPITZ_MOD_FN;    /* Caps_Lock */
 429     s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN;    /* ^ */
 430     s->pre_map[0x0d]                   = 0x12 | SPITZ_MOD_FN;    /* equal */
 431     s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN;    /* plus */
 432     s->pre_map[0x1a]                   = 0x14 | SPITZ_MOD_FN;    /* [ */
 433     s->pre_map[0x1b]                   = 0x15 | SPITZ_MOD_FN;    /* ] */
 434     s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN;    /* { */
 435     s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN;    /* } */
 436     s->pre_map[0x27]                   = 0x22 | SPITZ_MOD_FN;    /* semicolon */
 437     s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN;    /* colon */
 438     s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN;    /* asterisk */
 439     s->pre_map[0x2b]                   = 0x25 | SPITZ_MOD_FN;    /* backslash */
 440     s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN;    /* bar */
 441     s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN;    /* _ */
 442     s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN;    /* less */
 443     s->pre_map[0x35]                   = 0x33 | SPITZ_MOD_SHIFT; /* slash */
 444     s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN;    /* greater */
 445     s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */
 446     s->pre_map[0x49]                   = 0x48 | SPITZ_MOD_FN;    /* Page_Up */
 447     s->pre_map[0x51]                   = 0x50 | SPITZ_MOD_FN;    /* Page_Down */
 448
 449     s->modifiers = 0;
 450     s->imodifiers = 0;
 451     s->fifopos = 0;
 452     s->fifolen = 0;
 453 }
 454
 455 #undef SPITZ_MOD_SHIFT
 456 #undef SPITZ_MOD_CTRL
 457 #undef SPITZ_MOD_FN
 458
 459 static int spitz_keyboard_post_load(void *opaque, int version_id)
 460 {
 461     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 462
 463     /* Release all pressed keys */
 464     memset(s->keyrow, 0, sizeof(s->keyrow));
 465     spitz_keyboard_sense_update(s);
 466     s->modifiers = 0;
 467     s->imodifiers = 0;
 468     s->fifopos = 0;
 469     s->fifolen = 0;
 470
 471     return 0;
 472 }
 473
 474 static void spitz_keyboard_register(PXA2xxState *cpu)
 475 {
 476     int i;
 477     DeviceState *dev;
 478     SpitzKeyboardState *s;
 479
 480     dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
 481     s = SPITZ_KEYBOARD(dev);
 482
 483     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
 484         qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
 485
 486     for (i = 0; i < 5; i ++)
 487         s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
 488
 489     if (!graphic_rotate)
 490         s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
 491
 492     for (i = 0; i < 5; i++)
 493         qemu_set_irq(s->gpiomap[i], 0);
 494
 495     for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
 496         qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
 497                 qdev_get_gpio_in(dev, i));
 498
 499     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 500
 501     qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
 502 }
 503
 504 static void spitz_keyboard_init(Object *obj)
 505 {
 506     DeviceState *dev = DEVICE(obj);
 507     SpitzKeyboardState *s = SPITZ_KEYBOARD(obj);
 508     int i, j;
 509
 510     for (i = 0; i < 0x80; i ++)
 511         s->keymap[i] = -1;
 512     for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
 513         for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
 514             if (spitz_keymap[i][j] != -1)
 515                 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
 516
 517     spitz_keyboard_pre_map(s);
 518
 519     s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
 520     qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
 521     qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
 522 }
 523
 524 /* LCD backlight controller */
 525
 526 #define LCDTG_RESCTL    0x00
 527 #define LCDTG_PHACTRL   0x01
 528 #define LCDTG_DUTYCTRL  0x02
 529 #define LCDTG_POWERREG0 0x03
 530 #define LCDTG_POWERREG1 0x04
 531 #define LCDTG_GPOR3     0x05
 532 #define LCDTG_PICTRL    0x06
 533 #define LCDTG_POLCTRL   0x07
 534
 535 typedef struct {
 536     SSISlave ssidev;
 537     uint32_t bl_intensity;
 538     uint32_t bl_power;
 539 } SpitzLCDTG;
 540
 541 static void spitz_bl_update(SpitzLCDTG *s)
 542 {
 543     if (s->bl_power && s->bl_intensity)
 544         zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
 545     else
 546         zaurus_printf("LCD Backlight now off\n");
 547 }
 548
 549 /* FIXME: Implement GPIO properly and remove this hack.  */
 550 static SpitzLCDTG *spitz_lcdtg;
 551
 552 static inline void spitz_bl_bit5(void *opaque, int line, int level)
 553 {
 554     SpitzLCDTG *s = spitz_lcdtg;
 555     int prev = s->bl_intensity;
 556
 557     if (level)
 558         s->bl_intensity &= ~0x20;
 559     else
 560         s->bl_intensity |= 0x20;
 561
 562     if (s->bl_power && prev != s->bl_intensity)
 563         spitz_bl_update(s);
 564 }
 565
 566 static inline void spitz_bl_power(void *opaque, int line, int level)
 567 {
 568     SpitzLCDTG *s = spitz_lcdtg;
 569     s->bl_power = !!level;
 570     spitz_bl_update(s);
 571 }
 572
 573 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
 574 {
 575     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 576     int addr;
 577     addr = value >> 5;
 578     value &= 0x1f;
 579
 580     switch (addr) {
 581     case LCDTG_RESCTL:
 582         if (value)
 583             zaurus_printf("LCD in QVGA mode\n");
 584         else
 585             zaurus_printf("LCD in VGA mode\n");
 586         break;
 587
 588     case LCDTG_DUTYCTRL:
 589         s->bl_intensity &= ~0x1f;
 590         s->bl_intensity |= value;
 591         if (s->bl_power)
 592             spitz_bl_update(s);
 593         break;
 594
 595     case LCDTG_POWERREG0:
 596         /* Set common voltage to M62332FP */
 597         break;
 598     }
 599     return 0;
 600 }
 601
 602 static void spitz_lcdtg_realize(SSISlave *dev, Error **errp)
 603 {
 604     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 605
 606     spitz_lcdtg = s;
 607     s->bl_power = 0;
 608     s->bl_intensity = 0x20;
 609 }
 610
 611 /* SSP devices */
 612
 613 #define CORGI_SSP_PORT          2
 614
 615 #define SPITZ_GPIO_LCDCON_CS    53
 616 #define SPITZ_GPIO_ADS7846_CS   14
 617 #define SPITZ_GPIO_MAX1111_CS   20
 618 #define SPITZ_GPIO_TP_INT       11
 619
 620 static DeviceState *max1111;
 621
 622 /* "Demux" the signal based on current chipselect */
 623 typedef struct {
 624     SSISlave ssidev;
 625     SSIBus *bus[3];
 626     uint32_t enable[3];
 627 } CorgiSSPState;
 628
 629 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
 630 {
 631     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
 632     int i;
 633
 634     for (i = 0; i < 3; i++) {
 635         if (s->enable[i]) {
 636             return ssi_transfer(s->bus[i], value);
 637         }
 638     }
 639     return 0;
 640 }
 641
 642 static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
 643 {
 644     CorgiSSPState *s = (CorgiSSPState *)opaque;
 645     assert(line >= 0 && line < 3);
 646     s->enable[line] = !level;
 647 }
 648
 649 #define MAX1111_BATT_VOLT       1
 650 #define MAX1111_BATT_TEMP       2
 651 #define MAX1111_ACIN_VOLT       3
 652
 653 #define SPITZ_BATTERY_TEMP      0xe0    /* About 2.9V */
 654 #define SPITZ_BATTERY_VOLT      0xd0    /* About 4.0V */
 655 #define SPITZ_CHARGEON_ACIN     0x80    /* About 5.0V */
 656
 657 static void spitz_adc_temp_on(void *opaque, int line, int level)
 658 {
 659     if (!max1111)
 660         return;
 661
 662     if (level)
 663         max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
 664     else
 665         max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 666 }
 667
 668 static void corgi_ssp_realize(SSISlave *d, Error **errp)
 669 {
 670     DeviceState *dev = DEVICE(d);
 671     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d);
 672
 673     qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3);
 674     s->bus[0] = ssi_create_bus(dev, "ssi0");
 675     s->bus[1] = ssi_create_bus(dev, "ssi1");
 676     s->bus[2] = ssi_create_bus(dev, "ssi2");
 677 }
 678
 679 static void spitz_ssp_attach(PXA2xxState *cpu)
 680 {
 681     DeviceState *mux;
 682     DeviceState *dev;
 683     void *bus;
 684
 685     mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
 686
 687     bus = qdev_get_child_bus(mux, "ssi0");
 688     ssi_create_slave(bus, "spitz-lcdtg");
 689
 690     bus = qdev_get_child_bus(mux, "ssi1");
 691     dev = ssi_create_slave(bus, "ads7846");
 692     qdev_connect_gpio_out(dev, 0,
 693                           qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
 694
 695     bus = qdev_get_child_bus(mux, "ssi2");
 696     max1111 = ssi_create_slave(bus, "max1111");
 697     max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
 698     max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 699     max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
 700
 701     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
 702                         qdev_get_gpio_in(mux, 0));
 703     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
 704                         qdev_get_gpio_in(mux, 1));
 705     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
 706                         qdev_get_gpio_in(mux, 2));
 707 }
 708
 709 /* CF Microdrive */
 710
 711 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
 712 {
 713     PCMCIACardState *md;
 714     DriveInfo *dinfo;
 715
 716     dinfo = drive_get(IF_IDE, 0, 0);
 717     if (!dinfo || dinfo->media_cd)
 718         return;
 719     md = dscm1xxxx_init(dinfo);
 720     pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
 721 }
 722
 723 /* Wm8750 and Max7310 on I2C */
 724
 725 #define AKITA_MAX_ADDR  0x18
 726 #define SPITZ_WM_ADDRL  0x1b
 727 #define SPITZ_WM_ADDRH  0x1a
 728
 729 #define SPITZ_GPIO_WM   5
 730
 731 static void spitz_wm8750_addr(void *opaque, int line, int level)
 732 {
 733     I2CSlave *wm = (I2CSlave *) opaque;
 734     if (level)
 735         i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
 736     else
 737         i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
 738 }
 739
 740 static void spitz_i2c_setup(PXA2xxState *cpu)
 741 {
 742     /* Attach the CPU on one end of our I2C bus.  */
 743     I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
 744
 745     DeviceState *wm;
 746
 747     /* Attach a WM8750 to the bus */
 748     wm = i2c_create_slave(bus, TYPE_WM8750, 0);
 749
 750     spitz_wm8750_addr(wm, 0, 0);
 751     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
 752                           qemu_allocate_irq(spitz_wm8750_addr, wm, 0));
 753     /* .. and to the sound interface.  */
 754     cpu->i2s->opaque = wm;
 755     cpu->i2s->codec_out = wm8750_dac_dat;
 756     cpu->i2s->codec_in = wm8750_adc_dat;
 757     wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
 758 }
 759
 760 static void spitz_akita_i2c_setup(PXA2xxState *cpu)
 761 {
 762     /* Attach a Max7310 to Akita I2C bus.  */
 763     i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
 764                      AKITA_MAX_ADDR);
 765 }
 766
 767 /* Other peripherals */
 768
 769 static void spitz_out_switch(void *opaque, int line, int level)
 770 {
 771     switch (line) {
 772     case 0:
 773         zaurus_printf("Charging %s.\n", level ? "off" : "on");
 774         break;
 775     case 1:
 776         zaurus_printf("Discharging %s.\n", level ? "on" : "off");
 777         break;
 778     case 2:
 779         zaurus_printf("Green LED %s.\n", level ? "on" : "off");
 780         break;
 781     case 3:
 782         zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
 783         break;
 784     case 4:
 785         spitz_bl_bit5(opaque, line, level);
 786         break;
 787     case 5:
 788         spitz_bl_power(opaque, line, level);
 789         break;
 790     case 6:
 791         spitz_adc_temp_on(opaque, line, level);
 792         break;
 793     }
 794 }
 795
 796 #define SPITZ_SCP_LED_GREEN             1
 797 #define SPITZ_SCP_JK_B                  2
 798 #define SPITZ_SCP_CHRG_ON               3
 799 #define SPITZ_SCP_MUTE_L                4
 800 #define SPITZ_SCP_MUTE_R                5
 801 #define SPITZ_SCP_CF_POWER              6
 802 #define SPITZ_SCP_LED_ORANGE            7
 803 #define SPITZ_SCP_JK_A                  8
 804 #define SPITZ_SCP_ADC_TEMP_ON           9
 805 #define SPITZ_SCP2_IR_ON                1
 806 #define SPITZ_SCP2_AKIN_PULLUP          2
 807 #define SPITZ_SCP2_BACKLIGHT_CONT       7
 808 #define SPITZ_SCP2_BACKLIGHT_ON         8
 809 #define SPITZ_SCP2_MIC_BIAS             9
 810
 811 static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
 812                 DeviceState *scp0, DeviceState *scp1)
 813 {
 814     qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
 815
 816     qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
 817     qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
 818     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
 819     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
 820
 821     if (scp1) {
 822         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
 823         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
 824     }
 825
 826     qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
 827 }
 828
 829 #define SPITZ_GPIO_HSYNC                22
 830 #define SPITZ_GPIO_SD_DETECT            9
 831 #define SPITZ_GPIO_SD_WP                81
 832 #define SPITZ_GPIO_ON_RESET             89
 833 #define SPITZ_GPIO_BAT_COVER            90
 834 #define SPITZ_GPIO_CF1_IRQ              105
 835 #define SPITZ_GPIO_CF1_CD               94
 836 #define SPITZ_GPIO_CF2_IRQ              106
 837 #define SPITZ_GPIO_CF2_CD               93
 838
 839 static int spitz_hsync;
 840
 841 static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
 842 {
 843     PXA2xxState *cpu = (PXA2xxState *) opaque;
 844     qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
 845     spitz_hsync ^= 1;
 846 }
 847
 848 static void spitz_reset(void *opaque, int line, int level)
 849 {
 850     if (level) {
 851         qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
 852     }
 853 }
 854
 855 static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
 856 {
 857     qemu_irq lcd_hsync;
 858     qemu_irq reset;
 859
 860     /*
 861      * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
 862      * read to satisfy broken guests that poll-wait for hsync.
 863      * Simulating a real hsync event would be less practical and
 864      * wouldn't guarantee that a guest ever exits the loop.
 865      */
 866     spitz_hsync = 0;
 867     lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0);
 868     pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
 869     pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
 870
 871     /* MMC/SD host */
 872     pxa2xx_mmci_handlers(cpu->mmc,
 873                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
 874                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
 875
 876     /* Battery lock always closed */
 877     qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
 878
 879     /* Handle reset */
 880     reset = qemu_allocate_irq(spitz_reset, cpu, 0);
 881     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset);
 882
 883     /* PCMCIA signals: card's IRQ and Card-Detect */
 884     if (slots >= 1)
 885         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
 886                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
 887                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
 888     if (slots >= 2)
 889         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
 890                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
 891                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
 892 }
 893
 894 /* Board init.  */
 895 enum spitz_model_e { spitz, akita, borzoi, terrier };
 896
 897 #define SPITZ_RAM       0x04000000
 898 #define SPITZ_ROM       0x00800000
 899
 900 static struct arm_boot_info spitz_binfo = {
 901     .loader_start = PXA2XX_SDRAM_BASE,
 902     .ram_size = 0x04000000,
 903 };
 904
 905 static void spitz_common_init(MachineState *machine,
 906                               enum spitz_model_e model, int arm_id)
 907 {
 908     PXA2xxState *mpu;
 909     DeviceState *scp0, *scp1 = NULL;
 910     MemoryRegion *address_space_mem = get_system_memory();
 911     MemoryRegion *rom = g_new(MemoryRegion, 1);
 912
 913     /* Setup CPU & memory */
 914     mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size,
 915                       machine->cpu_type);
 916
 917     sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
 918
 919     memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal);
 920     memory_region_set_readonly(rom, true);
 921     memory_region_add_subregion(address_space_mem, 0, rom);
 922
 923     /* Setup peripherals */
 924     spitz_keyboard_register(mpu);
 925
 926     spitz_ssp_attach(mpu);
 927
 928     scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
 929     if (model != akita) {
 930         scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
 931     }
 932
 933     spitz_scoop_gpio_setup(mpu, scp0, scp1);
 934
 935     spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
 936
 937     spitz_i2c_setup(mpu);
 938
 939     if (model == akita)
 940         spitz_akita_i2c_setup(mpu);
 941
 942     if (model == terrier)
 943         /* A 6.0 GB microdrive is permanently sitting in CF slot 1.  */
 944         spitz_microdrive_attach(mpu, 1);
 945     else if (model != akita)
 946         /* A 4.0 GB microdrive is permanently sitting in CF slot 0.  */
 947         spitz_microdrive_attach(mpu, 0);
 948
 949     spitz_binfo.kernel_filename = machine->kernel_filename;
 950     spitz_binfo.kernel_cmdline = machine->kernel_cmdline;
 951     spitz_binfo.initrd_filename = machine->initrd_filename;
 952     spitz_binfo.board_id = arm_id;
 953     arm_load_kernel(mpu->cpu, &spitz_binfo);
 954     sl_bootparam_write(SL_PXA_PARAM_BASE);
 955 }
 956
 957 static void spitz_init(MachineState *machine)
 958 {
 959     spitz_common_init(machine, spitz, 0x2c9);
 960 }
 961
 962 static void borzoi_init(MachineState *machine)
 963 {
 964     spitz_common_init(machine, borzoi, 0x33f);
 965 }
 966
 967 static void akita_init(MachineState *machine)
 968 {
 969     spitz_common_init(machine, akita, 0x2e8);
 970 }
 971
 972 static void terrier_init(MachineState *machine)
 973 {
 974     spitz_common_init(machine, terrier, 0x33f);
 975 }
 976
 977 static void akitapda_class_init(ObjectClass *oc, void *data)
 978 {
 979     MachineClass *mc = MACHINE_CLASS(oc);
 980
 981     mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)";
 982     mc->init = akita_init;
 983     mc->ignore_memory_transaction_failures = true;
 984     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
 985 }
 986
 987 static const TypeInfo akitapda_type = {
 988     .name = MACHINE_TYPE_NAME("akita"),
 989     .parent = TYPE_MACHINE,
 990     .class_init = akitapda_class_init,
 991 };
 992
 993 static void spitzpda_class_init(ObjectClass *oc, void *data)
 994 {
 995     MachineClass *mc = MACHINE_CLASS(oc);
 996
 997     mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)";
 998     mc->init = spitz_init;
 999     mc->block_default_type = IF_IDE;
1000     mc->ignore_memory_transaction_failures = true;
1001     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1002 }
1003
1004 static const TypeInfo spitzpda_type = {
1005     .name = MACHINE_TYPE_NAME("spitz"),
1006     .parent = TYPE_MACHINE,
1007     .class_init = spitzpda_class_init,
1008 };
1009
1010 static void borzoipda_class_init(ObjectClass *oc, void *data)
1011 {
1012     MachineClass *mc = MACHINE_CLASS(oc);
1013
1014     mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)";
1015     mc->init = borzoi_init;
1016     mc->block_default_type = IF_IDE;
1017     mc->ignore_memory_transaction_failures = true;
1018     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1019 }
1020
1021 static const TypeInfo borzoipda_type = {
1022     .name = MACHINE_TYPE_NAME("borzoi"),
1023     .parent = TYPE_MACHINE,
1024     .class_init = borzoipda_class_init,
1025 };
1026
1027 static void terrierpda_class_init(ObjectClass *oc, void *data)
1028 {
1029     MachineClass *mc = MACHINE_CLASS(oc);
1030
1031     mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)";
1032     mc->init = terrier_init;
1033     mc->block_default_type = IF_IDE;
1034     mc->ignore_memory_transaction_failures = true;
1035     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5");
1036 }
1037
1038 static const TypeInfo terrierpda_type = {
1039     .name = MACHINE_TYPE_NAME("terrier"),
1040     .parent = TYPE_MACHINE,
1041     .class_init = terrierpda_class_init,
1042 };
1043
1044 static void spitz_machine_init(void)
1045 {
1046     type_register_static(&akitapda_type);
1047     type_register_static(&spitzpda_type);
1048     type_register_static(&borzoipda_type);
1049     type_register_static(&terrierpda_type);
1050 }
1051
1052 type_init(spitz_machine_init)
1053
1054 static bool is_version_0(void *opaque, int version_id)
1055 {
1056     return version_id == 0;
1057 }
1058
1059 static VMStateDescription vmstate_sl_nand_info = {
1060     .name = "sl-nand",
1061     .version_id = 0,
1062     .minimum_version_id = 0,
1063     .fields = (VMStateField[]) {
1064         VMSTATE_UINT8(ctl, SLNANDState),
1065         VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1066         VMSTATE_END_OF_LIST(),
1067     },
1068 };
1069
1070 static Property sl_nand_properties[] = {
1071     DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1072     DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1073     DEFINE_PROP_END_OF_LIST(),
1074 };
1075
1076 static void sl_nand_class_init(ObjectClass *klass, void *data)
1077 {
1078     DeviceClass *dc = DEVICE_CLASS(klass);
1079
1080     dc->vmsd = &vmstate_sl_nand_info;
1081     dc->props = sl_nand_properties;
1082     /* Reason: init() method uses drive_get() */
1083     dc->user_creatable = false;
1084 }
1085
1086 static const TypeInfo sl_nand_info = {
1087     .name          = TYPE_SL_NAND,
1088     .parent        = TYPE_SYS_BUS_DEVICE,
1089     .instance_size = sizeof(SLNANDState),
1090     .instance_init = sl_nand_init,
1091     .class_init    = sl_nand_class_init,
1092 };
1093
1094 static VMStateDescription vmstate_spitz_kbd = {
1095     .name = "spitz-keyboard",
1096     .version_id = 1,
1097     .minimum_version_id = 0,
1098     .post_load = spitz_keyboard_post_load,
1099     .fields = (VMStateField[]) {
1100         VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1101         VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1102         VMSTATE_UNUSED_TEST(is_version_0, 5),
1103         VMSTATE_END_OF_LIST(),
1104     },
1105 };
1106
1107 static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1108 {
1109     DeviceClass *dc = DEVICE_CLASS(klass);
1110
1111     dc->vmsd = &vmstate_spitz_kbd;
1112 }
1113
1114 static const TypeInfo spitz_keyboard_info = {
1115     .name          = TYPE_SPITZ_KEYBOARD,
1116     .parent        = TYPE_SYS_BUS_DEVICE,
1117     .instance_size = sizeof(SpitzKeyboardState),
1118     .instance_init = spitz_keyboard_init,
1119     .class_init    = spitz_keyboard_class_init,
1120 };
1121
1122 static const VMStateDescription vmstate_corgi_ssp_regs = {
1123     .name = "corgi-ssp",
1124     .version_id = 2,
1125     .minimum_version_id = 2,
1126     .fields = (VMStateField[]) {
1127         VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
1128         VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1129         VMSTATE_END_OF_LIST(),
1130     }
1131 };
1132
1133 static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1134 {
1135     DeviceClass *dc = DEVICE_CLASS(klass);
1136     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1137
1138     k->realize = corgi_ssp_realize;
1139     k->transfer = corgi_ssp_transfer;
1140     dc->vmsd = &vmstate_corgi_ssp_regs;
1141 }
1142
1143 static const TypeInfo corgi_ssp_info = {
1144     .name          = "corgi-ssp",
1145     .parent        = TYPE_SSI_SLAVE,
1146     .instance_size = sizeof(CorgiSSPState),
1147     .class_init    = corgi_ssp_class_init,
1148 };
1149
1150 static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1151     .name = "spitz-lcdtg",
1152     .version_id = 1,
1153     .minimum_version_id = 1,
1154     .fields = (VMStateField[]) {
1155         VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
1156         VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1157         VMSTATE_UINT32(bl_power, SpitzLCDTG),
1158         VMSTATE_END_OF_LIST(),
1159     }
1160 };
1161
1162 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1163 {
1164     DeviceClass *dc = DEVICE_CLASS(klass);
1165     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1166
1167     k->realize = spitz_lcdtg_realize;
1168     k->transfer = spitz_lcdtg_transfer;
1169     dc->vmsd = &vmstate_spitz_lcdtg_regs;
1170 }
1171
1172 static const TypeInfo spitz_lcdtg_info = {
1173     .name          = "spitz-lcdtg",
1174     .parent        = TYPE_SSI_SLAVE,
1175     .instance_size = sizeof(SpitzLCDTG),
1176     .class_init    = spitz_lcdtg_class_init,
1177 };
1178
1179 static void spitz_register_types(void)
1180 {
1181     type_register_static(&corgi_ssp_info);
1182     type_register_static(&spitz_lcdtg_info);
1183     type_register_static(&spitz_keyboard_info);
1184     type_register_static(&sl_nand_info);
1185 }
1186
1187 type_init(spitz_register_types)