hw/s390x/s390-pci-bus.c

   1 /*
   2  * s390 PCI BUS
   3  *
   4  * Copyright 2014 IBM Corp.
   5  * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com>
   6  *            Hong Bo Li <lihbbj@cn.ibm.com>
   7  *            Yi Min Zhao <zyimin@cn.ibm.com>
   8  *
   9  * This work is licensed under the terms of the GNU GPL, version 2 or (at
  10  * your option) any later version. See the COPYING file in the top-level
  11  * directory.
  12  */
  13
  14 #include "qemu/osdep.h"
  15 #include "qapi/error.h"
  16 #include "qapi/visitor.h"
  17 #include "qemu-common.h"
  18 #include "cpu.h"
  19 #include "s390-pci-bus.h"
  20 #include "s390-pci-inst.h"
  21 #include "hw/pci/pci_bus.h"
  22 #include "hw/pci/pci_bridge.h"
  23 #include "hw/pci/msi.h"
  24 #include "qemu/error-report.h"
  25
  26 #ifndef DEBUG_S390PCI_BUS
  27 #define DEBUG_S390PCI_BUS  0
  28 #endif
  29
  30 #define DPRINTF(fmt, ...)                                         \
  31     do {                                                          \
  32         if (DEBUG_S390PCI_BUS) {                                  \
  33             fprintf(stderr, "S390pci-bus: " fmt, ## __VA_ARGS__); \
  34         }                                                         \
  35     } while (0)
  36
  37 S390pciState *s390_get_phb(void)
  38 {
  39     static S390pciState *phb;
  40
  41     if (!phb) {
  42         phb = S390_PCI_HOST_BRIDGE(
  43             object_resolve_path(TYPE_S390_PCI_HOST_BRIDGE, NULL));
  44         assert(phb != NULL);
  45     }
  46
  47     return phb;
  48 }
  49
  50 int chsc_sei_nt2_get_event(void *res)
  51 {
  52     ChscSeiNt2Res *nt2_res = (ChscSeiNt2Res *)res;
  53     PciCcdfAvail *accdf;
  54     PciCcdfErr *eccdf;
  55     int rc = 1;
  56     SeiContainer *sei_cont;
  57     S390pciState *s = s390_get_phb();
  58
  59     sei_cont = QTAILQ_FIRST(&s->pending_sei);
  60     if (sei_cont) {
  61         QTAILQ_REMOVE(&s->pending_sei, sei_cont, link);
  62         nt2_res->nt = 2;
  63         nt2_res->cc = sei_cont->cc;
  64         nt2_res->length = cpu_to_be16(sizeof(ChscSeiNt2Res));
  65         switch (sei_cont->cc) {
  66         case 1: /* error event */
  67             eccdf = (PciCcdfErr *)nt2_res->ccdf;
  68             eccdf->fid = cpu_to_be32(sei_cont->fid);
  69             eccdf->fh = cpu_to_be32(sei_cont->fh);
  70             eccdf->e = cpu_to_be32(sei_cont->e);
  71             eccdf->faddr = cpu_to_be64(sei_cont->faddr);
  72             eccdf->pec = cpu_to_be16(sei_cont->pec);
  73             break;
  74         case 2: /* availability event */
  75             accdf = (PciCcdfAvail *)nt2_res->ccdf;
  76             accdf->fid = cpu_to_be32(sei_cont->fid);
  77             accdf->fh = cpu_to_be32(sei_cont->fh);
  78             accdf->pec = cpu_to_be16(sei_cont->pec);
  79             break;
  80         default:
  81             abort();
  82         }
  83         g_free(sei_cont);
  84         rc = 0;
  85     }
  86
  87     return rc;
  88 }
  89
  90 int chsc_sei_nt2_have_event(void)
  91 {
  92     S390pciState *s = s390_get_phb();
  93
  94     return !QTAILQ_EMPTY(&s->pending_sei);
  95 }
  96
  97 S390PCIBusDevice *s390_pci_find_next_avail_dev(S390pciState *s,
  98                                                S390PCIBusDevice *pbdev)
  99 {
 100     S390PCIBusDevice *ret = pbdev ? QTAILQ_NEXT(pbdev, link) :
 101         QTAILQ_FIRST(&s->zpci_devs);
 102
 103     while (ret && ret->state == ZPCI_FS_RESERVED) {
 104         ret = QTAILQ_NEXT(ret, link);
 105     }
 106
 107     return ret;
 108 }
 109
 110 S390PCIBusDevice *s390_pci_find_dev_by_fid(S390pciState *s, uint32_t fid)
 111 {
 112     S390PCIBusDevice *pbdev;
 113
 114     QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
 115         if (pbdev->fid == fid) {
 116             return pbdev;
 117         }
 118     }
 119
 120     return NULL;
 121 }
 122
 123 void s390_pci_sclp_configure(SCCB *sccb)
 124 {
 125     PciCfgSccb *psccb = (PciCfgSccb *)sccb;
 126     S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(),
 127                                                        be32_to_cpu(psccb->aid));
 128     uint16_t rc;
 129
 130     if (be16_to_cpu(sccb->h.length) < 16) {
 131         rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH;
 132         goto out;
 133     }
 134
 135     if (!pbdev) {
 136         DPRINTF("sclp config no dev found\n");
 137         rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED;
 138         goto out;
 139     }
 140
 141     switch (pbdev->state) {
 142     case ZPCI_FS_RESERVED:
 143         rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE;
 144         break;
 145     case ZPCI_FS_STANDBY:
 146         pbdev->state = ZPCI_FS_DISABLED;
 147         rc = SCLP_RC_NORMAL_COMPLETION;
 148         break;
 149     default:
 150         rc = SCLP_RC_NO_ACTION_REQUIRED;
 151     }
 152 out:
 153     psccb->header.response_code = cpu_to_be16(rc);
 154 }
 155
 156 void s390_pci_sclp_deconfigure(SCCB *sccb)
 157 {
 158     PciCfgSccb *psccb = (PciCfgSccb *)sccb;
 159     S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(),
 160                                                        be32_to_cpu(psccb->aid));
 161     uint16_t rc;
 162
 163     if (be16_to_cpu(sccb->h.length) < 16) {
 164         rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH;
 165         goto out;
 166     }
 167
 168     if (!pbdev) {
 169         DPRINTF("sclp deconfig no dev found\n");
 170         rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED;
 171         goto out;
 172     }
 173
 174     switch (pbdev->state) {
 175     case ZPCI_FS_RESERVED:
 176         rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE;
 177         break;
 178     case ZPCI_FS_STANDBY:
 179         rc = SCLP_RC_NO_ACTION_REQUIRED;
 180         break;
 181     default:
 182         if (pbdev->summary_ind) {
 183             pci_dereg_irqs(pbdev);
 184         }
 185         if (pbdev->iommu->enabled) {
 186             pci_dereg_ioat(pbdev->iommu);
 187         }
 188         pbdev->state = ZPCI_FS_STANDBY;
 189         rc = SCLP_RC_NORMAL_COMPLETION;
 190
 191         if (pbdev->release_timer) {
 192             qdev_unplug(DEVICE(pbdev->pdev), NULL);
 193         }
 194     }
 195 out:
 196     psccb->header.response_code = cpu_to_be16(rc);
 197 }
 198
 199 static S390PCIBusDevice *s390_pci_find_dev_by_uid(S390pciState *s, uint16_t uid)
 200 {
 201     S390PCIBusDevice *pbdev;
 202
 203     QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
 204         if (pbdev->uid == uid) {
 205             return pbdev;
 206         }
 207     }
 208
 209     return NULL;
 210 }
 211
 212 static S390PCIBusDevice *s390_pci_find_dev_by_target(S390pciState *s,
 213                                                      const char *target)
 214 {
 215     S390PCIBusDevice *pbdev;
 216
 217     if (!target) {
 218         return NULL;
 219     }
 220
 221     QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
 222         if (!strcmp(pbdev->target, target)) {
 223             return pbdev;
 224         }
 225     }
 226
 227     return NULL;
 228 }
 229
 230 S390PCIBusDevice *s390_pci_find_dev_by_idx(S390pciState *s, uint32_t idx)
 231 {
 232     return g_hash_table_lookup(s->zpci_table, &idx);
 233 }
 234
 235 S390PCIBusDevice *s390_pci_find_dev_by_fh(S390pciState *s, uint32_t fh)
 236 {
 237     uint32_t idx = FH_MASK_INDEX & fh;
 238     S390PCIBusDevice *pbdev = s390_pci_find_dev_by_idx(s, idx);
 239
 240     if (pbdev && pbdev->fh == fh) {
 241         return pbdev;
 242     }
 243
 244     return NULL;
 245 }
 246
 247 static void s390_pci_generate_event(uint8_t cc, uint16_t pec, uint32_t fh,
 248                                     uint32_t fid, uint64_t faddr, uint32_t e)
 249 {
 250     SeiContainer *sei_cont;
 251     S390pciState *s = s390_get_phb();
 252
 253     sei_cont = g_malloc0(sizeof(SeiContainer));
 254     sei_cont->fh = fh;
 255     sei_cont->fid = fid;
 256     sei_cont->cc = cc;
 257     sei_cont->pec = pec;
 258     sei_cont->faddr = faddr;
 259     sei_cont->e = e;
 260
 261     QTAILQ_INSERT_TAIL(&s->pending_sei, sei_cont, link);
 262     css_generate_css_crws(0);
 263 }
 264
 265 static void s390_pci_generate_plug_event(uint16_t pec, uint32_t fh,
 266                                          uint32_t fid)
 267 {
 268     s390_pci_generate_event(2, pec, fh, fid, 0, 0);
 269 }
 270
 271 void s390_pci_generate_error_event(uint16_t pec, uint32_t fh, uint32_t fid,
 272                                    uint64_t faddr, uint32_t e)
 273 {
 274     s390_pci_generate_event(1, pec, fh, fid, faddr, e);
 275 }
 276
 277 static void s390_pci_set_irq(void *opaque, int irq, int level)
 278 {
 279     /* nothing to do */
 280 }
 281
 282 static int s390_pci_map_irq(PCIDevice *pci_dev, int irq_num)
 283 {
 284     /* nothing to do */
 285     return 0;
 286 }
 287
 288 static uint64_t s390_pci_get_table_origin(uint64_t iota)
 289 {
 290     return iota & ~ZPCI_IOTA_RTTO_FLAG;
 291 }
 292
 293 static unsigned int calc_rtx(dma_addr_t ptr)
 294 {
 295     return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK;
 296 }
 297
 298 static unsigned int calc_sx(dma_addr_t ptr)
 299 {
 300     return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK;
 301 }
 302
 303 static unsigned int calc_px(dma_addr_t ptr)
 304 {
 305     return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK;
 306 }
 307
 308 static uint64_t get_rt_sto(uint64_t entry)
 309 {
 310     return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX)
 311                 ? (entry & ZPCI_RTE_ADDR_MASK)
 312                 : 0;
 313 }
 314
 315 static uint64_t get_st_pto(uint64_t entry)
 316 {
 317     return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX)
 318             ? (entry & ZPCI_STE_ADDR_MASK)
 319             : 0;
 320 }
 321
 322 static uint64_t s390_guest_io_table_walk(uint64_t guest_iota,
 323                                   uint64_t guest_dma_address)
 324 {
 325     uint64_t sto_a, pto_a, px_a;
 326     uint64_t sto, pto, pte;
 327     uint32_t rtx, sx, px;
 328
 329     rtx = calc_rtx(guest_dma_address);
 330     sx = calc_sx(guest_dma_address);
 331     px = calc_px(guest_dma_address);
 332
 333     sto_a = guest_iota + rtx * sizeof(uint64_t);
 334     sto = address_space_ldq(&address_space_memory, sto_a,
 335                             MEMTXATTRS_UNSPECIFIED, NULL);
 336     sto = get_rt_sto(sto);
 337     if (!sto) {
 338         pte = 0;
 339         goto out;
 340     }
 341
 342     pto_a = sto + sx * sizeof(uint64_t);
 343     pto = address_space_ldq(&address_space_memory, pto_a,
 344                             MEMTXATTRS_UNSPECIFIED, NULL);
 345     pto = get_st_pto(pto);
 346     if (!pto) {
 347         pte = 0;
 348         goto out;
 349     }
 350
 351     px_a = pto + px * sizeof(uint64_t);
 352     pte = address_space_ldq(&address_space_memory, px_a,
 353                             MEMTXATTRS_UNSPECIFIED, NULL);
 354
 355 out:
 356     return pte;
 357 }
 358
 359 static IOMMUTLBEntry s390_translate_iommu(MemoryRegion *mr, hwaddr addr,
 360                                           IOMMUAccessFlags flag)
 361 {
 362     uint64_t pte;
 363     uint32_t flags;
 364     S390PCIIOMMU *iommu = container_of(mr, S390PCIIOMMU, iommu_mr);
 365     IOMMUTLBEntry ret = {
 366         .target_as = &address_space_memory,
 367         .iova = 0,
 368         .translated_addr = 0,
 369         .addr_mask = ~(hwaddr)0,
 370         .perm = IOMMU_NONE,
 371     };
 372
 373     switch (iommu->pbdev->state) {
 374     case ZPCI_FS_ENABLED:
 375     case ZPCI_FS_BLOCKED:
 376         if (!iommu->enabled) {
 377             return ret;
 378         }
 379         break;
 380     default:
 381         return ret;
 382     }
 383
 384     DPRINTF("iommu trans addr 0x%" PRIx64 "\n", addr);
 385
 386     if (addr < iommu->pba || addr > iommu->pal) {
 387         return ret;
 388     }
 389
 390     pte = s390_guest_io_table_walk(s390_pci_get_table_origin(iommu->g_iota),
 391                                    addr);
 392     if (!pte) {
 393         return ret;
 394     }
 395
 396     flags = pte & ZPCI_PTE_FLAG_MASK;
 397     ret.iova = addr;
 398     ret.translated_addr = pte & ZPCI_PTE_ADDR_MASK;
 399     ret.addr_mask = 0xfff;
 400
 401     if (flags & ZPCI_PTE_INVALID) {
 402         ret.perm = IOMMU_NONE;
 403     } else {
 404         ret.perm = IOMMU_RW;
 405     }
 406
 407     return ret;
 408 }
 409
 410 static const MemoryRegionIOMMUOps s390_iommu_ops = {
 411     .translate = s390_translate_iommu,
 412 };
 413
 414 static S390PCIIOMMU *s390_pci_get_iommu(S390pciState *s, PCIBus *bus,
 415                                         int devfn)
 416 {
 417     uint64_t key = (uintptr_t)bus;
 418     S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key);
 419     S390PCIIOMMU *iommu;
 420
 421     if (!table) {
 422         table = g_malloc0(sizeof(S390PCIIOMMUTable));
 423         table->key = key;
 424         g_hash_table_insert(s->iommu_table, &table->key, table);
 425     }
 426
 427     iommu = table->iommu[PCI_SLOT(devfn)];
 428     if (!iommu) {
 429         iommu = S390_PCI_IOMMU(object_new(TYPE_S390_PCI_IOMMU));
 430
 431         char *mr_name = g_strdup_printf("iommu-root-%02x:%02x.%01x",
 432                                         pci_bus_num(bus),
 433                                         PCI_SLOT(devfn),
 434                                         PCI_FUNC(devfn));
 435         char *as_name = g_strdup_printf("iommu-pci-%02x:%02x.%01x",
 436                                         pci_bus_num(bus),
 437                                         PCI_SLOT(devfn),
 438                                         PCI_FUNC(devfn));
 439         memory_region_init(&iommu->mr, OBJECT(iommu), mr_name, UINT64_MAX);
 440         address_space_init(&iommu->as, &iommu->mr, as_name);
 441         table->iommu[PCI_SLOT(devfn)] = iommu;
 442
 443         g_free(mr_name);
 444         g_free(as_name);
 445     }
 446
 447     return iommu;
 448 }
 449
 450 static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn)
 451 {
 452     S390pciState *s = opaque;
 453     S390PCIIOMMU *iommu = s390_pci_get_iommu(s, bus, devfn);
 454
 455     return &iommu->as;
 456 }
 457
 458 static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set)
 459 {
 460     uint8_t ind_old, ind_new;
 461     hwaddr len = 1;
 462     uint8_t *ind_addr;
 463
 464     ind_addr = cpu_physical_memory_map(ind_loc, &len, 1);
 465     if (!ind_addr) {
 466         s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0);
 467         return -1;
 468     }
 469     do {
 470         ind_old = *ind_addr;
 471         ind_new = ind_old | to_be_set;
 472     } while (atomic_cmpxchg(ind_addr, ind_old, ind_new) != ind_old);
 473     cpu_physical_memory_unmap(ind_addr, len, 1, len);
 474
 475     return ind_old;
 476 }
 477
 478 static void s390_msi_ctrl_write(void *opaque, hwaddr addr, uint64_t data,
 479                                 unsigned int size)
 480 {
 481     S390PCIBusDevice *pbdev = opaque;
 482     uint32_t idx = data >> ZPCI_MSI_VEC_BITS;
 483     uint32_t vec = data & ZPCI_MSI_VEC_MASK;
 484     uint64_t ind_bit;
 485     uint32_t sum_bit;
 486     uint32_t e = 0;
 487
 488     DPRINTF("write_msix data 0x%" PRIx64 " idx %d vec 0x%x\n", data, idx, vec);
 489
 490     if (!pbdev) {
 491         e |= (vec << ERR_EVENT_MVN_OFFSET);
 492         s390_pci_generate_error_event(ERR_EVENT_NOMSI, idx, 0, addr, e);
 493         return;
 494     }
 495
 496     if (pbdev->state != ZPCI_FS_ENABLED) {
 497         return;
 498     }
 499
 500     ind_bit = pbdev->routes.adapter.ind_offset;
 501     sum_bit = pbdev->routes.adapter.summary_offset;
 502
 503     set_ind_atomic(pbdev->routes.adapter.ind_addr + (ind_bit + vec) / 8,
 504                    0x80 >> ((ind_bit + vec) % 8));
 505     if (!set_ind_atomic(pbdev->routes.adapter.summary_addr + sum_bit / 8,
 506                                        0x80 >> (sum_bit % 8))) {
 507         css_adapter_interrupt(pbdev->isc);
 508     }
 509 }
 510
 511 static uint64_t s390_msi_ctrl_read(void *opaque, hwaddr addr, unsigned size)
 512 {
 513     return 0xffffffff;
 514 }
 515
 516 static const MemoryRegionOps s390_msi_ctrl_ops = {
 517     .write = s390_msi_ctrl_write,
 518     .read = s390_msi_ctrl_read,
 519     .endianness = DEVICE_LITTLE_ENDIAN,
 520 };
 521
 522 void s390_pci_iommu_enable(S390PCIIOMMU *iommu)
 523 {
 524     char *name = g_strdup_printf("iommu-s390-%04x", iommu->pbdev->uid);
 525     memory_region_init_iommu(&iommu->iommu_mr, OBJECT(&iommu->mr),
 526                              &s390_iommu_ops, name, iommu->pal + 1);
 527     iommu->enabled = true;
 528     memory_region_add_subregion(&iommu->mr, 0, &iommu->iommu_mr);
 529     g_free(name);
 530 }
 531
 532 void s390_pci_iommu_disable(S390PCIIOMMU *iommu)
 533 {
 534     iommu->enabled = false;
 535     memory_region_del_subregion(&iommu->mr, &iommu->iommu_mr);
 536     object_unparent(OBJECT(&iommu->iommu_mr));
 537 }
 538
 539 static void s390_pci_iommu_free(S390pciState *s, PCIBus *bus, int32_t devfn)
 540 {
 541     uint64_t key = (uintptr_t)bus;
 542     S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key);
 543     S390PCIIOMMU *iommu = table ? table->iommu[PCI_SLOT(devfn)] : NULL;
 544
 545     if (!table || !iommu) {
 546         return;
 547     }
 548
 549     table->iommu[PCI_SLOT(devfn)] = NULL;
 550     address_space_destroy(&iommu->as);
 551     object_unparent(OBJECT(&iommu->mr));
 552     object_unparent(OBJECT(iommu));
 553     object_unref(OBJECT(iommu));
 554 }
 555
 556 static int s390_pcihost_init(SysBusDevice *dev)
 557 {
 558     PCIBus *b;
 559     BusState *bus;
 560     PCIHostState *phb = PCI_HOST_BRIDGE(dev);
 561     S390pciState *s = S390_PCI_HOST_BRIDGE(dev);
 562
 563     DPRINTF("host_init\n");
 564
 565     b = pci_register_bus(DEVICE(dev), NULL,
 566                          s390_pci_set_irq, s390_pci_map_irq, NULL,
 567                          get_system_memory(), get_system_io(), 0, 64,
 568                          TYPE_PCI_BUS);
 569     pci_setup_iommu(b, s390_pci_dma_iommu, s);
 570
 571     bus = BUS(b);
 572     qbus_set_hotplug_handler(bus, DEVICE(dev), NULL);
 573     phb->bus = b;
 574
 575     s->bus = S390_PCI_BUS(qbus_create(TYPE_S390_PCI_BUS, DEVICE(s), NULL));
 576     qbus_set_hotplug_handler(BUS(s->bus), DEVICE(s), NULL);
 577
 578     s->iommu_table = g_hash_table_new_full(g_int64_hash, g_int64_equal,
 579                                            NULL, g_free);
 580     s->zpci_table = g_hash_table_new_full(g_int_hash, g_int_equal, NULL, NULL);
 581     s->bus_no = 0;
 582     QTAILQ_INIT(&s->pending_sei);
 583     QTAILQ_INIT(&s->zpci_devs);
 584
 585     css_register_io_adapters(CSS_IO_ADAPTER_PCI, true, false, &error_abort);
 586
 587     return 0;
 588 }
 589
 590 static int s390_pci_msix_init(S390PCIBusDevice *pbdev)
 591 {
 592     char *name;
 593     uint8_t pos;
 594     uint16_t ctrl;
 595     uint32_t table, pba;
 596
 597     pos = pci_find_capability(pbdev->pdev, PCI_CAP_ID_MSIX);
 598     if (!pos) {
 599         pbdev->msix.available = false;
 600         return -1;
 601     }
 602
 603     ctrl = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_FLAGS,
 604              pci_config_size(pbdev->pdev), sizeof(ctrl));
 605     table = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_TABLE,
 606              pci_config_size(pbdev->pdev), sizeof(table));
 607     pba = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_PBA,
 608              pci_config_size(pbdev->pdev), sizeof(pba));
 609
 610     pbdev->msix.table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
 611     pbdev->msix.table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
 612     pbdev->msix.pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
 613     pbdev->msix.pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
 614     pbdev->msix.entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
 615     pbdev->msix.available = true;
 616
 617     name = g_strdup_printf("msix-s390-%04x", pbdev->uid);
 618     memory_region_init_io(&pbdev->msix_notify_mr, OBJECT(pbdev),
 619                           &s390_msi_ctrl_ops, pbdev, name, PAGE_SIZE);
 620     memory_region_add_subregion(&pbdev->iommu->mr, ZPCI_MSI_ADDR,
 621                                 &pbdev->msix_notify_mr);
 622     g_free(name);
 623
 624     return 0;
 625 }
 626
 627 static void s390_pci_msix_free(S390PCIBusDevice *pbdev)
 628 {
 629     memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->msix_notify_mr);
 630     object_unparent(OBJECT(&pbdev->msix_notify_mr));
 631 }
 632
 633 static S390PCIBusDevice *s390_pci_device_new(S390pciState *s,
 634                                              const char *target)
 635 {
 636     DeviceState *dev = NULL;
 637
 638     dev = qdev_try_create(BUS(s->bus), TYPE_S390_PCI_DEVICE);
 639     if (!dev) {
 640         return NULL;
 641     }
 642
 643     qdev_prop_set_string(dev, "target", target);
 644     qdev_init_nofail(dev);
 645
 646     return S390_PCI_DEVICE(dev);
 647 }
 648
 649 static bool s390_pci_alloc_idx(S390pciState *s, S390PCIBusDevice *pbdev)
 650 {
 651     uint32_t idx;
 652
 653     idx = s->next_idx;
 654     while (s390_pci_find_dev_by_idx(s, idx)) {
 655         idx = (idx + 1) & FH_MASK_INDEX;
 656         if (idx == s->next_idx) {
 657             return false;
 658         }
 659     }
 660
 661     pbdev->idx = idx;
 662     s->next_idx = (idx + 1) & FH_MASK_INDEX;
 663
 664     return true;
 665 }
 666
 667 static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev,
 668                                   DeviceState *dev, Error **errp)
 669 {
 670     PCIDevice *pdev = NULL;
 671     S390PCIBusDevice *pbdev = NULL;
 672     S390pciState *s = s390_get_phb();
 673
 674     if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
 675         BusState *bus;
 676         PCIBridge *pb = PCI_BRIDGE(dev);
 677         PCIDevice *pdev = PCI_DEVICE(dev);
 678
 679         pci_bridge_map_irq(pb, dev->id, s390_pci_map_irq);
 680         pci_setup_iommu(&pb->sec_bus, s390_pci_dma_iommu, s);
 681
 682         bus = BUS(&pb->sec_bus);
 683         qbus_set_hotplug_handler(bus, DEVICE(s), errp);
 684
 685         if (dev->hotplugged) {
 686             pci_default_write_config(pdev, PCI_PRIMARY_BUS, s->bus_no, 1);
 687             s->bus_no += 1;
 688             pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1);
 689             do {
 690                 pdev = pdev->bus->parent_dev;
 691                 pci_default_write_config(pdev, PCI_SUBORDINATE_BUS,
 692                                          s->bus_no, 1);
 693             } while (pdev->bus && pci_bus_num(pdev->bus));
 694         }
 695     } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
 696         pdev = PCI_DEVICE(dev);
 697
 698         if (!dev->id) {
 699             /* In the case the PCI device does not define an id */
 700             /* we generate one based on the PCI address         */
 701             dev->id = g_strdup_printf("auto_%02x:%02x.%01x",
 702                                       pci_bus_num(pdev->bus),
 703                                       PCI_SLOT(pdev->devfn),
 704                                       PCI_FUNC(pdev->devfn));
 705         }
 706
 707         pbdev = s390_pci_find_dev_by_target(s, dev->id);
 708         if (!pbdev) {
 709             pbdev = s390_pci_device_new(s, dev->id);
 710             if (!pbdev) {
 711                 error_setg(errp, "create zpci device failed");
 712                 return;
 713             }
 714         }
 715
 716         if (object_dynamic_cast(OBJECT(dev), "vfio-pci")) {
 717             pbdev->fh |= FH_SHM_VFIO;
 718         } else {
 719             pbdev->fh |= FH_SHM_EMUL;
 720         }
 721
 722         pbdev->pdev = pdev;
 723         pbdev->iommu = s390_pci_get_iommu(s, pdev->bus, pdev->devfn);
 724         pbdev->iommu->pbdev = pbdev;
 725         pbdev->state = ZPCI_FS_STANDBY;
 726
 727         if (s390_pci_msix_init(pbdev)) {
 728             error_setg(errp, "MSI-X support is mandatory "
 729                        "in the S390 architecture");
 730             return;
 731         }
 732
 733         if (dev->hotplugged) {
 734             s390_pci_generate_plug_event(HP_EVENT_RESERVED_TO_STANDBY,
 735                                          pbdev->fh, pbdev->fid);
 736         }
 737     } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
 738         pbdev = S390_PCI_DEVICE(dev);
 739
 740         if (!s390_pci_alloc_idx(s, pbdev)) {
 741             error_setg(errp, "no slot for plugging zpci device");
 742             return;
 743         }
 744         pbdev->fh = pbdev->idx;
 745         QTAILQ_INSERT_TAIL(&s->zpci_devs, pbdev, link);
 746         g_hash_table_insert(s->zpci_table, &pbdev->idx, pbdev);
 747     }
 748 }
 749
 750 static void s390_pcihost_timer_cb(void *opaque)
 751 {
 752     S390PCIBusDevice *pbdev = opaque;
 753
 754     if (pbdev->summary_ind) {
 755         pci_dereg_irqs(pbdev);
 756     }
 757     if (pbdev->iommu->enabled) {
 758         pci_dereg_ioat(pbdev->iommu);
 759     }
 760
 761     pbdev->state = ZPCI_FS_STANDBY;
 762     s390_pci_generate_plug_event(HP_EVENT_CONFIGURED_TO_STBRES,
 763                                  pbdev->fh, pbdev->fid);
 764     qdev_unplug(DEVICE(pbdev), NULL);
 765 }
 766
 767 static void s390_pcihost_hot_unplug(HotplugHandler *hotplug_dev,
 768                                     DeviceState *dev, Error **errp)
 769 {
 770     PCIDevice *pci_dev = NULL;
 771     PCIBus *bus;
 772     int32_t devfn;
 773     S390PCIBusDevice *pbdev = NULL;
 774     S390pciState *s = s390_get_phb();
 775
 776     if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
 777         error_setg(errp, "PCI bridge hot unplug currently not supported");
 778         return;
 779     } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
 780         pci_dev = PCI_DEVICE(dev);
 781
 782         QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
 783             if (pbdev->pdev == pci_dev) {
 784                 break;
 785             }
 786         }
 787         assert(pbdev != NULL);
 788     } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
 789         pbdev = S390_PCI_DEVICE(dev);
 790         pci_dev = pbdev->pdev;
 791     }
 792
 793     switch (pbdev->state) {
 794     case ZPCI_FS_RESERVED:
 795         goto out;
 796     case ZPCI_FS_STANDBY:
 797         break;
 798     default:
 799         s390_pci_generate_plug_event(HP_EVENT_DECONFIGURE_REQUEST,
 800                                      pbdev->fh, pbdev->fid);
 801         pbdev->release_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
 802                                             s390_pcihost_timer_cb,
 803                                             pbdev);
 804         timer_mod(pbdev->release_timer,
 805                   qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + HOT_UNPLUG_TIMEOUT);
 806         return;
 807     }
 808
 809     if (pbdev->release_timer && timer_pending(pbdev->release_timer)) {
 810         timer_del(pbdev->release_timer);
 811         timer_free(pbdev->release_timer);
 812         pbdev->release_timer = NULL;
 813     }
 814
 815     s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED,
 816                                  pbdev->fh, pbdev->fid);
 817     bus = pci_dev->bus;
 818     devfn = pci_dev->devfn;
 819     object_unparent(OBJECT(pci_dev));
 820     s390_pci_msix_free(pbdev);
 821     s390_pci_iommu_free(s, bus, devfn);
 822     pbdev->pdev = NULL;
 823     pbdev->state = ZPCI_FS_RESERVED;
 824 out:
 825     pbdev->fid = 0;
 826     QTAILQ_REMOVE(&s->zpci_devs, pbdev, link);
 827     g_hash_table_remove(s->zpci_table, &pbdev->idx);
 828     object_unparent(OBJECT(pbdev));
 829 }
 830
 831 static void s390_pci_enumerate_bridge(PCIBus *bus, PCIDevice *pdev,
 832                                       void *opaque)
 833 {
 834     S390pciState *s = opaque;
 835     unsigned int primary = s->bus_no;
 836     unsigned int subordinate = 0xff;
 837     PCIBus *sec_bus = NULL;
 838
 839     if ((pci_default_read_config(pdev, PCI_HEADER_TYPE, 1) !=
 840          PCI_HEADER_TYPE_BRIDGE)) {
 841         return;
 842     }
 843
 844     (s->bus_no)++;
 845     pci_default_write_config(pdev, PCI_PRIMARY_BUS, primary, 1);
 846     pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1);
 847     pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1);
 848
 849     sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
 850     if (!sec_bus) {
 851         return;
 852     }
 853
 854     pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, subordinate, 1);
 855     pci_for_each_device(sec_bus, pci_bus_num(sec_bus),
 856                         s390_pci_enumerate_bridge, s);
 857     pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1);
 858 }
 859
 860 static void s390_pcihost_reset(DeviceState *dev)
 861 {
 862     S390pciState *s = S390_PCI_HOST_BRIDGE(dev);
 863     PCIBus *bus = s->parent_obj.bus;
 864
 865     s->bus_no = 0;
 866     pci_for_each_device(bus, pci_bus_num(bus), s390_pci_enumerate_bridge, s);
 867 }
 868
 869 static void s390_pcihost_class_init(ObjectClass *klass, void *data)
 870 {
 871     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
 872     DeviceClass *dc = DEVICE_CLASS(klass);
 873     HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
 874
 875     dc->reset = s390_pcihost_reset;
 876     k->init = s390_pcihost_init;
 877     hc->plug = s390_pcihost_hot_plug;
 878     hc->unplug = s390_pcihost_hot_unplug;
 879     msi_nonbroken = true;
 880 }
 881
 882 static const TypeInfo s390_pcihost_info = {
 883     .name          = TYPE_S390_PCI_HOST_BRIDGE,
 884     .parent        = TYPE_PCI_HOST_BRIDGE,
 885     .instance_size = sizeof(S390pciState),
 886     .class_init    = s390_pcihost_class_init,
 887     .interfaces = (InterfaceInfo[]) {
 888         { TYPE_HOTPLUG_HANDLER },
 889         { }
 890     }
 891 };
 892
 893 static const TypeInfo s390_pcibus_info = {
 894     .name = TYPE_S390_PCI_BUS,
 895     .parent = TYPE_BUS,
 896     .instance_size = sizeof(S390PCIBus),
 897 };
 898
 899 static uint16_t s390_pci_generate_uid(S390pciState *s)
 900 {
 901     uint16_t uid = 0;
 902
 903     do {
 904         uid++;
 905         if (!s390_pci_find_dev_by_uid(s, uid)) {
 906             return uid;
 907         }
 908     } while (uid < ZPCI_MAX_UID);
 909
 910     return UID_UNDEFINED;
 911 }
 912
 913 static uint32_t s390_pci_generate_fid(S390pciState *s, Error **errp)
 914 {
 915     uint32_t fid = 0;
 916
 917     do {
 918         if (!s390_pci_find_dev_by_fid(s, fid)) {
 919             return fid;
 920         }
 921     } while (fid++ != ZPCI_MAX_FID);
 922
 923     error_setg(errp, "no free fid could be found");
 924     return 0;
 925 }
 926
 927 static void s390_pci_device_realize(DeviceState *dev, Error **errp)
 928 {
 929     S390PCIBusDevice *zpci = S390_PCI_DEVICE(dev);
 930     S390pciState *s = s390_get_phb();
 931
 932     if (!zpci->target) {
 933         error_setg(errp, "target must be defined");
 934         return;
 935     }
 936
 937     if (s390_pci_find_dev_by_target(s, zpci->target)) {
 938         error_setg(errp, "target %s already has an associated zpci device",
 939                    zpci->target);
 940         return;
 941     }
 942
 943     if (zpci->uid == UID_UNDEFINED) {
 944         zpci->uid = s390_pci_generate_uid(s);
 945         if (!zpci->uid) {
 946             error_setg(errp, "no free uid could be found");
 947             return;
 948         }
 949     } else if (s390_pci_find_dev_by_uid(s, zpci->uid)) {
 950         error_setg(errp, "uid %u already in use", zpci->uid);
 951         return;
 952     }
 953
 954     if (!zpci->fid_defined) {
 955         Error *local_error = NULL;
 956
 957         zpci->fid = s390_pci_generate_fid(s, &local_error);
 958         if (local_error) {
 959             error_propagate(errp, local_error);
 960             return;
 961         }
 962     } else if (s390_pci_find_dev_by_fid(s, zpci->fid)) {
 963         error_setg(errp, "fid %u already in use", zpci->fid);
 964         return;
 965     }
 966
 967     zpci->state = ZPCI_FS_RESERVED;
 968 }
 969
 970 static void s390_pci_device_reset(DeviceState *dev)
 971 {
 972     S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev);
 973
 974     switch (pbdev->state) {
 975     case ZPCI_FS_RESERVED:
 976         return;
 977     case ZPCI_FS_STANDBY:
 978         break;
 979     default:
 980         pbdev->fh &= ~FH_MASK_ENABLE;
 981         pbdev->state = ZPCI_FS_DISABLED;
 982         break;
 983     }
 984
 985     if (pbdev->summary_ind) {
 986         pci_dereg_irqs(pbdev);
 987     }
 988     if (pbdev->iommu->enabled) {
 989         pci_dereg_ioat(pbdev->iommu);
 990     }
 991
 992     pbdev->fmb_addr = 0;
 993 }
 994
 995 static void s390_pci_get_fid(Object *obj, Visitor *v, const char *name,
 996                          void *opaque, Error **errp)
 997 {
 998     Property *prop = opaque;
 999     uint32_t *ptr = qdev_get_prop_ptr(DEVICE(obj), prop);
1000
1001     visit_type_uint32(v, name, ptr, errp);
1002 }
1003
1004 static void s390_pci_set_fid(Object *obj, Visitor *v, const char *name,
1005                          void *opaque, Error **errp)
1006 {
1007     DeviceState *dev = DEVICE(obj);
1008     S390PCIBusDevice *zpci = S390_PCI_DEVICE(obj);
1009     Property *prop = opaque;
1010     uint32_t *ptr = qdev_get_prop_ptr(dev, prop);
1011
1012     if (dev->realized) {
1013         qdev_prop_set_after_realize(dev, name, errp);
1014         return;
1015     }
1016
1017     visit_type_uint32(v, name, ptr, errp);
1018     zpci->fid_defined = true;
1019 }
1020
1021 static PropertyInfo s390_pci_fid_propinfo = {
1022     .name = "zpci_fid",
1023     .get = s390_pci_get_fid,
1024     .set = s390_pci_set_fid,
1025 };
1026
1027 #define DEFINE_PROP_S390_PCI_FID(_n, _s, _f) \
1028     DEFINE_PROP(_n, _s, _f, s390_pci_fid_propinfo, uint32_t)
1029
1030 static Property s390_pci_device_properties[] = {
1031     DEFINE_PROP_UINT16("uid", S390PCIBusDevice, uid, UID_UNDEFINED),
1032     DEFINE_PROP_S390_PCI_FID("fid", S390PCIBusDevice, fid),
1033     DEFINE_PROP_STRING("target", S390PCIBusDevice, target),
1034     DEFINE_PROP_END_OF_LIST(),
1035 };
1036
1037 static void s390_pci_device_class_init(ObjectClass *klass, void *data)
1038 {
1039     DeviceClass *dc = DEVICE_CLASS(klass);
1040
1041     dc->desc = "zpci device";
1042     dc->reset = s390_pci_device_reset;
1043     dc->bus_type = TYPE_S390_PCI_BUS;
1044     dc->realize = s390_pci_device_realize;
1045     dc->props = s390_pci_device_properties;
1046 }
1047
1048 static const TypeInfo s390_pci_device_info = {
1049     .name = TYPE_S390_PCI_DEVICE,
1050     .parent = TYPE_DEVICE,
1051     .instance_size = sizeof(S390PCIBusDevice),
1052     .class_init = s390_pci_device_class_init,
1053 };
1054
1055 static TypeInfo s390_pci_iommu_info = {
1056     .name = TYPE_S390_PCI_IOMMU,
1057     .parent = TYPE_OBJECT,
1058     .instance_size = sizeof(S390PCIIOMMU),
1059 };
1060
1061 static void s390_pci_register_types(void)
1062 {
1063     type_register_static(&s390_pcihost_info);
1064     type_register_static(&s390_pcibus_info);
1065     type_register_static(&s390_pci_device_info);
1066     type_register_static(&s390_pci_iommu_info);
1067 }
1068
1069 type_init(s390_pci_register_types)