hw/xen_platform.c

   1 /*
   2  * XEN platform pci device, formerly known as the event channel device
   3  *
   4  * Copyright (c) 2003-2004 Intel Corp.
   5  * Copyright (c) 2006 XenSource
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25
  26 #include <assert.h>
  27
  28 #include "hw.h"
  29 #include "pc.h"
  30 #include "pci.h"
  31 #include "irq.h"
  32 #include "xen_common.h"
  33 #include "net.h"
  34 #include "xen_backend.h"
  35 #include "trace.h"
  36 #include "exec-memory.h"
  37
  38 #include <xenguest.h>
  39
  40 //#define DEBUG_PLATFORM
  41
  42 #ifdef DEBUG_PLATFORM
  43 #define DPRINTF(fmt, ...) do { \
  44     fprintf(stderr, "xen_platform: " fmt, ## __VA_ARGS__); \
  45 } while (0)
  46 #else
  47 #define DPRINTF(fmt, ...) do { } while (0)
  48 #endif
  49
  50 #define PFFLAG_ROM_LOCK 1 /* Sets whether ROM memory area is RW or RO */
  51
  52 typedef struct PCIXenPlatformState {
  53     PCIDevice  pci_dev;
  54     MemoryRegion fixed_io;
  55     MemoryRegion bar;
  56     MemoryRegion mmio_bar;
  57     uint8_t flags; /* used only for version_id == 2 */
  58     int drivers_blacklisted;
  59     uint16_t driver_product_version;
  60
  61     /* Log from guest drivers */
  62     char log_buffer[4096];
  63     int log_buffer_off;
  64 } PCIXenPlatformState;
  65
  66 #define XEN_PLATFORM_IOPORT 0x10
  67
  68 /* Send bytes to syslog */
  69 static void log_writeb(PCIXenPlatformState *s, char val)
  70 {
  71     if (val == '\n' || s->log_buffer_off == sizeof(s->log_buffer) - 1) {
  72         /* Flush buffer */
  73         s->log_buffer[s->log_buffer_off] = 0;
  74         trace_xen_platform_log(s->log_buffer);
  75         s->log_buffer_off = 0;
  76     } else {
  77         s->log_buffer[s->log_buffer_off++] = val;
  78     }
  79 }
  80
  81 /* Xen Platform, Fixed IOPort */
  82 #define UNPLUG_ALL_IDE_DISKS 1
  83 #define UNPLUG_ALL_NICS 2
  84 #define UNPLUG_AUX_IDE_DISKS 4
  85
  86 static void unplug_nic(PCIBus *b, PCIDevice *d)
  87 {
  88     if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
  89             PCI_CLASS_NETWORK_ETHERNET) {
  90         /* Until qdev_free includes a call to object_unparent, we call it here
  91          */
  92         object_unparent(&d->qdev.parent_obj);
  93         qdev_free(&d->qdev);
  94     }
  95 }
  96
  97 static void pci_unplug_nics(PCIBus *bus)
  98 {
  99     pci_for_each_device(bus, 0, unplug_nic);
 100 }
 101
 102 static void unplug_disks(PCIBus *b, PCIDevice *d)
 103 {
 104     if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
 105             PCI_CLASS_STORAGE_IDE) {
 106         qdev_unplug(&(d->qdev), NULL);
 107     }
 108 }
 109
 110 static void pci_unplug_disks(PCIBus *bus)
 111 {
 112     pci_for_each_device(bus, 0, unplug_disks);
 113 }
 114
 115 static void platform_fixed_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
 116 {
 117     PCIXenPlatformState *s = opaque;
 118
 119     switch (addr) {
 120     case 0:
 121         /* Unplug devices.  Value is a bitmask of which devices to
 122            unplug, with bit 0 the IDE devices, bit 1 the network
 123            devices, and bit 2 the non-primary-master IDE devices. */
 124         if (val & UNPLUG_ALL_IDE_DISKS) {
 125             DPRINTF("unplug disks\n");
 126             bdrv_drain_all();
 127             bdrv_flush_all();
 128             pci_unplug_disks(s->pci_dev.bus);
 129         }
 130         if (val & UNPLUG_ALL_NICS) {
 131             DPRINTF("unplug nics\n");
 132             pci_unplug_nics(s->pci_dev.bus);
 133         }
 134         if (val & UNPLUG_AUX_IDE_DISKS) {
 135             DPRINTF("unplug auxiliary disks not supported\n");
 136         }
 137         break;
 138     case 2:
 139         switch (val) {
 140         case 1:
 141             DPRINTF("Citrix Windows PV drivers loaded in guest\n");
 142             break;
 143         case 0:
 144             DPRINTF("Guest claimed to be running PV product 0?\n");
 145             break;
 146         default:
 147             DPRINTF("Unknown PV product %d loaded in guest\n", val);
 148             break;
 149         }
 150         s->driver_product_version = val;
 151         break;
 152     }
 153 }
 154
 155 static void platform_fixed_ioport_writel(void *opaque, uint32_t addr,
 156                                          uint32_t val)
 157 {
 158     switch (addr) {
 159     case 0:
 160         /* PV driver version */
 161         break;
 162     }
 163 }
 164
 165 static void platform_fixed_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
 166 {
 167     PCIXenPlatformState *s = opaque;
 168
 169     switch (addr) {
 170     case 0: /* Platform flags */ {
 171         hvmmem_type_t mem_type = (val & PFFLAG_ROM_LOCK) ?
 172             HVMMEM_ram_ro : HVMMEM_ram_rw;
 173         if (xc_hvm_set_mem_type(xen_xc, xen_domid, mem_type, 0xc0, 0x40)) {
 174             DPRINTF("unable to change ro/rw state of ROM memory area!\n");
 175         } else {
 176             s->flags = val & PFFLAG_ROM_LOCK;
 177             DPRINTF("changed ro/rw state of ROM memory area. now is %s state.\n",
 178                     (mem_type == HVMMEM_ram_ro ? "ro":"rw"));
 179         }
 180         break;
 181     }
 182     case 2:
 183         log_writeb(s, val);
 184         break;
 185     }
 186 }
 187
 188 static uint32_t platform_fixed_ioport_readw(void *opaque, uint32_t addr)
 189 {
 190     PCIXenPlatformState *s = opaque;
 191
 192     switch (addr) {
 193     case 0:
 194         if (s->drivers_blacklisted) {
 195             /* The drivers will recognise this magic number and refuse
 196              * to do anything. */
 197             return 0xd249;
 198         } else {
 199             /* Magic value so that you can identify the interface. */
 200             return 0x49d2;
 201         }
 202     default:
 203         return 0xffff;
 204     }
 205 }
 206
 207 static uint32_t platform_fixed_ioport_readb(void *opaque, uint32_t addr)
 208 {
 209     PCIXenPlatformState *s = opaque;
 210
 211     switch (addr) {
 212     case 0:
 213         /* Platform flags */
 214         return s->flags;
 215     case 2:
 216         /* Version number */
 217         return 1;
 218     default:
 219         return 0xff;
 220     }
 221 }
 222
 223 static void platform_fixed_ioport_reset(void *opaque)
 224 {
 225     PCIXenPlatformState *s = opaque;
 226
 227     platform_fixed_ioport_writeb(s, 0, 0);
 228 }
 229
 230 const MemoryRegionPortio xen_platform_ioport[] = {
 231     { 0, 16, 4, .write = platform_fixed_ioport_writel, },
 232     { 0, 16, 2, .write = platform_fixed_ioport_writew, },
 233     { 0, 16, 1, .write = platform_fixed_ioport_writeb, },
 234     { 0, 16, 2, .read = platform_fixed_ioport_readw, },
 235     { 0, 16, 1, .read = platform_fixed_ioport_readb, },
 236     PORTIO_END_OF_LIST()
 237 };
 238
 239 static const MemoryRegionOps platform_fixed_io_ops = {
 240     .old_portio = xen_platform_ioport,
 241     .endianness = DEVICE_NATIVE_ENDIAN,
 242 };
 243
 244 static void platform_fixed_ioport_init(PCIXenPlatformState* s)
 245 {
 246     memory_region_init_io(&s->fixed_io, &platform_fixed_io_ops, s,
 247                           "xen-fixed", 16);
 248     memory_region_add_subregion(get_system_io(), XEN_PLATFORM_IOPORT,
 249                                 &s->fixed_io);
 250 }
 251
 252 /* Xen Platform PCI Device */
 253
 254 static uint32_t xen_platform_ioport_readb(void *opaque, uint32_t addr)
 255 {
 256     if (addr == 0) {
 257         return platform_fixed_ioport_readb(opaque, 0);
 258     } else {
 259         return ~0u;
 260     }
 261 }
 262
 263 static void xen_platform_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
 264 {
 265     PCIXenPlatformState *s = opaque;
 266
 267     switch (addr) {
 268     case 0: /* Platform flags */
 269         platform_fixed_ioport_writeb(opaque, 0, val);
 270         break;
 271     case 8:
 272         log_writeb(s, val);
 273         break;
 274     default:
 275         break;
 276     }
 277 }
 278
 279 static MemoryRegionPortio xen_pci_portio[] = {
 280     { 0, 0x100, 1, .read = xen_platform_ioport_readb, },
 281     { 0, 0x100, 1, .write = xen_platform_ioport_writeb, },
 282     PORTIO_END_OF_LIST()
 283 };
 284
 285 static const MemoryRegionOps xen_pci_io_ops = {
 286     .old_portio = xen_pci_portio,
 287 };
 288
 289 static void platform_ioport_bar_setup(PCIXenPlatformState *d)
 290 {
 291     memory_region_init_io(&d->bar, &xen_pci_io_ops, d, "xen-pci", 0x100);
 292 }
 293
 294 static uint64_t platform_mmio_read(void *opaque, target_phys_addr_t addr,
 295                                    unsigned size)
 296 {
 297     DPRINTF("Warning: attempted read from physical address "
 298             "0x" TARGET_FMT_plx " in xen platform mmio space\n", addr);
 299
 300     return 0;
 301 }
 302
 303 static void platform_mmio_write(void *opaque, target_phys_addr_t addr,
 304                                 uint64_t val, unsigned size)
 305 {
 306     DPRINTF("Warning: attempted write of 0x%"PRIx64" to physical "
 307             "address 0x" TARGET_FMT_plx " in xen platform mmio space\n",
 308             val, addr);
 309 }
 310
 311 static const MemoryRegionOps platform_mmio_handler = {
 312     .read = &platform_mmio_read,
 313     .write = &platform_mmio_write,
 314     .endianness = DEVICE_NATIVE_ENDIAN,
 315 };
 316
 317 static void platform_mmio_setup(PCIXenPlatformState *d)
 318 {
 319     memory_region_init_io(&d->mmio_bar, &platform_mmio_handler, d,
 320                           "xen-mmio", 0x1000000);
 321 }
 322
 323 static int xen_platform_post_load(void *opaque, int version_id)
 324 {
 325     PCIXenPlatformState *s = opaque;
 326
 327     platform_fixed_ioport_writeb(s, 0, s->flags);
 328
 329     return 0;
 330 }
 331
 332 static const VMStateDescription vmstate_xen_platform = {
 333     .name = "platform",
 334     .version_id = 4,
 335     .minimum_version_id = 4,
 336     .minimum_version_id_old = 4,
 337     .post_load = xen_platform_post_load,
 338     .fields = (VMStateField []) {
 339         VMSTATE_PCI_DEVICE(pci_dev, PCIXenPlatformState),
 340         VMSTATE_UINT8(flags, PCIXenPlatformState),
 341         VMSTATE_END_OF_LIST()
 342     }
 343 };
 344
 345 static int xen_platform_initfn(PCIDevice *dev)
 346 {
 347     PCIXenPlatformState *d = DO_UPCAST(PCIXenPlatformState, pci_dev, dev);
 348     uint8_t *pci_conf;
 349
 350     pci_conf = d->pci_dev.config;
 351
 352     pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
 353
 354     pci_config_set_prog_interface(pci_conf, 0);
 355
 356     pci_conf[PCI_INTERRUPT_PIN] = 1;
 357
 358     platform_ioport_bar_setup(d);
 359     pci_register_bar(&d->pci_dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->bar);
 360
 361     /* reserve 16MB mmio address for share memory*/
 362     platform_mmio_setup(d);
 363     pci_register_bar(&d->pci_dev, 1, PCI_BASE_ADDRESS_MEM_PREFETCH,
 364                      &d->mmio_bar);
 365
 366     platform_fixed_ioport_init(d);
 367
 368     return 0;
 369 }
 370
 371 static void platform_reset(DeviceState *dev)
 372 {
 373     PCIXenPlatformState *s = DO_UPCAST(PCIXenPlatformState, pci_dev.qdev, dev);
 374
 375     platform_fixed_ioport_reset(s);
 376 }
 377
 378 static void xen_platform_class_init(ObjectClass *klass, void *data)
 379 {
 380     DeviceClass *dc = DEVICE_CLASS(klass);
 381     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 382
 383     k->init = xen_platform_initfn;
 384     k->vendor_id = PCI_VENDOR_ID_XEN;
 385     k->device_id = PCI_DEVICE_ID_XEN_PLATFORM;
 386     k->class_id = PCI_CLASS_OTHERS << 8 | 0x80;
 387     k->subsystem_vendor_id = PCI_VENDOR_ID_XEN;
 388     k->subsystem_id = PCI_DEVICE_ID_XEN_PLATFORM;
 389     k->revision = 1;
 390     dc->desc = "XEN platform pci device";
 391     dc->reset = platform_reset;
 392     dc->vmsd = &vmstate_xen_platform;
 393 }
 394
 395 static TypeInfo xen_platform_info = {
 396     .name          = "xen-platform",
 397     .parent        = TYPE_PCI_DEVICE,
 398     .instance_size = sizeof(PCIXenPlatformState),
 399     .class_init    = xen_platform_class_init,
 400 };
 401
 402 static void xen_platform_register_types(void)
 403 {
 404     type_register_static(&xen_platform_info);
 405 }
 406
 407 type_init(xen_platform_register_types)