target-i386: Add API to get note's size
[qemu/ar7.git] / hw / pc.h
blob74d3369a1272bc7f466ec527c1413b8f6fae6886
1 #ifndef HW_PC_H
2 #define HW_PC_H
4 #include "qemu-common.h"
5 #include "memory.h"
6 #include "ioport.h"
7 #include "isa.h"
8 #include "fdc.h"
9 #include "net.h"
10 #include "memory.h"
11 #include "ioapic.h"
13 /* PC-style peripherals (also used by other machines). */
15 /* serial.c */
17 SerialState *serial_init(int base, qemu_irq irq, int baudbase,
18 CharDriverState *chr);
19 SerialState *serial_mm_init(MemoryRegion *address_space,
20 target_phys_addr_t base, int it_shift,
21 qemu_irq irq, int baudbase,
22 CharDriverState *chr, enum device_endian);
23 static inline bool serial_isa_init(ISABus *bus, int index,
24 CharDriverState *chr)
26 ISADevice *dev;
28 dev = isa_try_create(bus, "isa-serial");
29 if (!dev) {
30 return false;
32 qdev_prop_set_uint32(&dev->qdev, "index", index);
33 qdev_prop_set_chr(&dev->qdev, "chardev", chr);
34 if (qdev_init(&dev->qdev) < 0) {
35 return false;
37 return true;
40 void serial_set_frequency(SerialState *s, uint32_t frequency);
42 /* parallel.c */
43 static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr)
45 ISADevice *dev;
47 dev = isa_try_create(bus, "isa-parallel");
48 if (!dev) {
49 return false;
51 qdev_prop_set_uint32(&dev->qdev, "index", index);
52 qdev_prop_set_chr(&dev->qdev, "chardev", chr);
53 if (qdev_init(&dev->qdev) < 0) {
54 return false;
56 return true;
59 bool parallel_mm_init(MemoryRegion *address_space,
60 target_phys_addr_t base, int it_shift, qemu_irq irq,
61 CharDriverState *chr);
63 /* i8259.c */
65 extern DeviceState *isa_pic;
66 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
67 qemu_irq *kvm_i8259_init(ISABus *bus);
68 int pic_read_irq(DeviceState *d);
69 int pic_get_output(DeviceState *d);
70 void pic_info(Monitor *mon);
71 void irq_info(Monitor *mon);
73 /* Global System Interrupts */
75 #define GSI_NUM_PINS IOAPIC_NUM_PINS
77 typedef struct GSIState {
78 qemu_irq i8259_irq[ISA_NUM_IRQS];
79 qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
80 } GSIState;
82 void gsi_handler(void *opaque, int n, int level);
84 /* vmport.c */
85 static inline void vmport_init(ISABus *bus)
87 isa_create_simple(bus, "vmport");
89 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
90 void vmmouse_get_data(uint32_t *data);
91 void vmmouse_set_data(const uint32_t *data);
93 /* pckbd.c */
95 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
96 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
97 MemoryRegion *region, ram_addr_t size,
98 target_phys_addr_t mask);
99 void i8042_isa_mouse_fake_event(void *opaque);
100 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
102 /* pc.c */
103 extern int fd_bootchk;
105 void pc_register_ferr_irq(qemu_irq irq);
106 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
108 void pc_cpus_init(const char *cpu_model);
109 void pc_memory_init(MemoryRegion *system_memory,
110 const char *kernel_filename,
111 const char *kernel_cmdline,
112 const char *initrd_filename,
113 ram_addr_t below_4g_mem_size,
114 ram_addr_t above_4g_mem_size,
115 MemoryRegion *rom_memory,
116 MemoryRegion **ram_memory);
117 qemu_irq *pc_allocate_cpu_irq(void);
118 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
119 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
120 ISADevice **rtc_state,
121 ISADevice **floppy,
122 bool no_vmport);
123 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
124 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
125 const char *boot_device,
126 ISADevice *floppy, BusState *ide0, BusState *ide1,
127 ISADevice *s);
128 void pc_pci_device_init(PCIBus *pci_bus);
130 typedef void (*cpu_set_smm_t)(int smm, void *arg);
131 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
133 /* acpi.c */
134 extern int acpi_enabled;
135 extern char *acpi_tables;
136 extern size_t acpi_tables_len;
138 void acpi_bios_init(void);
139 int acpi_table_add(const char *table_desc);
141 /* acpi_piix.c */
143 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
144 qemu_irq sci_irq, qemu_irq smi_irq,
145 int kvm_enabled);
146 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
148 /* hpet.c */
149 extern int no_hpet;
151 /* piix_pci.c */
152 struct PCII440FXState;
153 typedef struct PCII440FXState PCII440FXState;
155 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
156 ISABus **isa_bus, qemu_irq *pic,
157 MemoryRegion *address_space_mem,
158 MemoryRegion *address_space_io,
159 ram_addr_t ram_size,
160 target_phys_addr_t pci_hole_start,
161 target_phys_addr_t pci_hole_size,
162 target_phys_addr_t pci_hole64_start,
163 target_phys_addr_t pci_hole64_size,
164 MemoryRegion *pci_memory,
165 MemoryRegion *ram_memory);
167 /* piix4.c */
168 extern PCIDevice *piix4_dev;
169 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
171 /* vga.c */
172 enum vga_retrace_method {
173 VGA_RETRACE_DUMB,
174 VGA_RETRACE_PRECISE
177 extern enum vga_retrace_method vga_retrace_method;
179 static inline DeviceState *isa_vga_init(ISABus *bus)
181 ISADevice *dev;
183 dev = isa_try_create(bus, "isa-vga");
184 if (!dev) {
185 fprintf(stderr, "Warning: isa-vga not available\n");
186 return NULL;
188 qdev_init_nofail(&dev->qdev);
189 return &dev->qdev;
192 DeviceState *pci_vga_init(PCIBus *bus);
193 int isa_vga_mm_init(target_phys_addr_t vram_base,
194 target_phys_addr_t ctrl_base, int it_shift,
195 MemoryRegion *address_space);
197 /* cirrus_vga.c */
198 DeviceState *pci_cirrus_vga_init(PCIBus *bus);
200 /* ne2000.c */
201 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
203 ISADevice *dev;
205 qemu_check_nic_model(nd, "ne2k_isa");
207 dev = isa_try_create(bus, "ne2k_isa");
208 if (!dev) {
209 return false;
211 qdev_prop_set_uint32(&dev->qdev, "iobase", base);
212 qdev_prop_set_uint32(&dev->qdev, "irq", irq);
213 qdev_set_nic_properties(&dev->qdev, nd);
214 qdev_init_nofail(&dev->qdev);
215 return true;
218 /* pc_sysfw.c */
219 void pc_system_firmware_init(MemoryRegion *rom_memory);
221 /* e820 types */
222 #define E820_RAM 1
223 #define E820_RESERVED 2
224 #define E820_ACPI 3
225 #define E820_NVS 4
226 #define E820_UNUSABLE 5
228 int e820_add_entry(uint64_t, uint64_t, uint32_t);
230 #endif