hw/virtio-pci.c

   1 /*
   2  * Virtio PCI Bindings
   3  *
   4  * Copyright IBM, Corp. 2007
   5  * Copyright (c) 2009 CodeSourcery
   6  *
   7  * Authors:
   8  *  Anthony Liguori   <aliguori@us.ibm.com>
   9  *  Paul Brook        <paul@codesourcery.com>
  10  *
  11  * This work is licensed under the terms of the GNU GPL, version 2.  See
  12  * the COPYING file in the top-level directory.
  13  *
  14  */
  15
  16 #include <inttypes.h>
  17
  18 #include "virtio.h"
  19 #include "pci.h"
  20 //#include "sysemu.h"
  21 #include "msix.h"
  22
  23 /* from Linux's linux/virtio_pci.h */
  24
  25 /* A 32-bit r/o bitmask of the features supported by the host */
  26 #define VIRTIO_PCI_HOST_FEATURES        0
  27
  28 /* A 32-bit r/w bitmask of features activated by the guest */
  29 #define VIRTIO_PCI_GUEST_FEATURES       4
  30
  31 /* A 32-bit r/w PFN for the currently selected queue */
  32 #define VIRTIO_PCI_QUEUE_PFN            8
  33
  34 /* A 16-bit r/o queue size for the currently selected queue */
  35 #define VIRTIO_PCI_QUEUE_NUM            12
  36
  37 /* A 16-bit r/w queue selector */
  38 #define VIRTIO_PCI_QUEUE_SEL            14
  39
  40 /* A 16-bit r/w queue notifier */
  41 #define VIRTIO_PCI_QUEUE_NOTIFY         16
  42
  43 /* An 8-bit device status register.  */
  44 #define VIRTIO_PCI_STATUS               18
  45
  46 /* An 8-bit r/o interrupt status register.  Reading the value will return the
  47  * current contents of the ISR and will also clear it.  This is effectively
  48  * a read-and-acknowledge. */
  49 #define VIRTIO_PCI_ISR                  19
  50
  51 /* MSI-X registers: only enabled if MSI-X is enabled. */
  52 /* A 16-bit vector for configuration changes. */
  53 #define VIRTIO_MSI_CONFIG_VECTOR        20
  54 /* A 16-bit vector for selected queue notifications. */
  55 #define VIRTIO_MSI_QUEUE_VECTOR         22
  56
  57 /* Config space size */
  58 #define VIRTIO_PCI_CONFIG_NOMSI         20
  59 #define VIRTIO_PCI_CONFIG_MSI           24
  60 #define VIRTIO_PCI_REGION_SIZE(dev)     (msix_present(dev) ? \
  61                                          VIRTIO_PCI_CONFIG_MSI : \
  62                                          VIRTIO_PCI_CONFIG_NOMSI)
  63
  64 /* The remaining space is defined by each driver as the per-driver
  65  * configuration space */
  66 #define VIRTIO_PCI_CONFIG(dev)          (msix_enabled(dev) ? \
  67                                          VIRTIO_PCI_CONFIG_MSI : \
  68                                          VIRTIO_PCI_CONFIG_NOMSI)
  69
  70 /* Virtio ABI version, if we increment this, we break the guest driver. */
  71 #define VIRTIO_PCI_ABI_VERSION          0
  72
  73 /* How many bits to shift physical queue address written to QUEUE_PFN.
  74  * 12 is historical, and due to x86 page size. */
  75 #define VIRTIO_PCI_QUEUE_ADDR_SHIFT    12
  76
  77 /* QEMU doesn't strictly need write barriers since everything runs in
  78  * lock-step.  We'll leave the calls to wmb() in though to make it obvious for
  79  * KVM or if kqemu gets SMP support.
  80  */
  81 #define wmb() do { } while (0)
  82
  83 /* PCI bindings.  */
  84
  85 typedef struct {
  86     PCIDevice pci_dev;
  87     VirtIODevice *vdev;
  88     uint32_t addr;
  89
  90     uint16_t vendor;
  91     uint16_t device;
  92     uint16_t subvendor;
  93     uint16_t class_code;
  94     uint8_t pif;
  95 } VirtIOPCIProxy;
  96
  97 /* virtio device */
  98
  99 static void virtio_pci_notify(void *opaque, uint16_t vector)
 100 {
 101     VirtIOPCIProxy *proxy = opaque;
 102     if (msix_enabled(&proxy->pci_dev))
 103         msix_notify(&proxy->pci_dev, vector);
 104     else
 105         qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1);
 106 }
 107
 108 static void virtio_pci_save_config(void * opaque, QEMUFile *f)
 109 {
 110     VirtIOPCIProxy *proxy = opaque;
 111     pci_device_save(&proxy->pci_dev, f);
 112     msix_save(&proxy->pci_dev, f);
 113     if (msix_present(&proxy->pci_dev))
 114         qemu_put_be16(f, proxy->vdev->config_vector);
 115 }
 116
 117 static void virtio_pci_save_queue(void * opaque, int n, QEMUFile *f)
 118 {
 119     VirtIOPCIProxy *proxy = opaque;
 120     if (msix_present(&proxy->pci_dev))
 121         qemu_put_be16(f, virtio_queue_vector(proxy->vdev, n));
 122 }
 123
 124 static int virtio_pci_load_config(void * opaque, QEMUFile *f)
 125 {
 126     VirtIOPCIProxy *proxy = opaque;
 127     int ret;
 128     ret = pci_device_load(&proxy->pci_dev, f);
 129     if (ret)
 130         return ret;
 131     msix_load(&proxy->pci_dev, f);
 132     if (msix_present(&proxy->pci_dev))
 133         qemu_get_be16s(f, &proxy->vdev->config_vector);
 134     return 0;
 135 }
 136
 137 static int virtio_pci_load_queue(void * opaque, int n, QEMUFile *f)
 138 {
 139     VirtIOPCIProxy *proxy = opaque;
 140     uint16_t vector;
 141     if (!msix_present(&proxy->pci_dev))
 142         return 0;
 143     qemu_get_be16s(f, &vector);
 144     virtio_queue_set_vector(proxy->vdev, n, vector);
 145     return 0;
 146 }
 147
 148 static void virtio_pci_reset(void *opaque)
 149 {
 150     VirtIOPCIProxy *proxy = opaque;
 151     virtio_reset(proxy->vdev);
 152     msix_reset(&proxy->pci_dev);
 153 }
 154
 155 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
 156 {
 157     VirtIOPCIProxy *proxy = opaque;
 158     VirtIODevice *vdev = proxy->vdev;
 159     target_phys_addr_t pa;
 160
 161     switch (addr) {
 162     case VIRTIO_PCI_GUEST_FEATURES:
 163         /* Guest does not negotiate properly?  We have to assume nothing. */
 164         if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
 165             if (vdev->bad_features)
 166                 val = vdev->bad_features(vdev);
 167             else
 168                 val = 0;
 169         }
 170         if (vdev->set_features)
 171             vdev->set_features(vdev, val);
 172         vdev->features = val;
 173         break;
 174     case VIRTIO_PCI_QUEUE_PFN:
 175         pa = (target_phys_addr_t)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
 176         if (pa == 0)
 177             virtio_pci_reset(proxy);
 178         else
 179             virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
 180         break;
 181     case VIRTIO_PCI_QUEUE_SEL:
 182         if (val < VIRTIO_PCI_QUEUE_MAX)
 183             vdev->queue_sel = val;
 184         break;
 185     case VIRTIO_PCI_QUEUE_NOTIFY:
 186         virtio_queue_notify(vdev, val);
 187         break;
 188     case VIRTIO_PCI_STATUS:
 189         vdev->status = val & 0xFF;
 190         if (vdev->status == 0)
 191             virtio_pci_reset(proxy);
 192         break;
 193     case VIRTIO_MSI_CONFIG_VECTOR:
 194         msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
 195         /* Make it possible for guest to discover an error took place. */
 196         if (msix_vector_use(&proxy->pci_dev, val) < 0)
 197             val = VIRTIO_NO_VECTOR;
 198         vdev->config_vector = val;
 199         break;
 200     case VIRTIO_MSI_QUEUE_VECTOR:
 201         msix_vector_unuse(&proxy->pci_dev,
 202                           virtio_queue_vector(vdev, vdev->queue_sel));
 203         /* Make it possible for guest to discover an error took place. */
 204         if (msix_vector_use(&proxy->pci_dev, val) < 0)
 205             val = VIRTIO_NO_VECTOR;
 206         virtio_queue_set_vector(vdev, vdev->queue_sel, val);
 207         break;
 208     default:
 209         fprintf(stderr, "%s: unexpected address 0x%x value 0x%x\n",
 210                 __func__, addr, val);
 211         break;
 212     }
 213 }
 214
 215 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
 216 {
 217     VirtIODevice *vdev = proxy->vdev;
 218     uint32_t ret = 0xFFFFFFFF;
 219
 220     switch (addr) {
 221     case VIRTIO_PCI_HOST_FEATURES:
 222         ret = vdev->get_features(vdev);
 223         ret |= (1 << VIRTIO_F_NOTIFY_ON_EMPTY);
 224         ret |= (1 << VIRTIO_RING_F_INDIRECT_DESC);
 225         ret |= (1 << VIRTIO_F_BAD_FEATURE);
 226         break;
 227     case VIRTIO_PCI_GUEST_FEATURES:
 228         ret = vdev->features;
 229         break;
 230     case VIRTIO_PCI_QUEUE_PFN:
 231         ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
 232               >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
 233         break;
 234     case VIRTIO_PCI_QUEUE_NUM:
 235         ret = virtio_queue_get_num(vdev, vdev->queue_sel);
 236         break;
 237     case VIRTIO_PCI_QUEUE_SEL:
 238         ret = vdev->queue_sel;
 239         break;
 240     case VIRTIO_PCI_STATUS:
 241         ret = vdev->status;
 242         break;
 243     case VIRTIO_PCI_ISR:
 244         /* reading from the ISR also clears it. */
 245         ret = vdev->isr;
 246         vdev->isr = 0;
 247         qemu_set_irq(proxy->pci_dev.irq[0], 0);
 248         break;
 249     case VIRTIO_MSI_CONFIG_VECTOR:
 250         ret = vdev->config_vector;
 251         break;
 252     case VIRTIO_MSI_QUEUE_VECTOR:
 253         ret = virtio_queue_vector(vdev, vdev->queue_sel);
 254         break;
 255     default:
 256         break;
 257     }
 258
 259     return ret;
 260 }
 261
 262 static uint32_t virtio_pci_config_readb(void *opaque, uint32_t addr)
 263 {
 264     VirtIOPCIProxy *proxy = opaque;
 265     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 266     addr -= proxy->addr;
 267     if (addr < config)
 268         return virtio_ioport_read(proxy, addr);
 269     addr -= config;
 270     return virtio_config_readb(proxy->vdev, addr);
 271 }
 272
 273 static uint32_t virtio_pci_config_readw(void *opaque, uint32_t addr)
 274 {
 275     VirtIOPCIProxy *proxy = opaque;
 276     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 277     addr -= proxy->addr;
 278     if (addr < config)
 279         return virtio_ioport_read(proxy, addr);
 280     addr -= config;
 281     return virtio_config_readw(proxy->vdev, addr);
 282 }
 283
 284 static uint32_t virtio_pci_config_readl(void *opaque, uint32_t addr)
 285 {
 286     VirtIOPCIProxy *proxy = opaque;
 287     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 288     addr -= proxy->addr;
 289     if (addr < config)
 290         return virtio_ioport_read(proxy, addr);
 291     addr -= config;
 292     return virtio_config_readl(proxy->vdev, addr);
 293 }
 294
 295 static void virtio_pci_config_writeb(void *opaque, uint32_t addr, uint32_t val)
 296 {
 297     VirtIOPCIProxy *proxy = opaque;
 298     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 299     addr -= proxy->addr;
 300     if (addr < config) {
 301         virtio_ioport_write(proxy, addr, val);
 302         return;
 303     }
 304     addr -= config;
 305     virtio_config_writeb(proxy->vdev, addr, val);
 306 }
 307
 308 static void virtio_pci_config_writew(void *opaque, uint32_t addr, uint32_t val)
 309 {
 310     VirtIOPCIProxy *proxy = opaque;
 311     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 312     addr -= proxy->addr;
 313     if (addr < config) {
 314         virtio_ioport_write(proxy, addr, val);
 315         return;
 316     }
 317     addr -= config;
 318     virtio_config_writew(proxy->vdev, addr, val);
 319 }
 320
 321 static void virtio_pci_config_writel(void *opaque, uint32_t addr, uint32_t val)
 322 {
 323     VirtIOPCIProxy *proxy = opaque;
 324     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 325     addr -= proxy->addr;
 326     if (addr < config) {
 327         virtio_ioport_write(proxy, addr, val);
 328         return;
 329     }
 330     addr -= config;
 331     virtio_config_writel(proxy->vdev, addr, val);
 332 }
 333
 334 static void virtio_map(PCIDevice *pci_dev, int region_num,
 335                        uint32_t addr, uint32_t size, int type)
 336 {
 337     VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev);
 338     VirtIODevice *vdev = proxy->vdev;
 339     unsigned config_len = VIRTIO_PCI_REGION_SIZE(pci_dev) + vdev->config_len;
 340
 341     proxy->addr = addr;
 342
 343     register_ioport_write(addr, config_len, 1, virtio_pci_config_writeb, proxy);
 344     register_ioport_write(addr, config_len, 2, virtio_pci_config_writew, proxy);
 345     register_ioport_write(addr, config_len, 4, virtio_pci_config_writel, proxy);
 346     register_ioport_read(addr, config_len, 1, virtio_pci_config_readb, proxy);
 347     register_ioport_read(addr, config_len, 2, virtio_pci_config_readw, proxy);
 348     register_ioport_read(addr, config_len, 4, virtio_pci_config_readl, proxy);
 349
 350     if (vdev->config_len)
 351         vdev->get_config(vdev, vdev->config);
 352 }
 353
 354 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
 355                                 uint32_t val, int len)
 356 {
 357     pci_default_write_config(pci_dev, address, val, len);
 358     msix_write_config(pci_dev, address, val, len);
 359 }
 360
 361 static const VirtIOBindings virtio_pci_bindings = {
 362     .notify = virtio_pci_notify,
 363     .save_config = virtio_pci_save_config,
 364     .load_config = virtio_pci_load_config,
 365     .save_queue = virtio_pci_save_queue,
 366     .load_queue = virtio_pci_load_queue,
 367 };
 368
 369 static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev,
 370                             uint16_t vendor, uint16_t device,
 371                             uint16_t class_code, uint8_t pif)
 372 {
 373     uint8_t *config;
 374     uint32_t size;
 375
 376     proxy->vdev = vdev;
 377
 378     config = proxy->pci_dev.config;
 379     pci_config_set_vendor_id(config, vendor);
 380     pci_config_set_device_id(config, device);
 381
 382     config[0x08] = VIRTIO_PCI_ABI_VERSION;
 383
 384     config[0x09] = pif;
 385     pci_config_set_class(config, class_code);
 386     config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL;
 387
 388     config[0x2c] = vendor & 0xFF;
 389     config[0x2d] = (vendor >> 8) & 0xFF;
 390     config[0x2e] = vdev->device_id & 0xFF;
 391     config[0x2f] = (vdev->device_id >> 8) & 0xFF;
 392
 393     config[0x3d] = 1;
 394
 395     if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) {
 396         pci_register_bar(&proxy->pci_dev, 1,
 397                          msix_bar_size(&proxy->pci_dev),
 398                          PCI_ADDRESS_SPACE_MEM,
 399                          msix_mmio_map);
 400         proxy->pci_dev.config_write = virtio_write_config;
 401         proxy->pci_dev.unregister = msix_uninit;
 402     } else
 403         vdev->nvectors = 0;
 404
 405     size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) + vdev->config_len;
 406     if (size & (size-1))
 407         size = 1 << qemu_fls(size);
 408
 409     pci_register_bar(&proxy->pci_dev, 0, size, PCI_ADDRESS_SPACE_IO,
 410                            virtio_map);
 411
 412     qemu_register_reset(virtio_pci_reset, proxy);
 413
 414     virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
 415 }
 416
 417 static void virtio_blk_init_pci(PCIDevice *pci_dev)
 418 {
 419     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 420     VirtIODevice *vdev;
 421
 422     vdev = virtio_blk_init(&pci_dev->qdev);
 423     virtio_init_pci(proxy, vdev,
 424                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 425                     PCI_DEVICE_ID_VIRTIO_BLOCK,
 426                     PCI_CLASS_STORAGE_OTHER,
 427                     0x00);
 428 }
 429
 430 static void virtio_console_init_pci(PCIDevice *pci_dev)
 431 {
 432     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 433     VirtIODevice *vdev;
 434
 435     vdev = virtio_console_init(&pci_dev->qdev);
 436     virtio_init_pci(proxy, vdev,
 437                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 438                     PCI_DEVICE_ID_VIRTIO_CONSOLE,
 439                     PCI_CLASS_DISPLAY_OTHER,
 440                     0x00);
 441 }
 442
 443 static void virtio_net_init_pci(PCIDevice *pci_dev)
 444 {
 445     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 446     VirtIODevice *vdev;
 447
 448     vdev = virtio_net_init(&pci_dev->qdev);
 449     virtio_init_pci(proxy, vdev,
 450                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 451                     PCI_DEVICE_ID_VIRTIO_NET,
 452                     PCI_CLASS_NETWORK_ETHERNET,
 453                     0x00);
 454 }
 455
 456 static void virtio_balloon_init_pci(PCIDevice *pci_dev)
 457 {
 458     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 459     VirtIODevice *vdev;
 460
 461     vdev = virtio_balloon_init(&pci_dev->qdev);
 462     virtio_init_pci(proxy, vdev,
 463                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 464                     PCI_DEVICE_ID_VIRTIO_BALLOON,
 465                     PCI_CLASS_MEMORY_RAM,
 466                     0x00);
 467 }
 468
 469 static PCIDeviceInfo virtio_info[] = {
 470     {
 471         .qdev.name = "virtio-blk-pci",
 472         .qdev.size = sizeof(VirtIOPCIProxy),
 473         .init      = virtio_blk_init_pci,
 474     },{
 475         .qdev.name = "virtio-net-pci",
 476         .qdev.size = sizeof(VirtIOPCIProxy),
 477         .init      = virtio_net_init_pci,
 478     },{
 479         .qdev.name = "virtio-console-pci",
 480         .qdev.size = sizeof(VirtIOPCIProxy),
 481         .init      = virtio_console_init_pci,
 482     },{
 483         .qdev.name = "virtio-balloon-pci",
 484         .qdev.size = sizeof(VirtIOPCIProxy),
 485         .init      = virtio_balloon_init_pci,
 486     },{
 487         /* end of list */
 488     }
 489 };
 490
 491 static void virtio_pci_register_devices(void)
 492 {
 493     pci_qdev_register_many(virtio_info);
 494 }
 495
 496 device_init(virtio_pci_register_devices)