pm_smbus: remove #ifdef DEBUG.
[qemu/aliguori-queue.git] / hw / pckbd.c
blobe83b8a6bcb6e8446283072578d9c81820de9fe83
1 /*
2 * QEMU PC keyboard emulation
4 * Copyright (c) 2003 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
24 #include "hw.h"
25 #include "isa.h"
26 #include "pc.h"
27 #include "ps2.h"
28 #include "sysemu.h"
30 /* debug PC keyboard */
31 //#define DEBUG_KBD
33 /* Keyboard Controller Commands */
34 #define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */
35 #define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */
36 #define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */
37 #define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */
38 #define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */
39 #define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */
40 #define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */
41 #define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */
42 #define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */
43 #define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */
44 #define KBD_CCMD_READ_INPORT 0xC0 /* read input port */
45 #define KBD_CCMD_READ_OUTPORT 0xD0 /* read output port */
46 #define KBD_CCMD_WRITE_OUTPORT 0xD1 /* write output port */
47 #define KBD_CCMD_WRITE_OBUF 0xD2
48 #define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if
49 initiated by the auxiliary device */
50 #define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */
51 #define KBD_CCMD_DISABLE_A20 0xDD /* HP vectra only ? */
52 #define KBD_CCMD_ENABLE_A20 0xDF /* HP vectra only ? */
53 #define KBD_CCMD_RESET 0xFE
55 /* Keyboard Commands */
56 #define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */
57 #define KBD_CMD_ECHO 0xEE
58 #define KBD_CMD_GET_ID 0xF2 /* get keyboard ID */
59 #define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */
60 #define KBD_CMD_ENABLE 0xF4 /* Enable scanning */
61 #define KBD_CMD_RESET_DISABLE 0xF5 /* reset and disable scanning */
62 #define KBD_CMD_RESET_ENABLE 0xF6 /* reset and enable scanning */
63 #define KBD_CMD_RESET 0xFF /* Reset */
65 /* Keyboard Replies */
66 #define KBD_REPLY_POR 0xAA /* Power on reset */
67 #define KBD_REPLY_ACK 0xFA /* Command ACK */
68 #define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */
70 /* Status Register Bits */
71 #define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */
72 #define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
73 #define KBD_STAT_SELFTEST 0x04 /* Self test successful */
74 #define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */
75 #define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */
76 #define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */
77 #define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */
78 #define KBD_STAT_PERR 0x80 /* Parity error */
80 /* Controller Mode Register Bits */
81 #define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */
82 #define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */
83 #define KBD_MODE_SYS 0x04 /* The system flag (?) */
84 #define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */
85 #define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */
86 #define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */
87 #define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */
88 #define KBD_MODE_RFU 0x80
90 /* Mouse Commands */
91 #define AUX_SET_SCALE11 0xE6 /* Set 1:1 scaling */
92 #define AUX_SET_SCALE21 0xE7 /* Set 2:1 scaling */
93 #define AUX_SET_RES 0xE8 /* Set resolution */
94 #define AUX_GET_SCALE 0xE9 /* Get scaling factor */
95 #define AUX_SET_STREAM 0xEA /* Set stream mode */
96 #define AUX_POLL 0xEB /* Poll */
97 #define AUX_RESET_WRAP 0xEC /* Reset wrap mode */
98 #define AUX_SET_WRAP 0xEE /* Set wrap mode */
99 #define AUX_SET_REMOTE 0xF0 /* Set remote mode */
100 #define AUX_GET_TYPE 0xF2 /* Get type */
101 #define AUX_SET_SAMPLE 0xF3 /* Set sample rate */
102 #define AUX_ENABLE_DEV 0xF4 /* Enable aux device */
103 #define AUX_DISABLE_DEV 0xF5 /* Disable aux device */
104 #define AUX_SET_DEFAULT 0xF6
105 #define AUX_RESET 0xFF /* Reset aux device */
106 #define AUX_ACK 0xFA /* Command byte ACK. */
108 #define MOUSE_STATUS_REMOTE 0x40
109 #define MOUSE_STATUS_ENABLED 0x20
110 #define MOUSE_STATUS_SCALE21 0x10
112 #define KBD_PENDING_KBD 1
113 #define KBD_PENDING_AUX 2
115 typedef struct KBDState {
116 uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
117 uint8_t status;
118 uint8_t mode;
119 /* Bitmask of devices with data available. */
120 uint8_t pending;
121 void *kbd;
122 void *mouse;
124 qemu_irq irq_kbd;
125 qemu_irq irq_mouse;
126 target_phys_addr_t mask;
127 } KBDState;
129 /* update irq and KBD_STAT_[MOUSE_]OBF */
130 /* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
131 incorrect, but it avoids having to simulate exact delays */
132 static void kbd_update_irq(KBDState *s)
134 int irq_kbd_level, irq_mouse_level;
136 irq_kbd_level = 0;
137 irq_mouse_level = 0;
138 s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF);
139 if (s->pending) {
140 s->status |= KBD_STAT_OBF;
141 /* kbd data takes priority over aux data. */
142 if (s->pending == KBD_PENDING_AUX) {
143 s->status |= KBD_STAT_MOUSE_OBF;
144 if (s->mode & KBD_MODE_MOUSE_INT)
145 irq_mouse_level = 1;
146 } else {
147 if ((s->mode & KBD_MODE_KBD_INT) &&
148 !(s->mode & KBD_MODE_DISABLE_KBD))
149 irq_kbd_level = 1;
152 qemu_set_irq(s->irq_kbd, irq_kbd_level);
153 qemu_set_irq(s->irq_mouse, irq_mouse_level);
156 static void kbd_update_kbd_irq(void *opaque, int level)
158 KBDState *s = (KBDState *)opaque;
160 if (level)
161 s->pending |= KBD_PENDING_KBD;
162 else
163 s->pending &= ~KBD_PENDING_KBD;
164 kbd_update_irq(s);
167 static void kbd_update_aux_irq(void *opaque, int level)
169 KBDState *s = (KBDState *)opaque;
171 if (level)
172 s->pending |= KBD_PENDING_AUX;
173 else
174 s->pending &= ~KBD_PENDING_AUX;
175 kbd_update_irq(s);
178 static uint32_t kbd_read_status(void *opaque, uint32_t addr)
180 KBDState *s = opaque;
181 int val;
182 val = s->status;
183 #if defined(DEBUG_KBD)
184 printf("kbd: read status=0x%02x\n", val);
185 #endif
186 return val;
189 static void kbd_queue(KBDState *s, int b, int aux)
191 if (aux)
192 ps2_queue(s->mouse, b);
193 else
194 ps2_queue(s->kbd, b);
197 static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val)
199 KBDState *s = opaque;
201 #ifdef DEBUG_KBD
202 printf("kbd: write cmd=0x%02x\n", val);
203 #endif
204 switch(val) {
205 case KBD_CCMD_READ_MODE:
206 kbd_queue(s, s->mode, 0);
207 break;
208 case KBD_CCMD_WRITE_MODE:
209 case KBD_CCMD_WRITE_OBUF:
210 case KBD_CCMD_WRITE_AUX_OBUF:
211 case KBD_CCMD_WRITE_MOUSE:
212 case KBD_CCMD_WRITE_OUTPORT:
213 s->write_cmd = val;
214 break;
215 case KBD_CCMD_MOUSE_DISABLE:
216 s->mode |= KBD_MODE_DISABLE_MOUSE;
217 break;
218 case KBD_CCMD_MOUSE_ENABLE:
219 s->mode &= ~KBD_MODE_DISABLE_MOUSE;
220 break;
221 case KBD_CCMD_TEST_MOUSE:
222 kbd_queue(s, 0x00, 0);
223 break;
224 case KBD_CCMD_SELF_TEST:
225 s->status |= KBD_STAT_SELFTEST;
226 kbd_queue(s, 0x55, 0);
227 break;
228 case KBD_CCMD_KBD_TEST:
229 kbd_queue(s, 0x00, 0);
230 break;
231 case KBD_CCMD_KBD_DISABLE:
232 s->mode |= KBD_MODE_DISABLE_KBD;
233 kbd_update_irq(s);
234 break;
235 case KBD_CCMD_KBD_ENABLE:
236 s->mode &= ~KBD_MODE_DISABLE_KBD;
237 kbd_update_irq(s);
238 break;
239 case KBD_CCMD_READ_INPORT:
240 kbd_queue(s, 0x00, 0);
241 break;
242 case KBD_CCMD_READ_OUTPORT:
243 /* XXX: check that */
244 #ifdef TARGET_I386
245 val = 0x01 | (ioport_get_a20() << 1);
246 #else
247 val = 0x01;
248 #endif
249 if (s->status & KBD_STAT_OBF)
250 val |= 0x10;
251 if (s->status & KBD_STAT_MOUSE_OBF)
252 val |= 0x20;
253 kbd_queue(s, val, 0);
254 break;
255 #ifdef TARGET_I386
256 case KBD_CCMD_ENABLE_A20:
257 ioport_set_a20(1);
258 break;
259 case KBD_CCMD_DISABLE_A20:
260 ioport_set_a20(0);
261 break;
262 #endif
263 case KBD_CCMD_RESET:
264 qemu_system_reset_request();
265 break;
266 case 0xff:
267 /* ignore that - I don't know what is its use */
268 break;
269 default:
270 fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", val);
271 break;
275 static uint32_t kbd_read_data(void *opaque, uint32_t addr)
277 KBDState *s = opaque;
278 uint32_t val;
280 if (s->pending == KBD_PENDING_AUX)
281 val = ps2_read_data(s->mouse);
282 else
283 val = ps2_read_data(s->kbd);
285 #if defined(DEBUG_KBD)
286 printf("kbd: read data=0x%02x\n", val);
287 #endif
288 return val;
291 static void kbd_write_data(void *opaque, uint32_t addr, uint32_t val)
293 KBDState *s = opaque;
295 #ifdef DEBUG_KBD
296 printf("kbd: write data=0x%02x\n", val);
297 #endif
299 switch(s->write_cmd) {
300 case 0:
301 ps2_write_keyboard(s->kbd, val);
302 break;
303 case KBD_CCMD_WRITE_MODE:
304 s->mode = val;
305 ps2_keyboard_set_translation(s->kbd, (s->mode & KBD_MODE_KCC) != 0);
306 /* ??? */
307 kbd_update_irq(s);
308 break;
309 case KBD_CCMD_WRITE_OBUF:
310 kbd_queue(s, val, 0);
311 break;
312 case KBD_CCMD_WRITE_AUX_OBUF:
313 kbd_queue(s, val, 1);
314 break;
315 case KBD_CCMD_WRITE_OUTPORT:
316 #ifdef TARGET_I386
317 ioport_set_a20((val >> 1) & 1);
318 #endif
319 if (!(val & 1)) {
320 qemu_system_reset_request();
322 break;
323 case KBD_CCMD_WRITE_MOUSE:
324 ps2_write_mouse(s->mouse, val);
325 break;
326 default:
327 break;
329 s->write_cmd = 0;
332 static void kbd_reset(void *opaque)
334 KBDState *s = opaque;
336 s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT;
337 s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED;
340 static const VMStateDescription vmstate_kbd = {
341 .name = "pckbd",
342 .version_id = 3,
343 .minimum_version_id = 3,
344 .minimum_version_id_old = 3,
345 .fields = (VMStateField []) {
346 VMSTATE_UINT8(write_cmd, KBDState),
347 VMSTATE_UINT8(status, KBDState),
348 VMSTATE_UINT8(mode, KBDState),
349 VMSTATE_UINT8(pending, KBDState),
350 VMSTATE_END_OF_LIST()
354 /* Memory mapped interface */
355 static uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr)
357 KBDState *s = opaque;
359 if (addr & s->mask)
360 return kbd_read_status(s, 0) & 0xff;
361 else
362 return kbd_read_data(s, 0) & 0xff;
365 static void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
367 KBDState *s = opaque;
369 if (addr & s->mask)
370 kbd_write_command(s, 0, value & 0xff);
371 else
372 kbd_write_data(s, 0, value & 0xff);
375 static CPUReadMemoryFunc * const kbd_mm_read[] = {
376 &kbd_mm_readb,
377 &kbd_mm_readb,
378 &kbd_mm_readb,
381 static CPUWriteMemoryFunc * const kbd_mm_write[] = {
382 &kbd_mm_writeb,
383 &kbd_mm_writeb,
384 &kbd_mm_writeb,
387 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
388 target_phys_addr_t base, ram_addr_t size,
389 target_phys_addr_t mask)
391 KBDState *s = qemu_mallocz(sizeof(KBDState));
392 int s_io_memory;
394 s->irq_kbd = kbd_irq;
395 s->irq_mouse = mouse_irq;
396 s->mask = mask;
398 vmstate_register(0, &vmstate_kbd, s);
399 s_io_memory = cpu_register_io_memory(kbd_mm_read, kbd_mm_write, s);
400 cpu_register_physical_memory(base, size, s_io_memory);
402 s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
403 s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
404 #ifdef TARGET_I386
405 vmmouse_init(s->mouse);
406 #endif
407 qemu_register_reset(kbd_reset, s);
410 typedef struct ISAKBDState {
411 ISADevice dev;
412 KBDState kbd;
413 } ISAKBDState;
415 static const VMStateDescription vmstate_kbd_isa = {
416 .name = "pckbd",
417 .version_id = 3,
418 .minimum_version_id = 3,
419 .minimum_version_id_old = 3,
420 .fields = (VMStateField []) {
421 VMSTATE_STRUCT(kbd, ISAKBDState, 0, vmstate_kbd, KBDState),
422 VMSTATE_END_OF_LIST()
426 static int i8042_initfn(ISADevice *dev)
428 KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd);
430 isa_init_irq(dev, &s->irq_kbd, 1);
431 isa_init_irq(dev, &s->irq_mouse, 12);
433 register_ioport_read(0x60, 1, 1, kbd_read_data, s);
434 register_ioport_write(0x60, 1, 1, kbd_write_data, s);
435 register_ioport_read(0x64, 1, 1, kbd_read_status, s);
436 register_ioport_write(0x64, 1, 1, kbd_write_command, s);
438 s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
439 s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
440 #ifdef TARGET_I386
441 vmmouse_init(s->mouse);
442 #endif
443 qemu_register_reset(kbd_reset, s);
444 return 0;
447 static ISADeviceInfo i8042_info = {
448 .qdev.name = "i8042",
449 .qdev.size = sizeof(ISAKBDState),
450 .qdev.vmsd = &vmstate_kbd_isa,
451 .qdev.no_user = 1,
452 .init = i8042_initfn,
455 static void i8042_register(void)
457 isa_qdev_register(&i8042_info);
459 device_init(i8042_register)