?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Add a pc-0.11 machine type and make the pc type an alias
[qemu/aliguori-queue.git] / hw / pc.c
blobc55c303bc1626c18085149290747038545e99ed9
1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #include "hw.h"
25 #include "pc.h"
26 #include "fdc.h"
27 #include "pci.h"
28 #include "block.h"
29 #include "sysemu.h"
30 #include "audio/audio.h"
31 #include "net.h"
32 #include "smbus.h"
33 #include "boards.h"
34 #include "monitor.h"
35 #include "fw_cfg.h"
36 #include "hpet_emul.h"
37 #include "watchdog.h"
38 #include "smbios.h"
39
40 /* output Bochs bios info messages */
41 //#define DEBUG_BIOS
42
43 /* Show multiboot debug output */
44 //#define DEBUG_MULTIBOOT
45
46 #define BIOS_FILENAME "bios.bin"
47 #define VGABIOS_FILENAME "vgabios.bin"
48 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
49
50 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
51
52 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
53 #define ACPI_DATA_SIZE 0x10000
54 #define BIOS_CFG_IOPORT 0x510
55 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
56 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
57
58 #define MAX_IDE_BUS 2
59
60 static fdctrl_t *floppy_controller;
61 static RTCState *rtc_state;
62 static PITState *pit;
63 static IOAPICState *ioapic;
64 static PCIDevice *i440fx_state;
65
66 typedef struct rom_reset_data {
67 uint8_t *data;
68 target_phys_addr_t addr;
69 unsigned size;
70 } RomResetData;
71
72 static void option_rom_reset(void *_rrd)
73 {
74 RomResetData *rrd = _rrd;
75
76 cpu_physical_memory_write_rom(rrd->addr, rrd->data, rrd->size);
77 }
78
79 static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
80 {
81 RomResetData *rrd = qemu_malloc(sizeof *rrd);
82
83 rrd->data = qemu_malloc(size);
84 cpu_physical_memory_read(addr, rrd->data, size);
85 rrd->addr = addr;
86 rrd->size = size;
87 qemu_register_reset(option_rom_reset, rrd);
88 }
89
90 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
91 {
92 }
93
94 /* MSDOS compatibility mode FPU exception support */
95 static qemu_irq ferr_irq;
96 /* XXX: add IGNNE support */
97 void cpu_set_ferr(CPUX86State *s)
98 {
99 qemu_irq_raise(ferr_irq);
100 }
101
102 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
103 {
104 qemu_irq_lower(ferr_irq);
105 }
106
107 /* TSC handling */
108 uint64_t cpu_get_tsc(CPUX86State *env)
109 {
110 /* Note: when using kqemu, it is more logical to return the host TSC
111 because kqemu does not trap the RDTSC instruction for
112 performance reasons */
113 #ifdef CONFIG_KQEMU
114 if (env->kqemu_enabled) {
115 return cpu_get_real_ticks();
116 } else
117 #endif
118 {
119 return cpu_get_ticks();
120 }
121 }
122
123 /* SMM support */
124 void cpu_smm_update(CPUState *env)
125 {
126 if (i440fx_state && env == first_cpu)
127 i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
128 }
129
130
131 /* IRQ handling */
132 int cpu_get_pic_interrupt(CPUState *env)
133 {
134 int intno;
135
136 intno = apic_get_interrupt(env);
137 if (intno >= 0) {
138 /* set irq request if a PIC irq is still pending */
139 /* XXX: improve that */
140 pic_update_irq(isa_pic);
141 return intno;
142 }
143 /* read the irq from the PIC */
144 if (!apic_accept_pic_intr(env))
145 return -1;
146
147 intno = pic_read_irq(isa_pic);
148 return intno;
149 }
150
151 static void pic_irq_request(void *opaque, int irq, int level)
152 {
153 CPUState *env = first_cpu;
154
155 if (env->apic_state) {
156 while (env) {
157 if (apic_accept_pic_intr(env))
158 apic_deliver_pic_intr(env, level);
159 env = env->next_cpu;
160 }
161 } else {
162 if (level)
163 cpu_interrupt(env, CPU_INTERRUPT_HARD);
164 else
165 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
166 }
167 }
168
169 /* PC cmos mappings */
170
171 #define REG_EQUIPMENT_BYTE 0x14
172
173 static int cmos_get_fd_drive_type(int fd0)
174 {
175 int val;
176
177 switch (fd0) {
178 case 0:
179 /* 1.44 Mb 3"5 drive */
180 val = 4;
181 break;
182 case 1:
183 /* 2.88 Mb 3"5 drive */
184 val = 5;
185 break;
186 case 2:
187 /* 1.2 Mb 5"5 drive */
188 val = 2;
189 break;
190 default:
191 val = 0;
192 break;
193 }
194 return val;
195 }
196
197 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
198 {
199 RTCState *s = rtc_state;
200 int cylinders, heads, sectors;
201 bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
202 rtc_set_memory(s, type_ofs, 47);
203 rtc_set_memory(s, info_ofs, cylinders);
204 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
205 rtc_set_memory(s, info_ofs + 2, heads);
206 rtc_set_memory(s, info_ofs + 3, 0xff);
207 rtc_set_memory(s, info_ofs + 4, 0xff);
208 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
209 rtc_set_memory(s, info_ofs + 6, cylinders);
210 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
211 rtc_set_memory(s, info_ofs + 8, sectors);
212 }
213
214 /* convert boot_device letter to something recognizable by the bios */
215 static int boot_device2nibble(char boot_device)
216 {
217 switch(boot_device) {
218 case 'a':
219 case 'b':
220 return 0x01; /* floppy boot */
221 case 'c':
222 return 0x02; /* hard drive boot */
223 case 'd':
224 return 0x03; /* CD-ROM boot */
225 case 'n':
226 return 0x04; /* Network boot */
227 }
228 return 0;
229 }
230
231 /* copy/pasted from cmos_init, should be made a general function
232 and used there as well */
233 static int pc_boot_set(void *opaque, const char *boot_device)
234 {
235 Monitor *mon = cur_mon;
236 #define PC_MAX_BOOT_DEVICES 3
237 RTCState *s = (RTCState *)opaque;
238 int nbds, bds[3] = { 0, };
239 int i;
240
241 nbds = strlen(boot_device);
242 if (nbds > PC_MAX_BOOT_DEVICES) {
243 monitor_printf(mon, "Too many boot devices for PC\n");
244 return(1);
245 }
246 for (i = 0; i < nbds; i++) {
247 bds[i] = boot_device2nibble(boot_device[i]);
248 if (bds[i] == 0) {
249 monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
250 boot_device[i]);
251 return(1);
252 }
253 }
254 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
255 rtc_set_memory(s, 0x38, (bds[2] << 4));
256 return(0);
257 }
258
259 /* hd_table must contain 4 block drivers */
260 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
261 const char *boot_device, BlockDriverState **hd_table)
262 {
263 RTCState *s = rtc_state;
264 int nbds, bds[3] = { 0, };
265 int val;
266 int fd0, fd1, nb;
267 int i;
268
269 /* various important CMOS locations needed by PC/Bochs bios */
270
271 /* memory size */
272 val = 640; /* base memory in K */
273 rtc_set_memory(s, 0x15, val);
274 rtc_set_memory(s, 0x16, val >> 8);
275
276 val = (ram_size / 1024) - 1024;
277 if (val > 65535)
278 val = 65535;
279 rtc_set_memory(s, 0x17, val);
280 rtc_set_memory(s, 0x18, val >> 8);
281 rtc_set_memory(s, 0x30, val);
282 rtc_set_memory(s, 0x31, val >> 8);
283
284 if (above_4g_mem_size) {
285 rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
286 rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
287 rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
288 }
289
290 if (ram_size > (16 * 1024 * 1024))
291 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
292 else
293 val = 0;
294 if (val > 65535)
295 val = 65535;
296 rtc_set_memory(s, 0x34, val);
297 rtc_set_memory(s, 0x35, val >> 8);
298
299 /* set the number of CPU */
300 rtc_set_memory(s, 0x5f, smp_cpus - 1);
301
302 /* set boot devices, and disable floppy signature check if requested */
303 #define PC_MAX_BOOT_DEVICES 3
304 nbds = strlen(boot_device);
305 if (nbds > PC_MAX_BOOT_DEVICES) {
306 fprintf(stderr, "Too many boot devices for PC\n");
307 exit(1);
308 }
309 for (i = 0; i < nbds; i++) {
310 bds[i] = boot_device2nibble(boot_device[i]);
311 if (bds[i] == 0) {
312 fprintf(stderr, "Invalid boot device for PC: '%c'\n",
313 boot_device[i]);
314 exit(1);
315 }
316 }
317 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
318 rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
319
320 /* floppy type */
321
322 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
323 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
324
325 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
326 rtc_set_memory(s, 0x10, val);
327
328 val = 0;
329 nb = 0;
330 if (fd0 < 3)
331 nb++;
332 if (fd1 < 3)
333 nb++;
334 switch (nb) {
335 case 0:
336 break;
337 case 1:
338 val |= 0x01; /* 1 drive, ready for boot */
339 break;
340 case 2:
341 val |= 0x41; /* 2 drives, ready for boot */
342 break;
343 }
344 val |= 0x02; /* FPU is there */
345 val |= 0x04; /* PS/2 mouse installed */
346 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
347
348 /* hard drives */
349
350 rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
351 if (hd_table[0])
352 cmos_init_hd(0x19, 0x1b, hd_table[0]);
353 if (hd_table[1])
354 cmos_init_hd(0x1a, 0x24, hd_table[1]);
355
356 val = 0;
357 for (i = 0; i < 4; i++) {
358 if (hd_table[i]) {
359 int cylinders, heads, sectors, translation;
360 /* NOTE: bdrv_get_geometry_hint() returns the physical
361 geometry. It is always such that: 1 <= sects <= 63, 1
362 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
363 geometry can be different if a translation is done. */
364 translation = bdrv_get_translation_hint(hd_table[i]);
365 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
366 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
367 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
368 /* No translation. */
369 translation = 0;
370 } else {
371 /* LBA translation. */
372 translation = 1;
373 }
374 } else {
375 translation--;
376 }
377 val |= translation << (i * 2);
378 }
379 }
380 rtc_set_memory(s, 0x39, val);
381 }
382
383 void ioport_set_a20(int enable)
384 {
385 /* XXX: send to all CPUs ? */
386 cpu_x86_set_a20(first_cpu, enable);
387 }
388
389 int ioport_get_a20(void)
390 {
391 return ((first_cpu->a20_mask >> 20) & 1);
392 }
393
394 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
395 {
396 ioport_set_a20((val >> 1) & 1);
397 /* XXX: bit 0 is fast reset */
398 }
399
400 static uint32_t ioport92_read(void *opaque, uint32_t addr)
401 {
402 return ioport_get_a20() << 1;
403 }
404
405 /***********************************************************/
406 /* Bochs BIOS debug ports */
407
408 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
409 {
410 static const char shutdown_str[8] = "Shutdown";
411 static int shutdown_index = 0;
412
413 switch(addr) {
414 /* Bochs BIOS messages */
415 case 0x400:
416 case 0x401:
417 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
418 exit(1);
419 case 0x402:
420 case 0x403:
421 #ifdef DEBUG_BIOS
422 fprintf(stderr, "%c", val);
423 #endif
424 break;
425 case 0x8900:
426 /* same as Bochs power off */
427 if (val == shutdown_str[shutdown_index]) {
428 shutdown_index++;
429 if (shutdown_index == 8) {
430 shutdown_index = 0;
431 qemu_system_shutdown_request();
432 }
433 } else {
434 shutdown_index = 0;
435 }
436 break;
437
438 /* LGPL'ed VGA BIOS messages */
439 case 0x501:
440 case 0x502:
441 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
442 exit(1);
443 case 0x500:
444 case 0x503:
445 #ifdef DEBUG_BIOS
446 fprintf(stderr, "%c", val);
447 #endif
448 break;
449 }
450 }
451
452 extern uint64_t node_cpumask[MAX_NODES];
453
454 static void *bochs_bios_init(void)
455 {
456 void *fw_cfg;
457 uint8_t *smbios_table;
458 size_t smbios_len;
459 uint64_t *numa_fw_cfg;
460 int i, j;
461
462 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
463 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
464 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
465 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
466 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
467
468 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
469 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
470 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
471 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
472
473 fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
474
475 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
476 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
477 fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
478 acpi_tables_len);
479
480 smbios_table = smbios_get_table(&smbios_len);
481 if (smbios_table)
482 fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
483 smbios_table, smbios_len);
484
485 /* allocate memory for the NUMA channel: one (64bit) word for the number
486 * of nodes, one word for each VCPU->node and one word for each node to
487 * hold the amount of memory.
488 */
489 numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
490 numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
491 for (i = 0; i < smp_cpus; i++) {
492 for (j = 0; j < nb_numa_nodes; j++) {
493 if (node_cpumask[j] & (1 << i)) {
494 numa_fw_cfg[i + 1] = cpu_to_le64(j);
495 break;
496 }
497 }
498 }
499 for (i = 0; i < nb_numa_nodes; i++) {
500 numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
501 }
502 fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
503 (1 + smp_cpus + nb_numa_nodes) * 8);
504
505 return fw_cfg;
506 }
507
508 /* Generate an initial boot sector which sets state and jump to
509 a specified vector */
510 static void generate_bootsect(target_phys_addr_t option_rom,
511 uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
512 {
513 uint8_t rom[512], *p, *reloc;
514 uint8_t sum;
515 int i;
516
517 memset(rom, 0, sizeof(rom));
518
519 p = rom;
520 /* Make sure we have an option rom signature */
521 *p++ = 0x55;
522 *p++ = 0xaa;
523
524 /* ROM size in sectors*/
525 *p++ = 1;
526
527 /* Hook int19 */
528
529 *p++ = 0x50; /* push ax */
530 *p++ = 0x1e; /* push ds */
531 *p++ = 0x31; *p++ = 0xc0; /* xor ax, ax */
532 *p++ = 0x8e; *p++ = 0xd8; /* mov ax, ds */
533
534 *p++ = 0xc7; *p++ = 0x06; /* movvw _start,0x64 */
535 *p++ = 0x64; *p++ = 0x00;
536 reloc = p;
537 *p++ = 0x00; *p++ = 0x00;
538
539 *p++ = 0x8c; *p++ = 0x0e; /* mov cs,0x66 */
540 *p++ = 0x66; *p++ = 0x00;
541
542 *p++ = 0x1f; /* pop ds */
543 *p++ = 0x58; /* pop ax */
544 *p++ = 0xcb; /* lret */
545
546 /* Actual code */
547 *reloc = (p - rom);
548
549 *p++ = 0xfa; /* CLI */
550 *p++ = 0xfc; /* CLD */
551
552 for (i = 0; i < 6; i++) {
553 if (i == 1) /* Skip CS */
554 continue;
555
556 *p++ = 0xb8; /* MOV AX,imm16 */
557 *p++ = segs[i];
558 *p++ = segs[i] >> 8;
559 *p++ = 0x8e; /* MOV <seg>,AX */
560 *p++ = 0xc0 + (i << 3);
561 }
562
563 for (i = 0; i < 8; i++) {
564 *p++ = 0x66; /* 32-bit operand size */
565 *p++ = 0xb8 + i; /* MOV <reg>,imm32 */
566 *p++ = gpr[i];
567 *p++ = gpr[i] >> 8;
568 *p++ = gpr[i] >> 16;
569 *p++ = gpr[i] >> 24;
570 }
571
572 *p++ = 0xea; /* JMP FAR */
573 *p++ = ip; /* IP */
574 *p++ = ip >> 8;
575 *p++ = segs[1]; /* CS */
576 *p++ = segs[1] >> 8;
577
578 /* sign rom */
579 sum = 0;
580 for (i = 0; i < (sizeof(rom) - 1); i++)
581 sum += rom[i];
582 rom[sizeof(rom) - 1] = -sum;
583
584 cpu_physical_memory_write_rom(option_rom, rom, sizeof(rom));
585 option_rom_setup_reset(option_rom, sizeof (rom));
586 }
587
588 static long get_file_size(FILE *f)
589 {
590 long where, size;
591
592 /* XXX: on Unix systems, using fstat() probably makes more sense */
593
594 where = ftell(f);
595 fseek(f, 0, SEEK_END);
596 size = ftell(f);
597 fseek(f, where, SEEK_SET);
598
599 return size;
600 }
601
602 #define MULTIBOOT_STRUCT_ADDR 0x9000
603
604 #if MULTIBOOT_STRUCT_ADDR > 0xf0000
605 #error multiboot struct needs to fit in 16 bit real mode
606 #endif
607
608 static int load_multiboot(void *fw_cfg,
609 FILE *f,
610 const char *kernel_filename,
611 const char *initrd_filename,
612 const char *kernel_cmdline,
613 uint8_t *header)
614 {
615 int i, t, is_multiboot = 0;
616 uint32_t flags = 0;
617 uint32_t mh_entry_addr;
618 uint32_t mh_load_addr;
619 uint32_t mb_kernel_size;
620 uint32_t mmap_addr = MULTIBOOT_STRUCT_ADDR;
621 uint32_t mb_bootinfo = MULTIBOOT_STRUCT_ADDR + 0x500;
622 uint32_t mb_cmdline = mb_bootinfo + 0x200;
623 uint32_t mb_mod_end;
624
625 /* Ok, let's see if it is a multiboot image.
626 The header is 12x32bit long, so the latest entry may be 8192 - 48. */
627 for (i = 0; i < (8192 - 48); i += 4) {
628 if (ldl_p(header+i) == 0x1BADB002) {
629 uint32_t checksum = ldl_p(header+i+8);
630 flags = ldl_p(header+i+4);
631 checksum += flags;
632 checksum += (uint32_t)0x1BADB002;
633 if (!checksum) {
634 is_multiboot = 1;
635 break;
636 }
637 }
638 }
639
640 if (!is_multiboot)
641 return 0; /* no multiboot */
642
643 #ifdef DEBUG_MULTIBOOT
644 fprintf(stderr, "qemu: I believe we found a multiboot image!\n");
645 #endif
646
647 if (flags & 0x00000004) { /* MULTIBOOT_HEADER_HAS_VBE */
648 fprintf(stderr, "qemu: multiboot knows VBE. we don't.\n");
649 }
650 if (!(flags & 0x00010000)) { /* MULTIBOOT_HEADER_HAS_ADDR */
651 uint64_t elf_entry;
652 int kernel_size;
653 fclose(f);
654 kernel_size = load_elf(kernel_filename, 0, &elf_entry, NULL, NULL);
655 if (kernel_size < 0) {
656 fprintf(stderr, "Error while loading elf kernel\n");
657 exit(1);
658 }
659 mh_load_addr = mh_entry_addr = elf_entry;
660 mb_kernel_size = kernel_size;
661
662 #ifdef DEBUG_MULTIBOOT
663 fprintf(stderr, "qemu: loading multiboot-elf kernel (%#x bytes) with entry %#zx\n",
664 mb_kernel_size, (size_t)mh_entry_addr);
665 #endif
666 } else {
667 /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_ADDR. */
668 uint32_t mh_header_addr = ldl_p(header+i+12);
669 mh_load_addr = ldl_p(header+i+16);
670 #ifdef DEBUG_MULTIBOOT
671 uint32_t mh_load_end_addr = ldl_p(header+i+20);
672 uint32_t mh_bss_end_addr = ldl_p(header+i+24);
673 #endif
674 uint32_t mb_kernel_text_offset = i - (mh_header_addr - mh_load_addr);
675
676 mh_entry_addr = ldl_p(header+i+28);
677 mb_kernel_size = get_file_size(f) - mb_kernel_text_offset;
678
679 /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_VBE.
680 uint32_t mh_mode_type = ldl_p(header+i+32);
681 uint32_t mh_width = ldl_p(header+i+36);
682 uint32_t mh_height = ldl_p(header+i+40);
683 uint32_t mh_depth = ldl_p(header+i+44); */
684
685 #ifdef DEBUG_MULTIBOOT
686 fprintf(stderr, "multiboot: mh_header_addr = %#x\n", mh_header_addr);
687 fprintf(stderr, "multiboot: mh_load_addr = %#x\n", mh_load_addr);
688 fprintf(stderr, "multiboot: mh_load_end_addr = %#x\n", mh_load_end_addr);
689 fprintf(stderr, "multiboot: mh_bss_end_addr = %#x\n", mh_bss_end_addr);
690 #endif
691
692 fseek(f, mb_kernel_text_offset, SEEK_SET);
693
694 #ifdef DEBUG_MULTIBOOT
695 fprintf(stderr, "qemu: loading multiboot kernel (%#x bytes) at %#x\n",
696 mb_kernel_size, mh_load_addr);
697 #endif
698
699 if (!fread_targphys_ok(mh_load_addr, mb_kernel_size, f)) {
700 fprintf(stderr, "qemu: read error on multiboot kernel '%s' (%#x)\n",
701 kernel_filename, mb_kernel_size);
702 exit(1);
703 }
704 fclose(f);
705 }
706
707 /* blob size is only the kernel for now */
708 mb_mod_end = mh_load_addr + mb_kernel_size;
709
710 /* load modules */
711 stl_phys(mb_bootinfo + 20, 0x0); /* mods_count */
712 if (initrd_filename) {
713 uint32_t mb_mod_info = mb_bootinfo + 0x100;
714 uint32_t mb_mod_cmdline = mb_bootinfo + 0x300;
715 uint32_t mb_mod_start = mh_load_addr;
716 uint32_t mb_mod_length = mb_kernel_size;
717 char *next_initrd;
718 char *next_space;
719 int mb_mod_count = 0;
720
721 do {
722 next_initrd = strchr(initrd_filename, ',');
723 if (next_initrd)
724 *next_initrd = '\0';
725 /* if a space comes after the module filename, treat everything
726 after that as parameters */
727 cpu_physical_memory_write(mb_mod_cmdline, (uint8_t*)initrd_filename,
728 strlen(initrd_filename) + 1);
729 stl_phys(mb_mod_info + 8, mb_mod_cmdline); /* string */
730 mb_mod_cmdline += strlen(initrd_filename) + 1;
731 if ((next_space = strchr(initrd_filename, ' ')))
732 *next_space = '\0';
733 #ifdef DEBUG_MULTIBOOT
734 printf("multiboot loading module: %s\n", initrd_filename);
735 #endif
736 f = fopen(initrd_filename, "rb");
737 if (f) {
738 mb_mod_start = (mb_mod_start + mb_mod_length + (TARGET_PAGE_SIZE - 1))
739 & (TARGET_PAGE_MASK);
740 mb_mod_length = get_file_size(f);
741 mb_mod_end = mb_mod_start + mb_mod_length;
742
743 if (!fread_targphys_ok(mb_mod_start, mb_mod_length, f)) {
744 fprintf(stderr, "qemu: read error on multiboot module '%s' (%#x)\n",
745 initrd_filename, mb_mod_length);
746 exit(1);
747 }
748
749 mb_mod_count++;
750 stl_phys(mb_mod_info + 0, mb_mod_start);
751 stl_phys(mb_mod_info + 4, mb_mod_start + mb_mod_length);
752 #ifdef DEBUG_MULTIBOOT
753 printf("mod_start: %#x\nmod_end: %#x\n", mb_mod_start,
754 mb_mod_start + mb_mod_length);
755 #endif
756 stl_phys(mb_mod_info + 12, 0x0); /* reserved */
757 }
758 initrd_filename = next_initrd+1;
759 mb_mod_info += 16;
760 } while (next_initrd);
761 stl_phys(mb_bootinfo + 20, mb_mod_count); /* mods_count */
762 stl_phys(mb_bootinfo + 24, mb_bootinfo + 0x100); /* mods_addr */
763 }
764
765 /* Make sure we're getting kernel + modules back after reset */
766 option_rom_setup_reset(mh_load_addr, mb_mod_end - mh_load_addr);
767
768 /* Commandline support */
769 stl_phys(mb_bootinfo + 16, mb_cmdline);
770 t = strlen(kernel_filename);
771 cpu_physical_memory_write(mb_cmdline, (uint8_t*)kernel_filename, t);
772 mb_cmdline += t;
773 stb_phys(mb_cmdline++, ' ');
774 t = strlen(kernel_cmdline) + 1;
775 cpu_physical_memory_write(mb_cmdline, (uint8_t*)kernel_cmdline, t);
776
777 /* the kernel is where we want it to be now */
778
779 #define MULTIBOOT_FLAGS_MEMORY (1 << 0)
780 #define MULTIBOOT_FLAGS_BOOT_DEVICE (1 << 1)
781 #define MULTIBOOT_FLAGS_CMDLINE (1 << 2)
782 #define MULTIBOOT_FLAGS_MODULES (1 << 3)
783 #define MULTIBOOT_FLAGS_MMAP (1 << 6)
784 stl_phys(mb_bootinfo, MULTIBOOT_FLAGS_MEMORY
785 | MULTIBOOT_FLAGS_BOOT_DEVICE
786 | MULTIBOOT_FLAGS_CMDLINE
787 | MULTIBOOT_FLAGS_MODULES
788 | MULTIBOOT_FLAGS_MMAP);
789 stl_phys(mb_bootinfo + 4, 640); /* mem_lower */
790 stl_phys(mb_bootinfo + 8, ram_size / 1024); /* mem_upper */
791 stl_phys(mb_bootinfo + 12, 0x8001ffff); /* XXX: use the -boot switch? */
792 stl_phys(mb_bootinfo + 48, mmap_addr); /* mmap_addr */
793
794 #ifdef DEBUG_MULTIBOOT
795 fprintf(stderr, "multiboot: mh_entry_addr = %#x\n", mh_entry_addr);
796 #endif
797
798 /* Pass variables to option rom */
799 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_entry_addr);
800 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, mb_bootinfo);
801 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, mmap_addr);
802
803 /* Make sure we're getting the config space back after reset */
804 option_rom_setup_reset(mb_bootinfo, 0x500);
805
806 option_rom[nb_option_roms] = "multiboot.bin";
807 nb_option_roms++;
808
809 return 1; /* yes, we are multiboot */
810 }
811
812 static void load_linux(void *fw_cfg,
813 target_phys_addr_t option_rom,
814 const char *kernel_filename,
815 const char *initrd_filename,
816 const char *kernel_cmdline,
817 target_phys_addr_t max_ram_size)
818 {
819 uint16_t protocol;
820 uint32_t gpr[8];
821 uint16_t seg[6];
822 uint16_t real_seg;
823 int setup_size, kernel_size, initrd_size = 0, cmdline_size;
824 uint32_t initrd_max;
825 uint8_t header[8192];
826 target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
827 FILE *f, *fi;
828 char *vmode;
829
830 /* Align to 16 bytes as a paranoia measure */
831 cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
832
833 /* load the kernel header */
834 f = fopen(kernel_filename, "rb");
835 if (!f || !(kernel_size = get_file_size(f)) ||
836 fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
837 MIN(ARRAY_SIZE(header), kernel_size)) {
838 fprintf(stderr, "qemu: could not load kernel '%s'\n",
839 kernel_filename);
840 exit(1);
841 }
842
843 /* kernel protocol version */
844 #if 0
845 fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
846 #endif
847 if (ldl_p(header+0x202) == 0x53726448)
848 protocol = lduw_p(header+0x206);
849 else {
850 /* This looks like a multiboot kernel. If it is, let's stop
851 treating it like a Linux kernel. */
852 if (load_multiboot(fw_cfg, f, kernel_filename,
853 initrd_filename, kernel_cmdline, header))
854 return;
855 protocol = 0;
856 }
857
858 if (protocol < 0x200 || !(header[0x211] & 0x01)) {
859 /* Low kernel */
860 real_addr = 0x90000;
861 cmdline_addr = 0x9a000 - cmdline_size;
862 prot_addr = 0x10000;
863 } else if (protocol < 0x202) {
864 /* High but ancient kernel */
865 real_addr = 0x90000;
866 cmdline_addr = 0x9a000 - cmdline_size;
867 prot_addr = 0x100000;
868 } else {
869 /* High and recent kernel */
870 real_addr = 0x10000;
871 cmdline_addr = 0x20000;
872 prot_addr = 0x100000;
873 }
874
875 #if 0
876 fprintf(stderr,
877 "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
878 "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
879 "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
880 real_addr,
881 cmdline_addr,
882 prot_addr);
883 #endif
884
885 /* highest address for loading the initrd */
886 if (protocol >= 0x203)
887 initrd_max = ldl_p(header+0x22c);
888 else
889 initrd_max = 0x37ffffff;
890
891 if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
892 initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
893
894 /* kernel command line */
895 pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
896
897 if (protocol >= 0x202) {
898 stl_p(header+0x228, cmdline_addr);
899 } else {
900 stw_p(header+0x20, 0xA33F);
901 stw_p(header+0x22, cmdline_addr-real_addr);
902 }
903
904 /* handle vga= parameter */
905 vmode = strstr(kernel_cmdline, "vga=");
906 if (vmode) {
907 unsigned int video_mode;
908 /* skip "vga=" */
909 vmode += 4;
910 if (!strncmp(vmode, "normal", 6)) {
911 video_mode = 0xffff;
912 } else if (!strncmp(vmode, "ext", 3)) {
913 video_mode = 0xfffe;
914 } else if (!strncmp(vmode, "ask", 3)) {
915 video_mode = 0xfffd;
916 } else {
917 video_mode = strtol(vmode, NULL, 0);
918 }
919 stw_p(header+0x1fa, video_mode);
920 }
921
922 /* loader type */
923 /* High nybble = B reserved for Qemu; low nybble is revision number.
924 If this code is substantially changed, you may want to consider
925 incrementing the revision. */
926 if (protocol >= 0x200)
927 header[0x210] = 0xB0;
928
929 /* heap */
930 if (protocol >= 0x201) {
931 header[0x211] |= 0x80; /* CAN_USE_HEAP */
932 stw_p(header+0x224, cmdline_addr-real_addr-0x200);
933 }
934
935 /* load initrd */
936 if (initrd_filename) {
937 if (protocol < 0x200) {
938 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
939 exit(1);
940 }
941
942 fi = fopen(initrd_filename, "rb");
943 if (!fi) {
944 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
945 initrd_filename);
946 exit(1);
947 }
948
949 initrd_size = get_file_size(fi);
950 initrd_addr = (initrd_max-initrd_size) & ~4095;
951
952 if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
953 fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
954 initrd_filename);
955 exit(1);
956 }
957 fclose(fi);
958
959 stl_p(header+0x218, initrd_addr);
960 stl_p(header+0x21c, initrd_size);
961 }
962
963 /* store the finalized header and load the rest of the kernel */
964 cpu_physical_memory_write(real_addr, header, ARRAY_SIZE(header));
965
966 setup_size = header[0x1f1];
967 if (setup_size == 0)
968 setup_size = 4;
969
970 setup_size = (setup_size+1)*512;
971 /* Size of protected-mode code */
972 kernel_size -= (setup_size > ARRAY_SIZE(header)) ? setup_size : ARRAY_SIZE(header);
973
974 /* In case we have read too much already, copy that over */
975 if (setup_size < ARRAY_SIZE(header)) {
976 cpu_physical_memory_write(prot_addr, header + setup_size, ARRAY_SIZE(header) - setup_size);
977 prot_addr += (ARRAY_SIZE(header) - setup_size);
978 setup_size = ARRAY_SIZE(header);
979 }
980
981 if (!fread_targphys_ok(real_addr + ARRAY_SIZE(header),
982 setup_size - ARRAY_SIZE(header), f) ||
983 !fread_targphys_ok(prot_addr, kernel_size, f)) {
984 fprintf(stderr, "qemu: read error on kernel '%s'\n",
985 kernel_filename);
986 exit(1);
987 }
988 fclose(f);
989
990 /* generate bootsector to set up the initial register state */
991 real_seg = real_addr >> 4;
992 seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
993 seg[1] = real_seg+0x20; /* CS */
994 memset(gpr, 0, sizeof gpr);
995 gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
996
997 option_rom_setup_reset(real_addr, setup_size);
998 option_rom_setup_reset(prot_addr, kernel_size);
999 option_rom_setup_reset(cmdline_addr, cmdline_size);
1000 if (initrd_filename)
1001 option_rom_setup_reset(initrd_addr, initrd_size);
1002
1003 generate_bootsect(option_rom, gpr, seg, 0);
1004 }
1005
1006 static const int ide_iobase[2] = { 0x1f0, 0x170 };
1007 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
1008 static const int ide_irq[2] = { 14, 15 };
1009
1010 #define NE2000_NB_MAX 6
1011
1012 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
1013 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
1014
1015 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1016 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
1017
1018 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
1019 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
1020
1021 #ifdef HAS_AUDIO
1022 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
1023 {
1024 struct soundhw *c;
1025
1026 for (c = soundhw; c->name; ++c) {
1027 if (c->enabled) {
1028 if (c->isa) {
1029 c->init.init_isa(pic);
1030 } else {
1031 if (pci_bus) {
1032 c->init.init_pci(pci_bus);
1033 }
1034 }
1035 }
1036 }
1037 }
1038 #endif
1039
1040 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
1041 {
1042 static int nb_ne2k = 0;
1043
1044 if (nb_ne2k == NE2000_NB_MAX)
1045 return;
1046 isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
1047 nb_ne2k++;
1048 }
1049
1050 static int load_option_rom(const char *oprom, target_phys_addr_t start,
1051 target_phys_addr_t end)
1052 {
1053 int size;
1054 char *filename;
1055
1056 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, oprom);
1057 if (filename) {
1058 size = get_image_size(filename);
1059 if (size > 0 && start + size > end) {
1060 fprintf(stderr, "Not enough space to load option rom '%s'\n",
1061 oprom);
1062 exit(1);
1063 }
1064 size = load_image_targphys(filename, start, end - start);
1065 qemu_free(filename);
1066 } else {
1067 size = -1;
1068 }
1069 if (size < 0) {
1070 fprintf(stderr, "Could not load option rom '%s'\n", oprom);
1071 exit(1);
1072 }
1073 /* Round up optiom rom size to the next 2k boundary */
1074 size = (size + 2047) & ~2047;
1075 option_rom_setup_reset(start, size);
1076 return size;
1077 }
1078
1079 int cpu_is_bsp(CPUState *env)
1080 {
1081 return env->cpuid_apic_id == 0;
1082 }
1083
1084 static CPUState *pc_new_cpu(const char *cpu_model)
1085 {
1086 CPUState *env;
1087
1088 env = cpu_init(cpu_model);
1089 if (!env) {
1090 fprintf(stderr, "Unable to find x86 CPU definition\n");
1091 exit(1);
1092 }
1093 if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
1094 env->cpuid_apic_id = env->cpu_index;
1095 /* APIC reset callback resets cpu */
1096 apic_init(env);
1097 } else {
1098 qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
1099 }
1100 return env;
1101 }
1102
1103 enum {
1104 COMPAT_DEFAULT = 0,
1105 COMPAT_0_10, /* compatible with qemu 0.10.x */
1106 };
1107
1108 /* PC hardware initialisation */
1109 static void pc_init1(ram_addr_t ram_size,
1110 const char *boot_device,
1111 const char *kernel_filename,
1112 const char *kernel_cmdline,
1113 const char *initrd_filename,
1114 const char *cpu_model,
1115 int pci_enabled,
1116 int compat_level)
1117 {
1118 char *filename;
1119 int ret, linux_boot, i;
1120 ram_addr_t ram_addr, bios_offset, option_rom_offset;
1121 ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
1122 int bios_size, isa_bios_size, oprom_area_size;
1123 PCIBus *pci_bus;
1124 PCIDevice *pci_dev;
1125 int piix3_devfn = -1;
1126 CPUState *env;
1127 qemu_irq *cpu_irq;
1128 qemu_irq *i8259;
1129 int index;
1130 BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
1131 BlockDriverState *fd[MAX_FD];
1132 int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
1133 void *fw_cfg;
1134 const char *virtio_blk_name, *virtio_console_name;
1135
1136 if (ram_size >= 0xe0000000 ) {
1137 above_4g_mem_size = ram_size - 0xe0000000;
1138 below_4g_mem_size = 0xe0000000;
1139 } else {
1140 below_4g_mem_size = ram_size;
1141 }
1142
1143 linux_boot = (kernel_filename != NULL);
1144
1145 /* init CPUs */
1146 if (cpu_model == NULL) {
1147 #ifdef TARGET_X86_64
1148 cpu_model = "qemu64";
1149 #else
1150 cpu_model = "qemu32";
1151 #endif
1152 }
1153
1154 for (i = 0; i < smp_cpus; i++) {
1155 env = pc_new_cpu(cpu_model);
1156 }
1157
1158 vmport_init();
1159
1160 /* allocate RAM */
1161 ram_addr = qemu_ram_alloc(0xa0000);
1162 cpu_register_physical_memory(0, 0xa0000, ram_addr);
1163
1164 /* Allocate, even though we won't register, so we don't break the
1165 * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
1166 * and some bios areas, which will be registered later
1167 */
1168 ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
1169 ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
1170 cpu_register_physical_memory(0x100000,
1171 below_4g_mem_size - 0x100000,
1172 ram_addr);
1173
1174 /* above 4giga memory allocation */
1175 if (above_4g_mem_size > 0) {
1176 #if TARGET_PHYS_ADDR_BITS == 32
1177 hw_error("To much RAM for 32-bit physical address");
1178 #else
1179 ram_addr = qemu_ram_alloc(above_4g_mem_size);
1180 cpu_register_physical_memory(0x100000000ULL,
1181 above_4g_mem_size,
1182 ram_addr);
1183 #endif
1184 }
1185
1186
1187 /* BIOS load */
1188 if (bios_name == NULL)
1189 bios_name = BIOS_FILENAME;
1190 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
1191 if (filename) {
1192 bios_size = get_image_size(filename);
1193 } else {
1194 bios_size = -1;
1195 }
1196 if (bios_size <= 0 ||
1197 (bios_size % 65536) != 0) {
1198 goto bios_error;
1199 }
1200 bios_offset = qemu_ram_alloc(bios_size);
1201 ret = load_image(filename, qemu_get_ram_ptr(bios_offset));
1202 if (ret != bios_size) {
1203 bios_error:
1204 fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
1205 exit(1);
1206 }
1207 if (filename) {
1208 qemu_free(filename);
1209 }
1210 /* map the last 128KB of the BIOS in ISA space */
1211 isa_bios_size = bios_size;
1212 if (isa_bios_size > (128 * 1024))
1213 isa_bios_size = 128 * 1024;
1214 cpu_register_physical_memory(0x100000 - isa_bios_size,
1215 isa_bios_size,
1216 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
1217
1218
1219
1220 option_rom_offset = qemu_ram_alloc(0x20000);
1221 oprom_area_size = 0;
1222 cpu_register_physical_memory(0xc0000, 0x20000, option_rom_offset);
1223
1224 if (using_vga) {
1225 const char *vgabios_filename;
1226 /* VGA BIOS load */
1227 if (cirrus_vga_enabled) {
1228 vgabios_filename = VGABIOS_CIRRUS_FILENAME;
1229 } else {
1230 vgabios_filename = VGABIOS_FILENAME;
1231 }
1232 oprom_area_size = load_option_rom(vgabios_filename, 0xc0000, 0xe0000);
1233 }
1234 /* Although video roms can grow larger than 0x8000, the area between
1235 * 0xc0000 - 0xc8000 is reserved for them. It means we won't be looking
1236 * for any other kind of option rom inside this area */
1237 if (oprom_area_size < 0x8000)
1238 oprom_area_size = 0x8000;
1239
1240 /* map all the bios at the top of memory */
1241 cpu_register_physical_memory((uint32_t)(-bios_size),
1242 bios_size, bios_offset | IO_MEM_ROM);
1243
1244 fw_cfg = bochs_bios_init();
1245
1246 if (linux_boot) {
1247 load_linux(fw_cfg, 0xc0000 + oprom_area_size,
1248 kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
1249 oprom_area_size += 2048;
1250 }
1251
1252 for (i = 0; i < nb_option_roms; i++) {
1253 oprom_area_size += load_option_rom(option_rom[i], 0xc0000 + oprom_area_size,
1254 0xe0000);
1255 }
1256
1257 for (i = 0; i < nb_nics; i++) {
1258 char nic_oprom[1024];
1259 const char *model = nd_table[i].model;
1260
1261 if (!nd_table[i].bootable)
1262 continue;
1263
1264 if (model == NULL)
1265 model = "ne2k_pci";
1266 snprintf(nic_oprom, sizeof(nic_oprom), "pxe-%s.bin", model);
1267
1268 oprom_area_size += load_option_rom(nic_oprom, 0xc0000 + oprom_area_size,
1269 0xe0000);
1270 }
1271
1272 cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
1273 i8259 = i8259_init(cpu_irq[0]);
1274 ferr_irq = i8259[13];
1275
1276 if (pci_enabled) {
1277 pci_bus = i440fx_init(&i440fx_state, i8259);
1278 piix3_devfn = piix3_init(pci_bus, -1);
1279 } else {
1280 pci_bus = NULL;
1281 }
1282
1283 /* init basic PC hardware */
1284 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
1285
1286 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
1287
1288 if (cirrus_vga_enabled) {
1289 if (pci_enabled) {
1290 pci_cirrus_vga_init(pci_bus);
1291 } else {
1292 isa_cirrus_vga_init();
1293 }
1294 } else if (vmsvga_enabled) {
1295 if (pci_enabled)
1296 pci_vmsvga_init(pci_bus);
1297 else
1298 fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1299 } else if (std_vga_enabled) {
1300 if (pci_enabled) {
1301 pci_vga_init(pci_bus, 0, 0);
1302 } else {
1303 isa_vga_init();
1304 }
1305 }
1306
1307 rtc_state = rtc_init(0x70, i8259[8], 2000);
1308
1309 qemu_register_boot_set(pc_boot_set, rtc_state);
1310
1311 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1312 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1313
1314 if (pci_enabled) {
1315 ioapic = ioapic_init();
1316 }
1317 pit = pit_init(0x40, i8259[0]);
1318 pcspk_init(pit);
1319 if (!no_hpet) {
1320 hpet_init(i8259);
1321 }
1322 if (pci_enabled) {
1323 pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
1324 }
1325
1326 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1327 if (serial_hds[i]) {
1328 serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
1329 serial_hds[i]);
1330 }
1331 }
1332
1333 for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1334 if (parallel_hds[i]) {
1335 parallel_init(parallel_io[i], i8259[parallel_irq[i]],
1336 parallel_hds[i]);
1337 }
1338 }
1339
1340 watchdog_pc_init(pci_bus);
1341
1342 for(i = 0; i < nb_nics; i++) {
1343 NICInfo *nd = &nd_table[i];
1344
1345 if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1346 pc_init_ne2k_isa(nd, i8259);
1347 else
1348 pci_nic_init(nd, "ne2k_pci", NULL);
1349 }
1350
1351 piix4_acpi_system_hot_add_init();
1352
1353 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1354 fprintf(stderr, "qemu: too many IDE bus\n");
1355 exit(1);
1356 }
1357
1358 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1359 index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1360 if (index != -1)
1361 hd[i] = drives_table[index].bdrv;
1362 else
1363 hd[i] = NULL;
1364 }
1365
1366 if (pci_enabled) {
1367 pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1368 } else {
1369 for(i = 0; i < MAX_IDE_BUS; i++) {
1370 isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1371 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1372 }
1373 }
1374
1375 i8042_init(i8259[1], i8259[12], 0x60);
1376 DMA_init(0);
1377 #ifdef HAS_AUDIO
1378 audio_init(pci_enabled ? pci_bus : NULL, i8259);
1379 #endif
1380
1381 for(i = 0; i < MAX_FD; i++) {
1382 index = drive_get_index(IF_FLOPPY, 0, i);
1383 if (index != -1)
1384 fd[i] = drives_table[index].bdrv;
1385 else
1386 fd[i] = NULL;
1387 }
1388 floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1389
1390 cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1391
1392 if (pci_enabled && usb_enabled) {
1393 usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1394 }
1395
1396 if (pci_enabled && acpi_enabled) {
1397 uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1398 i2c_bus *smbus;
1399
1400 /* TODO: Populate SPD eeprom data. */
1401 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1402 for (i = 0; i < 8; i++) {
1403 DeviceState *eeprom;
1404 eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
1405 qdev_prop_set_uint32(eeprom, "address", 0x50 + i);
1406 qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
1407 qdev_init(eeprom);
1408 }
1409 }
1410
1411 if (i440fx_state) {
1412 i440fx_init_memory_mappings(i440fx_state);
1413 }
1414
1415 if (pci_enabled) {
1416 int max_bus;
1417 int bus;
1418
1419 max_bus = drive_get_max_bus(IF_SCSI);
1420 for (bus = 0; bus <= max_bus; bus++) {
1421 pci_create_simple(pci_bus, -1, "lsi53c895a");
1422 }
1423 }
1424
1425 switch (compat_level) {
1426 case COMPAT_DEFAULT:
1427 default:
1428 virtio_blk_name = "virtio-blk-pci";
1429 virtio_console_name = "virtio-console-pci";
1430 break;
1431
1432 case COMPAT_0_10:
1433 virtio_blk_name = "virtio-blk-pci-0-10";
1434 virtio_console_name = "virtio-console-pci-0-10";
1435 break;
1436 }
1437
1438 /* Add virtio block devices */
1439 if (pci_enabled) {
1440 int index;
1441 int unit_id = 0;
1442
1443 while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1444 pci_dev = pci_create(virtio_blk_name,
1445 drives_table[index].devaddr);
1446 qdev_init(&pci_dev->qdev);
1447 unit_id++;
1448 }
1449 }
1450
1451 /* Add virtio balloon device */
1452 if (pci_enabled && virtio_balloon) {
1453 pci_dev = pci_create("virtio-balloon-pci", virtio_balloon_devaddr);
1454 qdev_init(&pci_dev->qdev);
1455 }
1456
1457 /* Add virtio console devices */
1458 if (pci_enabled) {
1459 for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1460 if (virtcon_hds[i]) {
1461 pci_create_simple(pci_bus, -1, virtio_console_name);
1462 }
1463 }
1464 }
1465 }
1466
1467 static void pc_init_pci(ram_addr_t ram_size,
1468 const char *boot_device,
1469 const char *kernel_filename,
1470 const char *kernel_cmdline,
1471 const char *initrd_filename,
1472 const char *cpu_model)
1473 {
1474 pc_init1(ram_size, boot_device,
1475 kernel_filename, kernel_cmdline,
1476 initrd_filename, cpu_model,
1477 1, COMPAT_DEFAULT);
1478 }
1479
1480 static void pc_init_isa(ram_addr_t ram_size,
1481 const char *boot_device,
1482 const char *kernel_filename,
1483 const char *kernel_cmdline,
1484 const char *initrd_filename,
1485 const char *cpu_model)
1486 {
1487 pc_init1(ram_size, boot_device,
1488 kernel_filename, kernel_cmdline,
1489 initrd_filename, cpu_model,
1490 0, COMPAT_DEFAULT);
1491 }
1492
1493 static void pc_init_pci_0_10(ram_addr_t ram_size,
1494 const char *boot_device,
1495 const char *kernel_filename,
1496 const char *kernel_cmdline,
1497 const char *initrd_filename,
1498 const char *cpu_model)
1499 {
1500 pc_init1(ram_size, boot_device,
1501 kernel_filename, kernel_cmdline,
1502 initrd_filename, cpu_model,
1503 1, COMPAT_0_10);
1504 }
1505
1506 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1507 BIOS will read it and start S3 resume at POST Entry */
1508 void cmos_set_s3_resume(void)
1509 {
1510 if (rtc_state)
1511 rtc_set_memory(rtc_state, 0xF, 0xFE);
1512 }
1513
1514 static QEMUMachine pc_machine = {
1515 .name = "pc-0.11",
1516 .alias = "pc",
1517 .desc = "Standard PC",
1518 .init = pc_init_pci,
1519 .max_cpus = 255,
1520 .is_default = 1,
1521 };
1522
1523 static QEMUMachine pc_machine_v0_10 = {
1524 .name = "pc-0.10",
1525 .desc = "Standard PC, qemu 0.10",
1526 .init = pc_init_pci,
1527 .max_cpus = 255,
1528 .compat_props = (CompatProperty[]) {
1529 {
1530 .driver = "virtio-blk-pci",
1531 .property = "class",
1532 .value = stringify(PCI_CLASS_STORAGE_OTHER),
1533 },{
1534 .driver = "virtio-console-pci",
1535 .property = "class",
1536 .value = stringify(PCI_CLASS_DISPLAY_OTHER),
1537 },{
1538 .driver = "virtio-net-pci",
1539 .property = "vectors",
1540 .value = stringify(0),
1541 },
1542 { /* end of list */ }
1543 },
1544 };
1545
1546 static QEMUMachine isapc_machine = {
1547 .name = "isapc",
1548 .desc = "ISA-only PC",
1549 .init = pc_init_isa,
1550 .max_cpus = 1,
1551 };
1552
1553 static QEMUMachine pc_0_10_machine = {
1554 .name = "pc-0-10",
1555 .desc = "Standard PC compatible with qemu 0.10.x",
1556 .init = pc_init_pci_0_10,
1557 .max_cpus = 255,
1558 };
1559
1560 static void pc_machine_init(void)
1561 {
1562 qemu_register_machine(&pc_machine);
1563 qemu_register_machine(&pc_machine_v0_10);
1564 qemu_register_machine(&isapc_machine);
1565
1566 /* For compatibility with 0.10.x */
1567 qemu_register_machine(&pc_0_10_machine);
1568 }
1569
1570 machine_init(pc_machine_init);
Anthony Liguori's QEMU queue