Update OpenBIOS images to r771
[qemu/aliguori-queue.git] / target-ppc / kvm.c
blobaa3d43247bb80ebef19e8e6e5f8bcf9e60f27662
1 /*
2 * PowerPC implementation of KVM hooks
4 * Copyright IBM Corp. 2007
6 * Authors:
7 * Jerone Young <jyoung5@us.ibm.com>
8 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
9 * Hollis Blanchard <hollisb@us.ibm.com>
11 * This work is licensed under the terms of the GNU GPL, version 2 or later.
12 * See the COPYING file in the top-level directory.
16 #include <sys/types.h>
17 #include <sys/ioctl.h>
18 #include <sys/mman.h>
20 #include <linux/kvm.h>
22 #include "qemu-common.h"
23 #include "qemu-timer.h"
24 #include "sysemu.h"
25 #include "kvm.h"
26 #include "kvm_ppc.h"
27 #include "cpu.h"
28 #include "device_tree.h"
30 //#define DEBUG_KVM
32 #ifdef DEBUG_KVM
33 #define dprintf(fmt, ...) \
34 do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0)
35 #else
36 #define dprintf(fmt, ...) \
37 do { } while (0)
38 #endif
40 /* XXX For some odd reason we sometimes hang inside KVM forever. I'd guess it's
41 * a race condition where we actually have a level triggered interrupt, but
42 * the infrastructure can't expose that yet, so the guest ACKs it, goes to
43 * sleep and never gets notified that there's still an interrupt pending.
45 * As a quick workaround, let's just wake up every 500 ms. That way we can
46 * assure that we're always reinjecting interrupts in time.
48 static QEMUTimer *idle_timer;
50 static void do_nothing(void *opaque)
52 qemu_mod_timer(idle_timer, qemu_get_clock(vm_clock) +
53 (get_ticks_per_sec() / 2));
56 int kvm_arch_init(KVMState *s, int smp_cpus)
58 return 0;
61 int kvm_arch_init_vcpu(CPUState *cenv)
63 int ret = 0;
64 struct kvm_sregs sregs;
66 sregs.pvr = cenv->spr[SPR_PVR];
67 ret = kvm_vcpu_ioctl(cenv, KVM_SET_SREGS, &sregs);
69 return ret;
72 void kvm_arch_reset_vcpu(CPUState *env)
76 int kvm_arch_put_registers(CPUState *env, int level)
78 struct kvm_regs regs;
79 int ret;
80 int i;
82 ret = kvm_vcpu_ioctl(env, KVM_GET_REGS, &regs);
83 if (ret < 0)
84 return ret;
86 regs.ctr = env->ctr;
87 regs.lr = env->lr;
88 regs.xer = env->xer;
89 regs.msr = env->msr;
90 regs.pc = env->nip;
92 regs.srr0 = env->spr[SPR_SRR0];
93 regs.srr1 = env->spr[SPR_SRR1];
95 regs.sprg0 = env->spr[SPR_SPRG0];
96 regs.sprg1 = env->spr[SPR_SPRG1];
97 regs.sprg2 = env->spr[SPR_SPRG2];
98 regs.sprg3 = env->spr[SPR_SPRG3];
99 regs.sprg4 = env->spr[SPR_SPRG4];
100 regs.sprg5 = env->spr[SPR_SPRG5];
101 regs.sprg6 = env->spr[SPR_SPRG6];
102 regs.sprg7 = env->spr[SPR_SPRG7];
104 for (i = 0;i < 32; i++)
105 regs.gpr[i] = env->gpr[i];
107 ret = kvm_vcpu_ioctl(env, KVM_SET_REGS, &regs);
108 if (ret < 0)
109 return ret;
111 return ret;
114 int kvm_arch_get_registers(CPUState *env)
116 struct kvm_regs regs;
117 struct kvm_sregs sregs;
118 uint32_t i, ret;
120 ret = kvm_vcpu_ioctl(env, KVM_GET_REGS, &regs);
121 if (ret < 0)
122 return ret;
124 ret = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
125 if (ret < 0)
126 return ret;
128 env->ctr = regs.ctr;
129 env->lr = regs.lr;
130 env->xer = regs.xer;
131 env->msr = regs.msr;
132 env->nip = regs.pc;
134 env->spr[SPR_SRR0] = regs.srr0;
135 env->spr[SPR_SRR1] = regs.srr1;
137 env->spr[SPR_SPRG0] = regs.sprg0;
138 env->spr[SPR_SPRG1] = regs.sprg1;
139 env->spr[SPR_SPRG2] = regs.sprg2;
140 env->spr[SPR_SPRG3] = regs.sprg3;
141 env->spr[SPR_SPRG4] = regs.sprg4;
142 env->spr[SPR_SPRG5] = regs.sprg5;
143 env->spr[SPR_SPRG6] = regs.sprg6;
144 env->spr[SPR_SPRG7] = regs.sprg7;
146 for (i = 0;i < 32; i++)
147 env->gpr[i] = regs.gpr[i];
149 #ifdef KVM_CAP_PPC_SEGSTATE
150 if (kvm_check_extension(env->kvm_state, KVM_CAP_PPC_SEGSTATE)) {
151 env->sdr1 = sregs.u.s.sdr1;
153 /* Sync SLB */
154 #ifdef TARGET_PPC64
155 for (i = 0; i < 64; i++) {
156 ppc_store_slb(env, sregs.u.s.ppc64.slb[i].slbe,
157 sregs.u.s.ppc64.slb[i].slbv);
159 #endif
161 /* Sync SRs */
162 for (i = 0; i < 16; i++) {
163 env->sr[i] = sregs.u.s.ppc32.sr[i];
166 /* Sync BATs */
167 for (i = 0; i < 8; i++) {
168 env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff;
169 env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32;
170 env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
171 env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
174 #endif
176 return 0;
179 #if defined(TARGET_PPCEMB)
180 #define PPC_INPUT_INT PPC40x_INPUT_INT
181 #elif defined(TARGET_PPC64)
182 #define PPC_INPUT_INT PPC970_INPUT_INT
183 #else
184 #define PPC_INPUT_INT PPC6xx_INPUT_INT
185 #endif
187 int kvm_arch_pre_run(CPUState *env, struct kvm_run *run)
189 int r;
190 unsigned irq;
192 if (!idle_timer) {
193 idle_timer = qemu_new_timer(vm_clock, do_nothing, NULL);
194 qemu_mod_timer(idle_timer, qemu_get_clock(vm_clock) +
195 (get_ticks_per_sec() / 2));
198 /* PowerPC Qemu tracks the various core input pins (interrupt, critical
199 * interrupt, reset, etc) in PPC-specific env->irq_input_state. */
200 if (run->ready_for_interrupt_injection &&
201 (env->interrupt_request & CPU_INTERRUPT_HARD) &&
202 (env->irq_input_state & (1<<PPC_INPUT_INT)))
204 /* For now KVM disregards the 'irq' argument. However, in the
205 * future KVM could cache it in-kernel to avoid a heavyweight exit
206 * when reading the UIC.
208 irq = -1U;
210 dprintf("injected interrupt %d\n", irq);
211 r = kvm_vcpu_ioctl(env, KVM_INTERRUPT, &irq);
212 if (r < 0)
213 printf("cpu %d fail inject %x\n", env->cpu_index, irq);
216 /* We don't know if there are more interrupts pending after this. However,
217 * the guest will return to userspace in the course of handling this one
218 * anyways, so we will get a chance to deliver the rest. */
219 return 0;
222 int kvm_arch_post_run(CPUState *env, struct kvm_run *run)
224 return 0;
227 static int kvmppc_handle_halt(CPUState *env)
229 if (!(env->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) {
230 env->halted = 1;
231 env->exception_index = EXCP_HLT;
234 return 1;
237 /* map dcr access to existing qemu dcr emulation */
238 static int kvmppc_handle_dcr_read(CPUState *env, uint32_t dcrn, uint32_t *data)
240 if (ppc_dcr_read(env->dcr_env, dcrn, data) < 0)
241 fprintf(stderr, "Read to unhandled DCR (0x%x)\n", dcrn);
243 return 1;
246 static int kvmppc_handle_dcr_write(CPUState *env, uint32_t dcrn, uint32_t data)
248 if (ppc_dcr_write(env->dcr_env, dcrn, data) < 0)
249 fprintf(stderr, "Write to unhandled DCR (0x%x)\n", dcrn);
251 return 1;
254 int kvm_arch_handle_exit(CPUState *env, struct kvm_run *run)
256 int ret = 0;
258 switch (run->exit_reason) {
259 case KVM_EXIT_DCR:
260 if (run->dcr.is_write) {
261 dprintf("handle dcr write\n");
262 ret = kvmppc_handle_dcr_write(env, run->dcr.dcrn, run->dcr.data);
263 } else {
264 dprintf("handle dcr read\n");
265 ret = kvmppc_handle_dcr_read(env, run->dcr.dcrn, &run->dcr.data);
267 break;
268 case KVM_EXIT_HLT:
269 dprintf("handle halt\n");
270 ret = kvmppc_handle_halt(env);
271 break;
274 return ret;
277 static int read_cpuinfo(const char *field, char *value, int len)
279 FILE *f;
280 int ret = -1;
281 int field_len = strlen(field);
282 char line[512];
284 f = fopen("/proc/cpuinfo", "r");
285 if (!f) {
286 return -1;
289 do {
290 if(!fgets(line, sizeof(line), f)) {
291 break;
293 if (!strncmp(line, field, field_len)) {
294 strncpy(value, line, len);
295 ret = 0;
296 break;
298 } while(*line);
300 fclose(f);
302 return ret;
305 uint32_t kvmppc_get_tbfreq(void)
307 char line[512];
308 char *ns;
309 uint32_t retval = get_ticks_per_sec();
311 if (read_cpuinfo("timebase", line, sizeof(line))) {
312 return retval;
315 if (!(ns = strchr(line, ':'))) {
316 return retval;
319 ns++;
321 retval = atoi(ns);
322 return retval;