hw/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9 */
  10 #include "hw.h"
  11 #include "mips.h"
  12 #include "mips_cpudevs.h"
  13 #include "pc.h"
  14 #include "isa.h"
  15 #include "net.h"
  16 #include "sysemu.h"
  17 #include "boards.h"
  18 #include "flash.h"
  19 #include "qemu-log.h"
  20 #include "mips-bios.h"
  21 #include "ide.h"
  22 #include "loader.h"
  23 #include "elf.h"
  24
  25 #define MAX_IDE_BUS 2
  26
  27 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  28 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  29 static const int ide_irq[2] = { 14, 15 };
  30
  31 static PITState *pit; /* PIT i8254 */
  32
  33 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */
  34
  35 static struct _loaderparams {
  36     int ram_size;
  37     const char *kernel_filename;
  38     const char *kernel_cmdline;
  39     const char *initrd_filename;
  40 } loaderparams;
  41
  42 static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
  43                               uint32_t val)
  44 {
  45     if ((addr & 0xffff) == 0 && val == 42)
  46         qemu_system_reset_request ();
  47     else if ((addr & 0xffff) == 4 && val == 42)
  48         qemu_system_shutdown_request ();
  49 }
  50
  51 static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
  52 {
  53     return 0;
  54 }
  55
  56 static CPUWriteMemoryFunc * const mips_qemu_write[] = {
  57     &mips_qemu_writel,
  58     &mips_qemu_writel,
  59     &mips_qemu_writel,
  60 };
  61
  62 static CPUReadMemoryFunc * const mips_qemu_read[] = {
  63     &mips_qemu_readl,
  64     &mips_qemu_readl,
  65     &mips_qemu_readl,
  66 };
  67
  68 static int mips_qemu_iomemtype = 0;
  69
  70 typedef struct ResetData {
  71     CPUState *env;
  72     uint64_t vector;
  73 } ResetData;
  74
  75 static int64_t load_kernel(void)
  76 {
  77     int64_t entry, kernel_high;
  78     long kernel_size, initrd_size, params_size;
  79     ram_addr_t initrd_offset;
  80     uint32_t *params_buf;
  81     int big_endian;
  82
  83 #ifdef TARGET_WORDS_BIGENDIAN
  84     big_endian = 1;
  85 #else
  86     big_endian = 0;
  87 #endif
  88     kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
  89                            NULL, (uint64_t *)&entry, NULL,
  90                            (uint64_t *)&kernel_high, big_endian,
  91                            ELF_MACHINE, 1);
  92     if (kernel_size >= 0) {
  93         if ((entry & ~0x7fffffffULL) == 0x80000000)
  94             entry = (int32_t)entry;
  95     } else {
  96         fprintf(stderr, "qemu: could not load kernel '%s'\n",
  97                 loaderparams.kernel_filename);
  98         exit(1);
  99     }
 100
 101     /* load initrd */
 102     initrd_size = 0;
 103     initrd_offset = 0;
 104     if (loaderparams.initrd_filename) {
 105         initrd_size = get_image_size (loaderparams.initrd_filename);
 106         if (initrd_size > 0) {
 107             initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
 108             if (initrd_offset + initrd_size > ram_size) {
 109                 fprintf(stderr,
 110                         "qemu: memory too small for initial ram disk '%s'\n",
 111                         loaderparams.initrd_filename);
 112                 exit(1);
 113             }
 114             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 115                                               initrd_offset,
 116                                               ram_size - initrd_offset);
 117         }
 118         if (initrd_size == (target_ulong) -1) {
 119             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 120                     loaderparams.initrd_filename);
 121             exit(1);
 122         }
 123     }
 124
 125     /* Store command line.  */
 126     params_size = 264;
 127     params_buf = qemu_malloc(params_size);
 128
 129     params_buf[0] = tswap32(ram_size);
 130     params_buf[1] = tswap32(0x12345678);
 131
 132     if (initrd_size > 0) {
 133         snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%li %s",
 134                  cpu_mips_phys_to_kseg0(NULL, initrd_offset),
 135                  initrd_size, loaderparams.kernel_cmdline);
 136     } else {
 137         snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline);
 138     }
 139
 140     rom_add_blob_fixed("params", params_buf, params_size,
 141                        (16 << 20) - 264);
 142
 143     return entry;
 144 }
 145
 146 static void main_cpu_reset(void *opaque)
 147 {
 148     ResetData *s = (ResetData *)opaque;
 149     CPUState *env = s->env;
 150
 151     cpu_reset(env);
 152     env->active_tc.PC = s->vector;
 153 }
 154
 155 static const int sector_len = 32 * 1024;
 156 static
 157 void mips_r4k_init (ram_addr_t ram_size,
 158                     const char *boot_device,
 159                     const char *kernel_filename, const char *kernel_cmdline,
 160                     const char *initrd_filename, const char *cpu_model)
 161 {
 162     char *filename;
 163     ram_addr_t ram_offset;
 164     ram_addr_t bios_offset;
 165     int bios_size;
 166     CPUState *env;
 167     ResetData *reset_info;
 168     RTCState *rtc_state;
 169     int i;
 170     qemu_irq *i8259;
 171     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 172     DriveInfo *dinfo;
 173     int be;
 174
 175     /* init CPUs */
 176     if (cpu_model == NULL) {
 177 #ifdef TARGET_MIPS64
 178         cpu_model = "R4000";
 179 #else
 180         cpu_model = "24Kf";
 181 #endif
 182     }
 183     env = cpu_init(cpu_model);
 184     if (!env) {
 185         fprintf(stderr, "Unable to find CPU definition\n");
 186         exit(1);
 187     }
 188     reset_info = qemu_mallocz(sizeof(ResetData));
 189     reset_info->env = env;
 190     reset_info->vector = env->active_tc.PC;
 191     qemu_register_reset(main_cpu_reset, reset_info);
 192
 193     /* allocate RAM */
 194     if (ram_size > (256 << 20)) {
 195         fprintf(stderr,
 196                 "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
 197                 ((unsigned int)ram_size / (1 << 20)));
 198         exit(1);
 199     }
 200     ram_offset = qemu_ram_alloc(ram_size);
 201
 202     cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
 203
 204     if (!mips_qemu_iomemtype) {
 205         mips_qemu_iomemtype = cpu_register_io_memory(mips_qemu_read,
 206                                                      mips_qemu_write, NULL);
 207     }
 208     cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);
 209
 210     /* Try to load a BIOS image. If this fails, we continue regardless,
 211        but initialize the hardware ourselves. When a kernel gets
 212        preloaded we also initialize the hardware, since the BIOS wasn't
 213        run. */
 214     if (bios_name == NULL)
 215         bios_name = BIOS_FILENAME;
 216     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 217     if (filename) {
 218         bios_size = get_image_size(filename);
 219     } else {
 220         bios_size = -1;
 221     }
 222 #ifdef TARGET_WORDS_BIGENDIAN
 223     be = 1;
 224 #else
 225     be = 0;
 226 #endif
 227     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 228         bios_offset = qemu_ram_alloc(BIOS_SIZE);
 229         cpu_register_physical_memory(0x1fc00000, BIOS_SIZE,
 230                                      bios_offset | IO_MEM_ROM);
 231
 232         load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
 233     } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
 234         uint32_t mips_rom = 0x00400000;
 235         bios_offset = qemu_ram_alloc(mips_rom);
 236         if (!pflash_cfi01_register(0x1fc00000, bios_offset,
 237                                    dinfo->bdrv, sector_len,
 238                                    mips_rom / sector_len,
 239                                    4, 0, 0, 0, 0, be)) {
 240             fprintf(stderr, "qemu: Error registering flash memory.\n");
 241         }
 242     }
 243     else {
 244         /* not fatal */
 245         fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
 246                 bios_name);
 247     }
 248     if (filename) {
 249         qemu_free(filename);
 250     }
 251
 252     if (kernel_filename) {
 253         loaderparams.ram_size = ram_size;
 254         loaderparams.kernel_filename = kernel_filename;
 255         loaderparams.kernel_cmdline = kernel_cmdline;
 256         loaderparams.initrd_filename = initrd_filename;
 257         reset_info->vector = load_kernel();
 258     }
 259
 260     /* Init CPU internal devices */
 261     cpu_mips_irq_init_cpu(env);
 262     cpu_mips_clock_init(env);
 263
 264     /* The PIC is attached to the MIPS CPU INT0 pin */
 265     i8259 = i8259_init(env->irq[2]);
 266     isa_bus_new(NULL);
 267     isa_bus_irqs(i8259);
 268
 269     rtc_state = rtc_init(2000);
 270
 271     /* Register 64 KB of ISA IO space at 0x14000000 */
 272 #ifdef TARGET_WORDS_BIGENDIAN
 273     isa_mmio_init(0x14000000, 0x00010000, 1);
 274 #else
 275     isa_mmio_init(0x14000000, 0x00010000, 0);
 276 #endif
 277     isa_mem_base = 0x10000000;
 278
 279     pit = pit_init(0x40, i8259[0]);
 280
 281     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 282         if (serial_hds[i]) {
 283             serial_isa_init(i, serial_hds[i]);
 284         }
 285     }
 286
 287     isa_vga_init();
 288
 289     if (nd_table[0].vlan)
 290         isa_ne2000_init(0x300, 9, &nd_table[0]);
 291
 292     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 293         fprintf(stderr, "qemu: too many IDE bus\n");
 294         exit(1);
 295     }
 296
 297     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 298         hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 299     }
 300
 301     for(i = 0; i < MAX_IDE_BUS; i++)
 302         isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 303                      hd[MAX_IDE_DEVS * i],
 304                      hd[MAX_IDE_DEVS * i + 1]);
 305
 306     isa_create_simple("i8042");
 307 }
 308
 309 static QEMUMachine mips_machine = {
 310     .name = "mips",
 311     .desc = "mips r4k platform",
 312     .init = mips_r4k_init,
 313 };
 314
 315 static void mips_machine_init(void)
 316 {
 317     qemu_register_machine(&mips_machine);
 318 }
 319
 320 machine_init(mips_machine_init);