hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "pc.h"
  26 #include "apic.h"
  27 #include "fdc.h"
  28 #include "pci.h"
  29 #include "vmware_vga.h"
  30 #include "monitor.h"
  31 #include "fw_cfg.h"
  32 #include "hpet_emul.h"
  33 #include "smbios.h"
  34 #include "loader.h"
  35 #include "elf.h"
  36 #include "multiboot.h"
  37 #include "mc146818rtc.h"
  38
  39 /* output Bochs bios info messages */
  40 //#define DEBUG_BIOS
  41
  42 /* debug PC/ISA interrupts */
  43 //#define DEBUG_IRQ
  44
  45 #ifdef DEBUG_IRQ
  46 #define DPRINTF(fmt, ...)                                       \
  47     do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
  48 #else
  49 #define DPRINTF(fmt, ...)
  50 #endif
  51
  52 #define BIOS_FILENAME "bios.bin"
  53
  54 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
  55
  56 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  57 #define ACPI_DATA_SIZE       0x10000
  58 #define BIOS_CFG_IOPORT 0x510
  59 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
  60 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
  61 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
  62 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
  63
  64 #define E820_NR_ENTRIES         16
  65
  66 struct e820_entry {
  67     uint64_t address;
  68     uint64_t length;
  69     uint32_t type;
  70 };
  71
  72 struct e820_table {
  73     uint32_t count;
  74     struct e820_entry entry[E820_NR_ENTRIES];
  75 };
  76
  77 static struct e820_table e820_table;
  78
  79 void isa_irq_handler(void *opaque, int n, int level)
  80 {
  81     IsaIrqState *isa = (IsaIrqState *)opaque;
  82
  83     DPRINTF("isa_irqs: %s irq %d\n", level? "raise" : "lower", n);
  84     if (n < 16) {
  85         qemu_set_irq(isa->i8259[n], level);
  86     }
  87     if (isa->ioapic)
  88         qemu_set_irq(isa->ioapic[n], level);
  89 };
  90
  91 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  92 {
  93 }
  94
  95 /* MSDOS compatibility mode FPU exception support */
  96 static qemu_irq ferr_irq;
  97
  98 void pc_register_ferr_irq(qemu_irq irq)
  99 {
 100     ferr_irq = irq;
 101 }
 102
 103 /* XXX: add IGNNE support */
 104 void cpu_set_ferr(CPUX86State *s)
 105 {
 106     qemu_irq_raise(ferr_irq);
 107 }
 108
 109 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
 110 {
 111     qemu_irq_lower(ferr_irq);
 112 }
 113
 114 /* TSC handling */
 115 uint64_t cpu_get_tsc(CPUX86State *env)
 116 {
 117     return cpu_get_ticks();
 118 }
 119
 120 /* SMM support */
 121
 122 static cpu_set_smm_t smm_set;
 123 static void *smm_arg;
 124
 125 void cpu_smm_register(cpu_set_smm_t callback, void *arg)
 126 {
 127     assert(smm_set == NULL);
 128     assert(smm_arg == NULL);
 129     smm_set = callback;
 130     smm_arg = arg;
 131 }
 132
 133 void cpu_smm_update(CPUState *env)
 134 {
 135     if (smm_set && smm_arg && env == first_cpu)
 136         smm_set(!!(env->hflags & HF_SMM_MASK), smm_arg);
 137 }
 138
 139
 140 /* IRQ handling */
 141 int cpu_get_pic_interrupt(CPUState *env)
 142 {
 143     int intno;
 144
 145     intno = apic_get_interrupt(env);
 146     if (intno >= 0) {
 147         /* set irq request if a PIC irq is still pending */
 148         /* XXX: improve that */
 149         pic_update_irq(isa_pic);
 150         return intno;
 151     }
 152     /* read the irq from the PIC */
 153     if (!apic_accept_pic_intr(env))
 154         return -1;
 155
 156     intno = pic_read_irq(isa_pic);
 157     return intno;
 158 }
 159
 160 static void pic_irq_request(void *opaque, int irq, int level)
 161 {
 162     CPUState *env = first_cpu;
 163
 164     DPRINTF("pic_irqs: %s irq %d\n", level? "raise" : "lower", irq);
 165     if (env->apic_state) {
 166         while (env) {
 167             if (apic_accept_pic_intr(env))
 168                 apic_deliver_pic_intr(env, level);
 169             env = env->next_cpu;
 170         }
 171     } else {
 172         if (level)
 173             cpu_interrupt(env, CPU_INTERRUPT_HARD);
 174         else
 175             cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 176     }
 177 }
 178
 179 /* PC cmos mappings */
 180
 181 #define REG_EQUIPMENT_BYTE          0x14
 182
 183 static int cmos_get_fd_drive_type(int fd0)
 184 {
 185     int val;
 186
 187     switch (fd0) {
 188     case 0:
 189         /* 1.44 Mb 3"5 drive */
 190         val = 4;
 191         break;
 192     case 1:
 193         /* 2.88 Mb 3"5 drive */
 194         val = 5;
 195         break;
 196     case 2:
 197         /* 1.2 Mb 5"5 drive */
 198         val = 2;
 199         break;
 200     default:
 201         val = 0;
 202         break;
 203     }
 204     return val;
 205 }
 206
 207 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd,
 208                          ISADevice *s)
 209 {
 210     int cylinders, heads, sectors;
 211     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 212     rtc_set_memory(s, type_ofs, 47);
 213     rtc_set_memory(s, info_ofs, cylinders);
 214     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 215     rtc_set_memory(s, info_ofs + 2, heads);
 216     rtc_set_memory(s, info_ofs + 3, 0xff);
 217     rtc_set_memory(s, info_ofs + 4, 0xff);
 218     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 219     rtc_set_memory(s, info_ofs + 6, cylinders);
 220     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 221     rtc_set_memory(s, info_ofs + 8, sectors);
 222 }
 223
 224 /* convert boot_device letter to something recognizable by the bios */
 225 static int boot_device2nibble(char boot_device)
 226 {
 227     switch(boot_device) {
 228     case 'a':
 229     case 'b':
 230         return 0x01; /* floppy boot */
 231     case 'c':
 232         return 0x02; /* hard drive boot */
 233     case 'd':
 234         return 0x03; /* CD-ROM boot */
 235     case 'n':
 236         return 0x04; /* Network boot */
 237     }
 238     return 0;
 239 }
 240
 241 static int set_boot_dev(ISADevice *s, const char *boot_device, int fd_bootchk)
 242 {
 243 #define PC_MAX_BOOT_DEVICES 3
 244     int nbds, bds[3] = { 0, };
 245     int i;
 246
 247     nbds = strlen(boot_device);
 248     if (nbds > PC_MAX_BOOT_DEVICES) {
 249         error_report("Too many boot devices for PC");
 250         return(1);
 251     }
 252     for (i = 0; i < nbds; i++) {
 253         bds[i] = boot_device2nibble(boot_device[i]);
 254         if (bds[i] == 0) {
 255             error_report("Invalid boot device for PC: '%c'",
 256                          boot_device[i]);
 257             return(1);
 258         }
 259     }
 260     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 261     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
 262     return(0);
 263 }
 264
 265 static int pc_boot_set(void *opaque, const char *boot_device)
 266 {
 267     return set_boot_dev(opaque, boot_device, 0);
 268 }
 269
 270 /* hd_table must contain 4 block drivers */
 271 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 272                   const char *boot_device, DriveInfo **hd_table,
 273                   FDCtrl *floppy_controller, ISADevice *s)
 274 {
 275     int val;
 276     int fd0, fd1, nb;
 277     int i;
 278
 279     /* various important CMOS locations needed by PC/Bochs bios */
 280
 281     /* memory size */
 282     val = 640; /* base memory in K */
 283     rtc_set_memory(s, 0x15, val);
 284     rtc_set_memory(s, 0x16, val >> 8);
 285
 286     val = (ram_size / 1024) - 1024;
 287     if (val > 65535)
 288         val = 65535;
 289     rtc_set_memory(s, 0x17, val);
 290     rtc_set_memory(s, 0x18, val >> 8);
 291     rtc_set_memory(s, 0x30, val);
 292     rtc_set_memory(s, 0x31, val >> 8);
 293
 294     if (above_4g_mem_size) {
 295         rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
 296         rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
 297         rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
 298     }
 299
 300     if (ram_size > (16 * 1024 * 1024))
 301         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 302     else
 303         val = 0;
 304     if (val > 65535)
 305         val = 65535;
 306     rtc_set_memory(s, 0x34, val);
 307     rtc_set_memory(s, 0x35, val >> 8);
 308
 309     /* set the number of CPU */
 310     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 311
 312     /* set boot devices, and disable floppy signature check if requested */
 313     if (set_boot_dev(s, boot_device, fd_bootchk)) {
 314         exit(1);
 315     }
 316
 317     /* floppy type */
 318
 319     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 320     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 321
 322     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 323     rtc_set_memory(s, 0x10, val);
 324
 325     val = 0;
 326     nb = 0;
 327     if (fd0 < 3)
 328         nb++;
 329     if (fd1 < 3)
 330         nb++;
 331     switch (nb) {
 332     case 0:
 333         break;
 334     case 1:
 335         val |= 0x01; /* 1 drive, ready for boot */
 336         break;
 337     case 2:
 338         val |= 0x41; /* 2 drives, ready for boot */
 339         break;
 340     }
 341     val |= 0x02; /* FPU is there */
 342     val |= 0x04; /* PS/2 mouse installed */
 343     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 344
 345     /* hard drives */
 346
 347     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 348     if (hd_table[0])
 349         cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv, s);
 350     if (hd_table[1])
 351         cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv, s);
 352
 353     val = 0;
 354     for (i = 0; i < 4; i++) {
 355         if (hd_table[i]) {
 356             int cylinders, heads, sectors, translation;
 357             /* NOTE: bdrv_get_geometry_hint() returns the physical
 358                 geometry.  It is always such that: 1 <= sects <= 63, 1
 359                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 360                 geometry can be different if a translation is done. */
 361             translation = bdrv_get_translation_hint(hd_table[i]->bdrv);
 362             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 363                 bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, &sectors);
 364                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 365                     /* No translation. */
 366                     translation = 0;
 367                 } else {
 368                     /* LBA translation. */
 369                     translation = 1;
 370                 }
 371             } else {
 372                 translation--;
 373             }
 374             val |= translation << (i * 2);
 375         }
 376     }
 377     rtc_set_memory(s, 0x39, val);
 378 }
 379
 380 static void handle_a20_line_change(void *opaque, int irq, int level)
 381 {
 382     CPUState *cpu = opaque;
 383
 384     /* XXX: send to all CPUs ? */
 385     cpu_x86_set_a20(cpu, level);
 386 }
 387
 388 /***********************************************************/
 389 /* Bochs BIOS debug ports */
 390
 391 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 392 {
 393     static const char shutdown_str[8] = "Shutdown";
 394     static int shutdown_index = 0;
 395
 396     switch(addr) {
 397         /* Bochs BIOS messages */
 398     case 0x400:
 399     case 0x401:
 400         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 401         exit(1);
 402     case 0x402:
 403     case 0x403:
 404 #ifdef DEBUG_BIOS
 405         fprintf(stderr, "%c", val);
 406 #endif
 407         break;
 408     case 0x8900:
 409         /* same as Bochs power off */
 410         if (val == shutdown_str[shutdown_index]) {
 411             shutdown_index++;
 412             if (shutdown_index == 8) {
 413                 shutdown_index = 0;
 414                 qemu_system_shutdown_request();
 415             }
 416         } else {
 417             shutdown_index = 0;
 418         }
 419         break;
 420
 421         /* LGPL'ed VGA BIOS messages */
 422     case 0x501:
 423     case 0x502:
 424         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 425         exit(1);
 426     case 0x500:
 427     case 0x503:
 428 #ifdef DEBUG_BIOS
 429         fprintf(stderr, "%c", val);
 430 #endif
 431         break;
 432     }
 433 }
 434
 435 int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
 436 {
 437     int index = e820_table.count;
 438     struct e820_entry *entry;
 439
 440     if (index >= E820_NR_ENTRIES)
 441         return -EBUSY;
 442     entry = &e820_table.entry[index];
 443
 444     entry->address = address;
 445     entry->length = length;
 446     entry->type = type;
 447
 448     e820_table.count++;
 449     return e820_table.count;
 450 }
 451
 452 static void *bochs_bios_init(void)
 453 {
 454     void *fw_cfg;
 455     uint8_t *smbios_table;
 456     size_t smbios_len;
 457     uint64_t *numa_fw_cfg;
 458     int i, j;
 459
 460     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 461     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 462     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 463     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 464     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 465
 466     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 467     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 468     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 469     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 470
 471     fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
 472
 473     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 474     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 475     fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
 476                      acpi_tables_len);
 477     fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
 478
 479     smbios_table = smbios_get_table(&smbios_len);
 480     if (smbios_table)
 481         fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
 482                          smbios_table, smbios_len);
 483     fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, (uint8_t *)&e820_table,
 484                      sizeof(struct e820_table));
 485
 486     /* allocate memory for the NUMA channel: one (64bit) word for the number
 487      * of nodes, one word for each VCPU->node and one word for each node to
 488      * hold the amount of memory.
 489      */
 490     numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
 491     numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
 492     for (i = 0; i < smp_cpus; i++) {
 493         for (j = 0; j < nb_numa_nodes; j++) {
 494             if (node_cpumask[j] & (1 << i)) {
 495                 numa_fw_cfg[i + 1] = cpu_to_le64(j);
 496                 break;
 497             }
 498         }
 499     }
 500     for (i = 0; i < nb_numa_nodes; i++) {
 501         numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
 502     }
 503     fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
 504                      (1 + smp_cpus + nb_numa_nodes) * 8);
 505
 506     return fw_cfg;
 507 }
 508
 509 static long get_file_size(FILE *f)
 510 {
 511     long where, size;
 512
 513     /* XXX: on Unix systems, using fstat() probably makes more sense */
 514
 515     where = ftell(f);
 516     fseek(f, 0, SEEK_END);
 517     size = ftell(f);
 518     fseek(f, where, SEEK_SET);
 519
 520     return size;
 521 }
 522
 523 static void load_linux(void *fw_cfg,
 524                        const char *kernel_filename,
 525                        const char *initrd_filename,
 526                        const char *kernel_cmdline,
 527                        target_phys_addr_t max_ram_size)
 528 {
 529     uint16_t protocol;
 530     int setup_size, kernel_size, initrd_size = 0, cmdline_size;
 531     uint32_t initrd_max;
 532     uint8_t header[8192], *setup, *kernel, *initrd_data;
 533     target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
 534     FILE *f;
 535     char *vmode;
 536
 537     /* Align to 16 bytes as a paranoia measure */
 538     cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
 539
 540     /* load the kernel header */
 541     f = fopen(kernel_filename, "rb");
 542     if (!f || !(kernel_size = get_file_size(f)) ||
 543         fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
 544         MIN(ARRAY_SIZE(header), kernel_size)) {
 545         fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
 546                 kernel_filename, strerror(errno));
 547         exit(1);
 548     }
 549
 550     /* kernel protocol version */
 551 #if 0
 552     fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
 553 #endif
 554     if (ldl_p(header+0x202) == 0x53726448)
 555         protocol = lduw_p(header+0x206);
 556     else {
 557         /* This looks like a multiboot kernel. If it is, let's stop
 558            treating it like a Linux kernel. */
 559         if (load_multiboot(fw_cfg, f, kernel_filename, initrd_filename,
 560                            kernel_cmdline, kernel_size, header))
 561             return;
 562         protocol = 0;
 563     }
 564
 565     if (protocol < 0x200 || !(header[0x211] & 0x01)) {
 566         /* Low kernel */
 567         real_addr    = 0x90000;
 568         cmdline_addr = 0x9a000 - cmdline_size;
 569         prot_addr    = 0x10000;
 570     } else if (protocol < 0x202) {
 571         /* High but ancient kernel */
 572         real_addr    = 0x90000;
 573         cmdline_addr = 0x9a000 - cmdline_size;
 574         prot_addr    = 0x100000;
 575     } else {
 576         /* High and recent kernel */
 577         real_addr    = 0x10000;
 578         cmdline_addr = 0x20000;
 579         prot_addr    = 0x100000;
 580     }
 581
 582 #if 0
 583     fprintf(stderr,
 584             "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
 585             "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
 586             "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
 587             real_addr,
 588             cmdline_addr,
 589             prot_addr);
 590 #endif
 591
 592     /* highest address for loading the initrd */
 593     if (protocol >= 0x203)
 594         initrd_max = ldl_p(header+0x22c);
 595     else
 596         initrd_max = 0x37ffffff;
 597
 598     if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
 599         initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
 600
 601     fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr);
 602     fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline)+1);
 603     fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA,
 604                      (uint8_t*)strdup(kernel_cmdline),
 605                      strlen(kernel_cmdline)+1);
 606
 607     if (protocol >= 0x202) {
 608         stl_p(header+0x228, cmdline_addr);
 609     } else {
 610         stw_p(header+0x20, 0xA33F);
 611         stw_p(header+0x22, cmdline_addr-real_addr);
 612     }
 613
 614     /* handle vga= parameter */
 615     vmode = strstr(kernel_cmdline, "vga=");
 616     if (vmode) {
 617         unsigned int video_mode;
 618         /* skip "vga=" */
 619         vmode += 4;
 620         if (!strncmp(vmode, "normal", 6)) {
 621             video_mode = 0xffff;
 622         } else if (!strncmp(vmode, "ext", 3)) {
 623             video_mode = 0xfffe;
 624         } else if (!strncmp(vmode, "ask", 3)) {
 625             video_mode = 0xfffd;
 626         } else {
 627             video_mode = strtol(vmode, NULL, 0);
 628         }
 629         stw_p(header+0x1fa, video_mode);
 630     }
 631
 632     /* loader type */
 633     /* High nybble = B reserved for Qemu; low nybble is revision number.
 634        If this code is substantially changed, you may want to consider
 635        incrementing the revision. */
 636     if (protocol >= 0x200)
 637         header[0x210] = 0xB0;
 638
 639     /* heap */
 640     if (protocol >= 0x201) {
 641         header[0x211] |= 0x80;  /* CAN_USE_HEAP */
 642         stw_p(header+0x224, cmdline_addr-real_addr-0x200);
 643     }
 644
 645     /* load initrd */
 646     if (initrd_filename) {
 647         if (protocol < 0x200) {
 648             fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
 649             exit(1);
 650         }
 651
 652         initrd_size = get_image_size(initrd_filename);
 653         if (initrd_size < 0) {
 654             fprintf(stderr, "qemu: error reading initrd %s\n",
 655                     initrd_filename);
 656             exit(1);
 657         }
 658
 659         initrd_addr = (initrd_max-initrd_size) & ~4095;
 660
 661         initrd_data = qemu_malloc(initrd_size);
 662         load_image(initrd_filename, initrd_data);
 663
 664         fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
 665         fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 666         fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size);
 667
 668         stl_p(header+0x218, initrd_addr);
 669         stl_p(header+0x21c, initrd_size);
 670     }
 671
 672     /* load kernel and setup */
 673     setup_size = header[0x1f1];
 674     if (setup_size == 0)
 675         setup_size = 4;
 676     setup_size = (setup_size+1)*512;
 677     kernel_size -= setup_size;
 678
 679     setup  = qemu_malloc(setup_size);
 680     kernel = qemu_malloc(kernel_size);
 681     fseek(f, 0, SEEK_SET);
 682     if (fread(setup, 1, setup_size, f) != setup_size) {
 683         fprintf(stderr, "fread() failed\n");
 684         exit(1);
 685     }
 686     if (fread(kernel, 1, kernel_size, f) != kernel_size) {
 687         fprintf(stderr, "fread() failed\n");
 688         exit(1);
 689     }
 690     fclose(f);
 691     memcpy(setup, header, MIN(sizeof(header), setup_size));
 692
 693     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr);
 694     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 695     fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size);
 696
 697     fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr);
 698     fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size);
 699     fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size);
 700
 701     option_rom[nb_option_roms] = "linuxboot.bin";
 702     nb_option_roms++;
 703 }
 704
 705 #define NE2000_NB_MAX 6
 706
 707 static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360,
 708                                               0x280, 0x380 };
 709 static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 710
 711 static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 712 static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 713
 714 #ifdef HAS_AUDIO
 715 void pc_audio_init (PCIBus *pci_bus, qemu_irq *pic)
 716 {
 717     struct soundhw *c;
 718
 719     for (c = soundhw; c->name; ++c) {
 720         if (c->enabled) {
 721             if (c->isa) {
 722                 c->init.init_isa(pic);
 723             } else {
 724                 if (pci_bus) {
 725                     c->init.init_pci(pci_bus);
 726                 }
 727             }
 728         }
 729     }
 730 }
 731 #endif
 732
 733 void pc_init_ne2k_isa(NICInfo *nd)
 734 {
 735     static int nb_ne2k = 0;
 736
 737     if (nb_ne2k == NE2000_NB_MAX)
 738         return;
 739     isa_ne2000_init(ne2000_io[nb_ne2k],
 740                     ne2000_irq[nb_ne2k], nd);
 741     nb_ne2k++;
 742 }
 743
 744 int cpu_is_bsp(CPUState *env)
 745 {
 746     /* We hard-wire the BSP to the first CPU. */
 747     return env->cpu_index == 0;
 748 }
 749
 750 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
 751    BIOS will read it and start S3 resume at POST Entry */
 752 void pc_cmos_set_s3_resume(void *opaque, int irq, int level)
 753 {
 754     ISADevice *s = opaque;
 755
 756     if (level) {
 757         rtc_set_memory(s, 0xF, 0xFE);
 758     }
 759 }
 760
 761 void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
 762 {
 763     CPUState *s = opaque;
 764
 765     if (level) {
 766         cpu_interrupt(s, CPU_INTERRUPT_SMI);
 767     }
 768 }
 769
 770 static CPUState *pc_new_cpu(const char *cpu_model)
 771 {
 772     CPUState *env;
 773
 774     env = cpu_init(cpu_model);
 775     if (!env) {
 776         fprintf(stderr, "Unable to find x86 CPU definition\n");
 777         exit(1);
 778     }
 779     if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
 780         env->cpuid_apic_id = env->cpu_index;
 781         /* APIC reset callback resets cpu */
 782         apic_init(env);
 783     } else {
 784         qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
 785     }
 786     return env;
 787 }
 788
 789 void pc_cpus_init(const char *cpu_model)
 790 {
 791     int i;
 792
 793     /* init CPUs */
 794     if (cpu_model == NULL) {
 795 #ifdef TARGET_X86_64
 796         cpu_model = "qemu64";
 797 #else
 798         cpu_model = "qemu32";
 799 #endif
 800     }
 801
 802     for(i = 0; i < smp_cpus; i++) {
 803         pc_new_cpu(cpu_model);
 804     }
 805 }
 806
 807 void pc_memory_init(ram_addr_t ram_size,
 808                     const char *kernel_filename,
 809                     const char *kernel_cmdline,
 810                     const char *initrd_filename,
 811                     ram_addr_t *below_4g_mem_size_p,
 812                     ram_addr_t *above_4g_mem_size_p)
 813 {
 814     char *filename;
 815     int ret, linux_boot, i;
 816     ram_addr_t ram_addr, bios_offset, option_rom_offset;
 817     ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
 818     int bios_size, isa_bios_size;
 819     void *fw_cfg;
 820
 821     if (ram_size >= 0xe0000000 ) {
 822         above_4g_mem_size = ram_size - 0xe0000000;
 823         below_4g_mem_size = 0xe0000000;
 824     } else {
 825         below_4g_mem_size = ram_size;
 826     }
 827     *above_4g_mem_size_p = above_4g_mem_size;
 828     *below_4g_mem_size_p = below_4g_mem_size;
 829
 830     linux_boot = (kernel_filename != NULL);
 831
 832     /* allocate RAM */
 833     ram_addr = qemu_ram_alloc(below_4g_mem_size);
 834     cpu_register_physical_memory(0, 0xa0000, ram_addr);
 835     cpu_register_physical_memory(0x100000,
 836                  below_4g_mem_size - 0x100000,
 837                  ram_addr + 0x100000);
 838
 839     /* above 4giga memory allocation */
 840     if (above_4g_mem_size > 0) {
 841 #if TARGET_PHYS_ADDR_BITS == 32
 842         hw_error("To much RAM for 32-bit physical address");
 843 #else
 844         ram_addr = qemu_ram_alloc(above_4g_mem_size);
 845         cpu_register_physical_memory(0x100000000ULL,
 846                                      above_4g_mem_size,
 847                                      ram_addr);
 848 #endif
 849     }
 850
 851
 852     /* BIOS load */
 853     if (bios_name == NULL)
 854         bios_name = BIOS_FILENAME;
 855     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 856     if (filename) {
 857         bios_size = get_image_size(filename);
 858     } else {
 859         bios_size = -1;
 860     }
 861     if (bios_size <= 0 ||
 862         (bios_size % 65536) != 0) {
 863         goto bios_error;
 864     }
 865     bios_offset = qemu_ram_alloc(bios_size);
 866     ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size));
 867     if (ret != 0) {
 868     bios_error:
 869         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
 870         exit(1);
 871     }
 872     if (filename) {
 873         qemu_free(filename);
 874     }
 875     /* map the last 128KB of the BIOS in ISA space */
 876     isa_bios_size = bios_size;
 877     if (isa_bios_size > (128 * 1024))
 878         isa_bios_size = 128 * 1024;
 879     cpu_register_physical_memory(0x100000 - isa_bios_size,
 880                                  isa_bios_size,
 881                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 882
 883     option_rom_offset = qemu_ram_alloc(PC_ROM_SIZE);
 884     cpu_register_physical_memory(PC_ROM_MIN_VGA, PC_ROM_SIZE, option_rom_offset);
 885
 886     /* map all the bios at the top of memory */
 887     cpu_register_physical_memory((uint32_t)(-bios_size),
 888                                  bios_size, bios_offset | IO_MEM_ROM);
 889
 890     fw_cfg = bochs_bios_init();
 891     rom_set_fw(fw_cfg);
 892
 893     if (linux_boot) {
 894         load_linux(fw_cfg, kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
 895     }
 896
 897     for (i = 0; i < nb_option_roms; i++) {
 898         rom_add_option(option_rom[i]);
 899     }
 900 }
 901
 902 qemu_irq *pc_allocate_cpu_irq(void)
 903 {
 904     return qemu_allocate_irqs(pic_irq_request, NULL, 1);
 905 }
 906
 907 void pc_vga_init(PCIBus *pci_bus)
 908 {
 909     if (cirrus_vga_enabled) {
 910         if (pci_bus) {
 911             pci_cirrus_vga_init(pci_bus);
 912         } else {
 913             isa_cirrus_vga_init();
 914         }
 915     } else if (vmsvga_enabled) {
 916         if (pci_bus)
 917             pci_vmsvga_init(pci_bus);
 918         else
 919             fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
 920     } else if (std_vga_enabled) {
 921         if (pci_bus) {
 922             pci_vga_init(pci_bus, 0, 0);
 923         } else {
 924             isa_vga_init();
 925         }
 926     }
 927 }
 928
 929 static void cpu_request_exit(void *opaque, int irq, int level)
 930 {
 931     CPUState *env = cpu_single_env;
 932
 933     if (env && level) {
 934         cpu_exit(env);
 935     }
 936 }
 937
 938 void pc_basic_device_init(qemu_irq *isa_irq,
 939                           FDCtrl **floppy_controller,
 940                           ISADevice **rtc_state)
 941 {
 942     int i;
 943     DriveInfo *fd[MAX_FD];
 944     PITState *pit;
 945     qemu_irq *a20_line;
 946     ISADevice *i8042;
 947     qemu_irq *cpu_exit_irq;
 948
 949     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 950
 951     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 952
 953     *rtc_state = rtc_init(2000);
 954
 955     qemu_register_boot_set(pc_boot_set, *rtc_state);
 956
 957     pit = pit_init(0x40, isa_reserve_irq(0));
 958     pcspk_init(pit);
 959     if (!no_hpet) {
 960         hpet_init(isa_irq);
 961     }
 962
 963     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 964         if (serial_hds[i]) {
 965             serial_isa_init(i, serial_hds[i]);
 966         }
 967     }
 968
 969     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
 970         if (parallel_hds[i]) {
 971             parallel_init(i, parallel_hds[i]);
 972         }
 973     }
 974
 975     a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 1);
 976     i8042 = isa_create_simple("i8042");
 977     i8042_setup_a20_line(i8042, a20_line);
 978     vmmouse_init(i8042);
 979
 980     cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
 981     DMA_init(0, cpu_exit_irq);
 982
 983     for(i = 0; i < MAX_FD; i++) {
 984         fd[i] = drive_get(IF_FLOPPY, 0, i);
 985     }
 986     *floppy_controller = fdctrl_init_isa(fd);
 987 }
 988
 989 void pc_pci_device_init(PCIBus *pci_bus)
 990 {
 991     int max_bus;
 992     int bus;
 993
 994     max_bus = drive_get_max_bus(IF_SCSI);
 995     for (bus = 0; bus <= max_bus; bus++) {
 996         pci_create_simple(pci_bus, -1, "lsi53c895a");
 997     }
 998 }