hw/dec_pci.c

   1 /*
   2  * QEMU DEC 21154 PCI bridge
   3  *
   4  * Copyright (c) 2006-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25
  26 #include "sysbus.h"
  27 #include "pci.h"
  28 #include "pci_host.h"
  29
  30 /* debug DEC */
  31 //#define DEBUG_DEC
  32
  33 #ifdef DEBUG_DEC
  34 #define DEC_DPRINTF(fmt, ...)                               \
  35     do { printf("DEC: " fmt , ## __VA_ARGS__); } while (0)
  36 #else
  37 #define DEC_DPRINTF(fmt, ...)
  38 #endif
  39
  40 typedef struct DECState {
  41     SysBusDevice busdev;
  42     PCIHostState host_state;
  43 } DECState;
  44
  45 static int pci_dec_21154_init_device(SysBusDevice *dev)
  46 {
  47     DECState *s;
  48     int pci_mem_config, pci_mem_data;
  49
  50     s = FROM_SYSBUS(DECState, dev);
  51
  52     pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
  53     pci_mem_data = pci_host_data_register_mmio(&s->host_state);
  54     sysbus_init_mmio(dev, 0x1000, pci_mem_config);
  55     sysbus_init_mmio(dev, 0x1000, pci_mem_data);
  56     return 0;
  57 }
  58
  59 static int dec_21154_pci_host_init(PCIDevice *d)
  60 {
  61     /* PCI2PCI bridge same values as PearPC - check this */
  62     pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_DEC);
  63     pci_config_set_device_id(d->config, PCI_DEVICE_ID_DEC_21154);
  64     d->config[0x08] = 0x02; // revision
  65     pci_config_set_class(d->config, PCI_CLASS_BRIDGE_PCI);
  66     d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_BRIDGE; // header_type
  67     return 0;
  68 }
  69
  70 static PCIDeviceInfo dec_21154_pci_host_info = {
  71     .qdev.name = "dec-21154",
  72     .qdev.size = sizeof(PCIDevice),
  73     .init      = dec_21154_pci_host_init,
  74     .header_type  = PCI_HEADER_TYPE_BRIDGE,
  75 };
  76
  77 static void dec_register_devices(void)
  78 {
  79     sysbus_register_dev("dec-21154", sizeof(DECState),
  80                         pci_dec_21154_init_device);
  81     pci_qdev_register(&dec_21154_pci_host_info);
  82 }
  83
  84 device_init(dec_register_devices)