CRIS: Segmented addressing only for kernel mode.
[qemu/aliguori-queue.git] / dyngen-exec.h
blob86e61c3df1c108139359a13b533daf449a9b0345
1 /*
2 * dyngen defines for micro operation code
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #if !defined(__DYNGEN_EXEC_H__)
20 #define __DYNGEN_EXEC_H__
22 /* prevent Solaris from trying to typedef FILE in gcc's
23 include/floatingpoint.h which will conflict with the
24 definition down below */
25 #ifdef __sun__
26 #define _FILEDEFED
27 #endif
29 /* NOTE: standard headers should be used with special care at this
30 point because host CPU registers are used as global variables. Some
31 host headers do not allow that. */
32 #include <stddef.h>
33 #include <stdint.h>
35 #ifdef __OpenBSD__
36 #include <sys/types.h>
37 #endif
39 /* XXX: This may be wrong for 64-bit ILP32 hosts. */
40 typedef void * host_reg_t;
42 #ifdef CONFIG_BSD
43 typedef struct __sFILE FILE;
44 #else
45 typedef struct FILE FILE;
46 #endif
47 extern int fprintf(FILE *, const char *, ...);
48 extern int fputs(const char *, FILE *);
49 extern int printf(const char *, ...);
51 #if defined(__i386__)
52 #define AREG0 "ebp"
53 #define AREG1 "ebx"
54 #define AREG2 "esi"
55 #elif defined(__x86_64__)
56 #define AREG0 "r14"
57 #define AREG1 "r15"
58 #define AREG2 "r12"
59 #elif defined(_ARCH_PPC)
60 #define AREG0 "r27"
61 #define AREG1 "r24"
62 #define AREG2 "r25"
63 #elif defined(__arm__)
64 #define AREG0 "r7"
65 #define AREG1 "r4"
66 #define AREG2 "r5"
67 #elif defined(__hppa__)
68 #define AREG0 "r17"
69 #define AREG1 "r14"
70 #define AREG2 "r15"
71 #elif defined(__mips__)
72 #define AREG0 "fp"
73 #define AREG1 "s0"
74 #define AREG2 "s1"
75 #elif defined(__sparc__)
76 #ifdef CONFIG_SOLARIS
77 #define AREG0 "g2"
78 #define AREG1 "g3"
79 #define AREG2 "g4"
80 #else
81 #ifdef __sparc_v9__
82 #define AREG0 "g5"
83 #define AREG1 "g6"
84 #define AREG2 "g7"
85 #else
86 #define AREG0 "g6"
87 #define AREG1 "g1"
88 #define AREG2 "g2"
89 #endif
90 #endif
91 #elif defined(__s390__)
92 #define AREG0 "r10"
93 #define AREG1 "r7"
94 #define AREG2 "r8"
95 #elif defined(__alpha__)
96 /* Note $15 is the frame pointer, so anything in op-i386.c that would
97 require a frame pointer, like alloca, would probably loose. */
98 #define AREG0 "$15"
99 #define AREG1 "$9"
100 #define AREG2 "$10"
101 #elif defined(__mc68000)
102 #define AREG0 "%a5"
103 #define AREG1 "%a4"
104 #define AREG2 "%d7"
105 #elif defined(__ia64__)
106 #define AREG0 "r7"
107 #define AREG1 "r4"
108 #define AREG2 "r5"
109 #else
110 #error unsupported CPU
111 #endif
113 #define xglue(x, y) x ## y
114 #define glue(x, y) xglue(x, y)
115 #define stringify(s) tostring(s)
116 #define tostring(s) #s
118 /* The return address may point to the start of the next instruction.
119 Subtracting one gets us the call instruction itself. */
120 #if defined(__s390__)
121 # define GETPC() ((void*)(((unsigned long)__builtin_return_address(0) & 0x7fffffffUL) - 1))
122 #elif defined(__arm__)
123 /* Thumb return addresses have the low bit set, so we need to subtract two.
124 This is still safe in ARM mode because instructions are 4 bytes. */
125 # define GETPC() ((void *)((unsigned long)__builtin_return_address(0) - 2))
126 #else
127 # define GETPC() ((void *)((unsigned long)__builtin_return_address(0) - 1))
128 #endif
130 #endif /* !defined(__DYNGEN_EXEC_H__) */