4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
26 #include <sys/syscall.h>
29 #include "qemu-common.h"
30 #include "cache-utils.h"
37 #define DEBUG_LOGFILE "/tmp/qemu.log"
42 #if defined(CONFIG_USE_GUEST_BASE)
43 unsigned long mmap_min_addr
;
44 unsigned long guest_base
;
48 static const char *interp_prefix
= CONFIG_QEMU_PREFIX
;
49 const char *qemu_uname_release
= CONFIG_UNAME_RELEASE
;
51 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
52 we allocate a bigger stack. Need a better solution, for example
53 by remapping the process stack directly at the right place */
54 unsigned long x86_stack_size
= 512 * 1024;
56 void gemu_log(const char *fmt
, ...)
61 vfprintf(stderr
, fmt
, ap
);
65 #if defined(TARGET_I386)
66 int cpu_get_pic_interrupt(CPUState
*env
)
72 /* timers for rdtsc */
76 static uint64_t emu_time
;
78 int64_t cpu_get_real_ticks(void)
85 #if defined(CONFIG_USE_NPTL)
86 /***********************************************************/
87 /* Helper routines for implementing atomic operations. */
89 /* To implement exclusive operations we force all cpus to syncronise.
90 We don't require a full sync, only that no cpus are executing guest code.
91 The alternative is to map target atomic ops onto host equivalents,
92 which requires quite a lot of per host/target work. */
93 static pthread_mutex_t cpu_list_mutex
= PTHREAD_MUTEX_INITIALIZER
;
94 static pthread_mutex_t exclusive_lock
= PTHREAD_MUTEX_INITIALIZER
;
95 static pthread_cond_t exclusive_cond
= PTHREAD_COND_INITIALIZER
;
96 static pthread_cond_t exclusive_resume
= PTHREAD_COND_INITIALIZER
;
97 static int pending_cpus
;
99 /* Make sure everything is in a consistent state for calling fork(). */
100 void fork_start(void)
103 pthread_mutex_lock(&tb_lock
);
104 pthread_mutex_lock(&exclusive_lock
);
107 void fork_end(int child
)
110 /* Child processes created by fork() only have a single thread.
111 Discard information about the parent threads. */
112 first_cpu
= thread_env
;
113 thread_env
->next_cpu
= NULL
;
115 pthread_mutex_init(&exclusive_lock
, NULL
);
116 pthread_mutex_init(&cpu_list_mutex
, NULL
);
117 pthread_cond_init(&exclusive_cond
, NULL
);
118 pthread_cond_init(&exclusive_resume
, NULL
);
119 pthread_mutex_init(&tb_lock
, NULL
);
120 gdbserver_fork(thread_env
);
122 pthread_mutex_unlock(&exclusive_lock
);
123 pthread_mutex_unlock(&tb_lock
);
125 mmap_fork_end(child
);
128 /* Wait for pending exclusive operations to complete. The exclusive lock
130 static inline void exclusive_idle(void)
132 while (pending_cpus
) {
133 pthread_cond_wait(&exclusive_resume
, &exclusive_lock
);
137 /* Start an exclusive operation.
138 Must only be called from outside cpu_arm_exec. */
139 static inline void start_exclusive(void)
142 pthread_mutex_lock(&exclusive_lock
);
146 /* Make all other cpus stop executing. */
147 for (other
= first_cpu
; other
; other
= other
->next_cpu
) {
148 if (other
->running
) {
153 if (pending_cpus
> 1) {
154 pthread_cond_wait(&exclusive_cond
, &exclusive_lock
);
158 /* Finish an exclusive operation. */
159 static inline void end_exclusive(void)
162 pthread_cond_broadcast(&exclusive_resume
);
163 pthread_mutex_unlock(&exclusive_lock
);
166 /* Wait for exclusive ops to finish, and begin cpu execution. */
167 static inline void cpu_exec_start(CPUState
*env
)
169 pthread_mutex_lock(&exclusive_lock
);
172 pthread_mutex_unlock(&exclusive_lock
);
175 /* Mark cpu as not executing, and release pending exclusive ops. */
176 static inline void cpu_exec_end(CPUState
*env
)
178 pthread_mutex_lock(&exclusive_lock
);
180 if (pending_cpus
> 1) {
182 if (pending_cpus
== 1) {
183 pthread_cond_signal(&exclusive_cond
);
187 pthread_mutex_unlock(&exclusive_lock
);
190 void cpu_list_lock(void)
192 pthread_mutex_lock(&cpu_list_mutex
);
195 void cpu_list_unlock(void)
197 pthread_mutex_unlock(&cpu_list_mutex
);
199 #else /* if !CONFIG_USE_NPTL */
200 /* These are no-ops because we are not threadsafe. */
201 static inline void cpu_exec_start(CPUState
*env
)
205 static inline void cpu_exec_end(CPUState
*env
)
209 static inline void start_exclusive(void)
213 static inline void end_exclusive(void)
217 void fork_start(void)
221 void fork_end(int child
)
224 gdbserver_fork(thread_env
);
228 void cpu_list_lock(void)
232 void cpu_list_unlock(void)
239 /***********************************************************/
240 /* CPUX86 core interface */
242 void cpu_smm_update(CPUState
*env
)
246 uint64_t cpu_get_tsc(CPUX86State
*env
)
248 return cpu_get_real_ticks();
251 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
256 e1
= (addr
<< 16) | (limit
& 0xffff);
257 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
264 static uint64_t *idt_table
;
266 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
267 uint64_t addr
, unsigned int sel
)
270 e1
= (addr
& 0xffff) | (sel
<< 16);
271 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
275 p
[2] = tswap32(addr
>> 32);
278 /* only dpl matters as we do only user space emulation */
279 static void set_idt(int n
, unsigned int dpl
)
281 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
284 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
285 uint32_t addr
, unsigned int sel
)
288 e1
= (addr
& 0xffff) | (sel
<< 16);
289 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
295 /* only dpl matters as we do only user space emulation */
296 static void set_idt(int n
, unsigned int dpl
)
298 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
302 void cpu_loop(CPUX86State
*env
)
306 target_siginfo_t info
;
309 trapnr
= cpu_x86_exec(env
);
312 /* linux syscall from int $0x80 */
313 env
->regs
[R_EAX
] = do_syscall(env
,
324 /* linux syscall from syscall intruction */
325 env
->regs
[R_EAX
] = do_syscall(env
,
333 env
->eip
= env
->exception_next_eip
;
338 info
.si_signo
= SIGBUS
;
340 info
.si_code
= TARGET_SI_KERNEL
;
341 info
._sifields
._sigfault
._addr
= 0;
342 queue_signal(env
, info
.si_signo
, &info
);
345 /* XXX: potential problem if ABI32 */
346 #ifndef TARGET_X86_64
347 if (env
->eflags
& VM_MASK
) {
348 handle_vm86_fault(env
);
352 info
.si_signo
= SIGSEGV
;
354 info
.si_code
= TARGET_SI_KERNEL
;
355 info
._sifields
._sigfault
._addr
= 0;
356 queue_signal(env
, info
.si_signo
, &info
);
360 info
.si_signo
= SIGSEGV
;
362 if (!(env
->error_code
& 1))
363 info
.si_code
= TARGET_SEGV_MAPERR
;
365 info
.si_code
= TARGET_SEGV_ACCERR
;
366 info
._sifields
._sigfault
._addr
= env
->cr
[2];
367 queue_signal(env
, info
.si_signo
, &info
);
370 #ifndef TARGET_X86_64
371 if (env
->eflags
& VM_MASK
) {
372 handle_vm86_trap(env
, trapnr
);
376 /* division by zero */
377 info
.si_signo
= SIGFPE
;
379 info
.si_code
= TARGET_FPE_INTDIV
;
380 info
._sifields
._sigfault
._addr
= env
->eip
;
381 queue_signal(env
, info
.si_signo
, &info
);
386 #ifndef TARGET_X86_64
387 if (env
->eflags
& VM_MASK
) {
388 handle_vm86_trap(env
, trapnr
);
392 info
.si_signo
= SIGTRAP
;
394 if (trapnr
== EXCP01_DB
) {
395 info
.si_code
= TARGET_TRAP_BRKPT
;
396 info
._sifields
._sigfault
._addr
= env
->eip
;
398 info
.si_code
= TARGET_SI_KERNEL
;
399 info
._sifields
._sigfault
._addr
= 0;
401 queue_signal(env
, info
.si_signo
, &info
);
406 #ifndef TARGET_X86_64
407 if (env
->eflags
& VM_MASK
) {
408 handle_vm86_trap(env
, trapnr
);
412 info
.si_signo
= SIGSEGV
;
414 info
.si_code
= TARGET_SI_KERNEL
;
415 info
._sifields
._sigfault
._addr
= 0;
416 queue_signal(env
, info
.si_signo
, &info
);
420 info
.si_signo
= SIGILL
;
422 info
.si_code
= TARGET_ILL_ILLOPN
;
423 info
._sifields
._sigfault
._addr
= env
->eip
;
424 queue_signal(env
, info
.si_signo
, &info
);
427 /* just indicate that signals should be handled asap */
433 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
438 info
.si_code
= TARGET_TRAP_BRKPT
;
439 queue_signal(env
, info
.si_signo
, &info
);
444 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
445 fprintf(stderr
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
449 process_pending_signals(env
);
456 static void arm_cache_flush(abi_ulong start
, abi_ulong last
)
458 abi_ulong addr
, last1
;
464 last1
= ((addr
+ TARGET_PAGE_SIZE
) & TARGET_PAGE_MASK
) - 1;
467 tb_invalidate_page_range(addr
, last1
+ 1);
474 /* Handle a jump to the kernel code page. */
476 do_kernel_trap(CPUARMState
*env
)
482 switch (env
->regs
[15]) {
483 case 0xffff0fa0: /* __kernel_memory_barrier */
484 /* ??? No-op. Will need to do better for SMP. */
486 case 0xffff0fc0: /* __kernel_cmpxchg */
487 /* XXX: This only works between threads, not between processes.
488 It's probably possible to implement this with native host
489 operations. However things like ldrex/strex are much harder so
490 there's not much point trying. */
492 cpsr
= cpsr_read(env
);
494 /* FIXME: This should SEGV if the access fails. */
495 if (get_user_u32(val
, addr
))
497 if (val
== env
->regs
[0]) {
499 /* FIXME: Check for segfaults. */
500 put_user_u32(val
, addr
);
507 cpsr_write(env
, cpsr
, CPSR_C
);
510 case 0xffff0fe0: /* __kernel_get_tls */
511 env
->regs
[0] = env
->cp15
.c13_tls2
;
516 /* Jump back to the caller. */
517 addr
= env
->regs
[14];
522 env
->regs
[15] = addr
;
527 static int do_strex(CPUARMState
*env
)
535 addr
= env
->exclusive_addr
;
536 if (addr
!= env
->exclusive_test
) {
539 size
= env
->exclusive_info
& 0xf;
542 segv
= get_user_u8(val
, addr
);
545 segv
= get_user_u16(val
, addr
);
549 segv
= get_user_u32(val
, addr
);
553 env
->cp15
.c6_data
= addr
;
556 if (val
!= env
->exclusive_val
) {
560 segv
= get_user_u32(val
, addr
+ 4);
562 env
->cp15
.c6_data
= addr
+ 4;
565 if (val
!= env
->exclusive_high
) {
569 val
= env
->regs
[(env
->exclusive_info
>> 8) & 0xf];
572 segv
= put_user_u8(val
, addr
);
575 segv
= put_user_u16(val
, addr
);
579 segv
= put_user_u32(val
, addr
);
583 env
->cp15
.c6_data
= addr
;
587 val
= env
->regs
[(env
->exclusive_info
>> 12) & 0xf];
588 segv
= put_user_u32(val
, addr
);
590 env
->cp15
.c6_data
= addr
+ 4;
596 env
->regs
[(env
->exclusive_info
>> 4) & 0xf] = rc
;
602 void cpu_loop(CPUARMState
*env
)
605 unsigned int n
, insn
;
606 target_siginfo_t info
;
611 trapnr
= cpu_arm_exec(env
);
616 TaskState
*ts
= env
->opaque
;
620 /* we handle the FPU emulation here, as Linux */
621 /* we get the opcode */
622 /* FIXME - what to do if get_user() fails? */
623 get_user_u32(opcode
, env
->regs
[15]);
625 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
626 if (rc
== 0) { /* illegal instruction */
627 info
.si_signo
= SIGILL
;
629 info
.si_code
= TARGET_ILL_ILLOPN
;
630 info
._sifields
._sigfault
._addr
= env
->regs
[15];
631 queue_signal(env
, info
.si_signo
, &info
);
632 } else if (rc
< 0) { /* FP exception */
635 /* translate softfloat flags to FPSR flags */
636 if (-rc
& float_flag_invalid
)
638 if (-rc
& float_flag_divbyzero
)
640 if (-rc
& float_flag_overflow
)
642 if (-rc
& float_flag_underflow
)
644 if (-rc
& float_flag_inexact
)
647 FPSR fpsr
= ts
->fpa
.fpsr
;
648 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
650 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
651 info
.si_signo
= SIGFPE
;
654 /* ordered by priority, least first */
655 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
656 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
657 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
658 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
659 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
661 info
._sifields
._sigfault
._addr
= env
->regs
[15];
662 queue_signal(env
, info
.si_signo
, &info
);
667 /* accumulate unenabled exceptions */
668 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
670 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
672 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
674 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
676 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
679 } else { /* everything OK */
690 if (trapnr
== EXCP_BKPT
) {
692 /* FIXME - what to do if get_user() fails? */
693 get_user_u16(insn
, env
->regs
[15]);
697 /* FIXME - what to do if get_user() fails? */
698 get_user_u32(insn
, env
->regs
[15]);
699 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
704 /* FIXME - what to do if get_user() fails? */
705 get_user_u16(insn
, env
->regs
[15] - 2);
708 /* FIXME - what to do if get_user() fails? */
709 get_user_u32(insn
, env
->regs
[15] - 4);
714 if (n
== ARM_NR_cacheflush
) {
715 arm_cache_flush(env
->regs
[0], env
->regs
[1]);
716 } else if (n
== ARM_NR_semihosting
717 || n
== ARM_NR_thumb_semihosting
) {
718 env
->regs
[0] = do_arm_semihosting (env
);
719 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
720 || (env
->thumb
&& n
== ARM_THUMB_SYSCALL
)) {
722 if (env
->thumb
|| n
== 0) {
725 n
-= ARM_SYSCALL_BASE
;
728 if ( n
> ARM_NR_BASE
) {
730 case ARM_NR_cacheflush
:
731 arm_cache_flush(env
->regs
[0], env
->regs
[1]);
734 cpu_set_tls(env
, env
->regs
[0]);
738 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
740 env
->regs
[0] = -TARGET_ENOSYS
;
744 env
->regs
[0] = do_syscall(env
,
759 /* just indicate that signals should be handled asap */
761 case EXCP_PREFETCH_ABORT
:
762 addr
= env
->cp15
.c6_insn
;
764 case EXCP_DATA_ABORT
:
765 addr
= env
->cp15
.c6_data
;
769 info
.si_signo
= SIGSEGV
;
771 /* XXX: check env->error_code */
772 info
.si_code
= TARGET_SEGV_MAPERR
;
773 info
._sifields
._sigfault
._addr
= addr
;
774 queue_signal(env
, info
.si_signo
, &info
);
781 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
786 info
.si_code
= TARGET_TRAP_BRKPT
;
787 queue_signal(env
, info
.si_signo
, &info
);
791 case EXCP_KERNEL_TRAP
:
792 if (do_kernel_trap(env
))
797 addr
= env
->cp15
.c6_data
;
803 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
805 cpu_dump_state(env
, stderr
, fprintf
, 0);
808 process_pending_signals(env
);
815 #define SPARC64_STACK_BIAS 2047
819 /* WARNING: dealing with register windows _is_ complicated. More info
820 can be found at http://www.sics.se/~psm/sparcstack.html */
821 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
823 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
824 /* wrap handling : if cwp is on the last window, then we use the
825 registers 'after' the end */
826 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
827 index
+= 16 * env
->nwindows
;
831 /* save the register window 'cwp1' */
832 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
837 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
838 #ifdef TARGET_SPARC64
840 sp_ptr
+= SPARC64_STACK_BIAS
;
842 #if defined(DEBUG_WIN)
843 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" save_cwp=%d\n",
846 for(i
= 0; i
< 16; i
++) {
847 /* FIXME - what to do if put_user() fails? */
848 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
849 sp_ptr
+= sizeof(abi_ulong
);
853 static void save_window(CPUSPARCState
*env
)
855 #ifndef TARGET_SPARC64
856 unsigned int new_wim
;
857 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
858 ((1LL << env
->nwindows
) - 1);
859 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
862 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
868 static void restore_window(CPUSPARCState
*env
)
870 #ifndef TARGET_SPARC64
871 unsigned int new_wim
;
873 unsigned int i
, cwp1
;
876 #ifndef TARGET_SPARC64
877 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
878 ((1LL << env
->nwindows
) - 1);
881 /* restore the invalid window */
882 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
883 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
884 #ifdef TARGET_SPARC64
886 sp_ptr
+= SPARC64_STACK_BIAS
;
888 #if defined(DEBUG_WIN)
889 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" load_cwp=%d\n",
892 for(i
= 0; i
< 16; i
++) {
893 /* FIXME - what to do if get_user() fails? */
894 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
895 sp_ptr
+= sizeof(abi_ulong
);
897 #ifdef TARGET_SPARC64
899 if (env
->cleanwin
< env
->nwindows
- 1)
907 static void flush_windows(CPUSPARCState
*env
)
913 /* if restore would invoke restore_window(), then we can stop */
914 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
915 #ifndef TARGET_SPARC64
916 if (env
->wim
& (1 << cwp1
))
919 if (env
->canrestore
== 0)
924 save_window_offset(env
, cwp1
);
927 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
928 #ifndef TARGET_SPARC64
929 /* set wim so that restore will reload the registers */
930 env
->wim
= 1 << cwp1
;
932 #if defined(DEBUG_WIN)
933 printf("flush_windows: nb=%d\n", offset
- 1);
937 void cpu_loop (CPUSPARCState
*env
)
940 target_siginfo_t info
;
943 trapnr
= cpu_sparc_exec (env
);
946 #ifndef TARGET_SPARC64
953 ret
= do_syscall (env
, env
->gregs
[1],
954 env
->regwptr
[0], env
->regwptr
[1],
955 env
->regwptr
[2], env
->regwptr
[3],
956 env
->regwptr
[4], env
->regwptr
[5]);
957 if ((unsigned int)ret
>= (unsigned int)(-515)) {
958 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
959 env
->xcc
|= PSR_CARRY
;
961 env
->psr
|= PSR_CARRY
;
965 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
966 env
->xcc
&= ~PSR_CARRY
;
968 env
->psr
&= ~PSR_CARRY
;
971 env
->regwptr
[0] = ret
;
972 /* next instruction */
974 env
->npc
= env
->npc
+ 4;
976 case 0x83: /* flush windows */
981 /* next instruction */
983 env
->npc
= env
->npc
+ 4;
985 #ifndef TARGET_SPARC64
986 case TT_WIN_OVF
: /* window overflow */
989 case TT_WIN_UNF
: /* window underflow */
995 info
.si_signo
= SIGSEGV
;
997 /* XXX: check env->error_code */
998 info
.si_code
= TARGET_SEGV_MAPERR
;
999 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
1000 queue_signal(env
, info
.si_signo
, &info
);
1004 case TT_SPILL
: /* window overflow */
1007 case TT_FILL
: /* window underflow */
1008 restore_window(env
);
1013 info
.si_signo
= SIGSEGV
;
1015 /* XXX: check env->error_code */
1016 info
.si_code
= TARGET_SEGV_MAPERR
;
1017 if (trapnr
== TT_DFAULT
)
1018 info
._sifields
._sigfault
._addr
= env
->dmmuregs
[4];
1020 info
._sifields
._sigfault
._addr
= cpu_tsptr(env
)->tpc
;
1021 queue_signal(env
, info
.si_signo
, &info
);
1024 #ifndef TARGET_ABI32
1027 sparc64_get_context(env
);
1031 sparc64_set_context(env
);
1035 case EXCP_INTERRUPT
:
1036 /* just indicate that signals should be handled asap */
1042 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1045 info
.si_signo
= sig
;
1047 info
.si_code
= TARGET_TRAP_BRKPT
;
1048 queue_signal(env
, info
.si_signo
, &info
);
1053 printf ("Unhandled trap: 0x%x\n", trapnr
);
1054 cpu_dump_state(env
, stderr
, fprintf
, 0);
1057 process_pending_signals (env
);
1064 static inline uint64_t cpu_ppc_get_tb (CPUState
*env
)
1070 uint32_t cpu_ppc_load_tbl (CPUState
*env
)
1072 return cpu_ppc_get_tb(env
) & 0xFFFFFFFF;
1075 uint32_t cpu_ppc_load_tbu (CPUState
*env
)
1077 return cpu_ppc_get_tb(env
) >> 32;
1080 uint32_t cpu_ppc_load_atbl (CPUState
*env
)
1082 return cpu_ppc_get_tb(env
) & 0xFFFFFFFF;
1085 uint32_t cpu_ppc_load_atbu (CPUState
*env
)
1087 return cpu_ppc_get_tb(env
) >> 32;
1090 uint32_t cpu_ppc601_load_rtcu (CPUState
*env
)
1091 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1093 uint32_t cpu_ppc601_load_rtcl (CPUState
*env
)
1095 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1098 /* XXX: to be fixed */
1099 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, target_ulong
*valp
)
1104 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, target_ulong val
)
1109 #define EXCP_DUMP(env, fmt, ...) \
1111 fprintf(stderr, fmt , ## __VA_ARGS__); \
1112 cpu_dump_state(env, stderr, fprintf, 0); \
1113 qemu_log(fmt, ## __VA_ARGS__); \
1115 log_cpu_state(env, 0); \
1118 static int do_store_exclusive(CPUPPCState
*env
)
1121 target_ulong page_addr
;
1126 addr
= env
->reserve_ea
;
1127 page_addr
= addr
& TARGET_PAGE_MASK
;
1130 flags
= page_get_flags(page_addr
);
1131 if ((flags
& PAGE_READ
) == 0) {
1134 int reg
= env
->reserve_info
& 0x1f;
1135 int size
= (env
->reserve_info
>> 5) & 0xf;
1138 if (addr
== env
->reserve_addr
) {
1140 case 1: segv
= get_user_u8(val
, addr
); break;
1141 case 2: segv
= get_user_u16(val
, addr
); break;
1142 case 4: segv
= get_user_u32(val
, addr
); break;
1143 #if defined(TARGET_PPC64)
1144 case 8: segv
= get_user_u64(val
, addr
); break;
1148 if (!segv
&& val
== env
->reserve_val
) {
1149 val
= env
->gpr
[reg
];
1151 case 1: segv
= put_user_u8(val
, addr
); break;
1152 case 2: segv
= put_user_u16(val
, addr
); break;
1153 case 4: segv
= put_user_u32(val
, addr
); break;
1154 #if defined(TARGET_PPC64)
1155 case 8: segv
= put_user_u64(val
, addr
); break;
1164 env
->crf
[0] = (stored
<< 1) | xer_so
;
1165 env
->reserve_addr
= (target_ulong
)-1;
1175 void cpu_loop(CPUPPCState
*env
)
1177 target_siginfo_t info
;
1182 cpu_exec_start(env
);
1183 trapnr
= cpu_ppc_exec(env
);
1186 case POWERPC_EXCP_NONE
:
1189 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1190 cpu_abort(env
, "Critical interrupt while in user mode. "
1193 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1194 cpu_abort(env
, "Machine check exception while in user mode. "
1197 case POWERPC_EXCP_DSI
: /* Data storage exception */
1198 EXCP_DUMP(env
, "Invalid data memory access: 0x" TARGET_FMT_lx
"\n",
1200 /* XXX: check this. Seems bugged */
1201 switch (env
->error_code
& 0xFF000000) {
1203 info
.si_signo
= TARGET_SIGSEGV
;
1205 info
.si_code
= TARGET_SEGV_MAPERR
;
1208 info
.si_signo
= TARGET_SIGILL
;
1210 info
.si_code
= TARGET_ILL_ILLADR
;
1213 info
.si_signo
= TARGET_SIGSEGV
;
1215 info
.si_code
= TARGET_SEGV_ACCERR
;
1218 /* Let's send a regular segfault... */
1219 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1221 info
.si_signo
= TARGET_SIGSEGV
;
1223 info
.si_code
= TARGET_SEGV_MAPERR
;
1226 info
._sifields
._sigfault
._addr
= env
->nip
;
1227 queue_signal(env
, info
.si_signo
, &info
);
1229 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1230 EXCP_DUMP(env
, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1231 "\n", env
->spr
[SPR_SRR0
]);
1232 /* XXX: check this */
1233 switch (env
->error_code
& 0xFF000000) {
1235 info
.si_signo
= TARGET_SIGSEGV
;
1237 info
.si_code
= TARGET_SEGV_MAPERR
;
1241 info
.si_signo
= TARGET_SIGSEGV
;
1243 info
.si_code
= TARGET_SEGV_ACCERR
;
1246 /* Let's send a regular segfault... */
1247 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1249 info
.si_signo
= TARGET_SIGSEGV
;
1251 info
.si_code
= TARGET_SEGV_MAPERR
;
1254 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1255 queue_signal(env
, info
.si_signo
, &info
);
1257 case POWERPC_EXCP_EXTERNAL
: /* External input */
1258 cpu_abort(env
, "External interrupt while in user mode. "
1261 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1262 EXCP_DUMP(env
, "Unaligned memory access\n");
1263 /* XXX: check this */
1264 info
.si_signo
= TARGET_SIGBUS
;
1266 info
.si_code
= TARGET_BUS_ADRALN
;
1267 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1268 queue_signal(env
, info
.si_signo
, &info
);
1270 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1271 /* XXX: check this */
1272 switch (env
->error_code
& ~0xF) {
1273 case POWERPC_EXCP_FP
:
1274 EXCP_DUMP(env
, "Floating point program exception\n");
1275 info
.si_signo
= TARGET_SIGFPE
;
1277 switch (env
->error_code
& 0xF) {
1278 case POWERPC_EXCP_FP_OX
:
1279 info
.si_code
= TARGET_FPE_FLTOVF
;
1281 case POWERPC_EXCP_FP_UX
:
1282 info
.si_code
= TARGET_FPE_FLTUND
;
1284 case POWERPC_EXCP_FP_ZX
:
1285 case POWERPC_EXCP_FP_VXZDZ
:
1286 info
.si_code
= TARGET_FPE_FLTDIV
;
1288 case POWERPC_EXCP_FP_XX
:
1289 info
.si_code
= TARGET_FPE_FLTRES
;
1291 case POWERPC_EXCP_FP_VXSOFT
:
1292 info
.si_code
= TARGET_FPE_FLTINV
;
1294 case POWERPC_EXCP_FP_VXSNAN
:
1295 case POWERPC_EXCP_FP_VXISI
:
1296 case POWERPC_EXCP_FP_VXIDI
:
1297 case POWERPC_EXCP_FP_VXIMZ
:
1298 case POWERPC_EXCP_FP_VXVC
:
1299 case POWERPC_EXCP_FP_VXSQRT
:
1300 case POWERPC_EXCP_FP_VXCVI
:
1301 info
.si_code
= TARGET_FPE_FLTSUB
;
1304 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1309 case POWERPC_EXCP_INVAL
:
1310 EXCP_DUMP(env
, "Invalid instruction\n");
1311 info
.si_signo
= TARGET_SIGILL
;
1313 switch (env
->error_code
& 0xF) {
1314 case POWERPC_EXCP_INVAL_INVAL
:
1315 info
.si_code
= TARGET_ILL_ILLOPC
;
1317 case POWERPC_EXCP_INVAL_LSWX
:
1318 info
.si_code
= TARGET_ILL_ILLOPN
;
1320 case POWERPC_EXCP_INVAL_SPR
:
1321 info
.si_code
= TARGET_ILL_PRVREG
;
1323 case POWERPC_EXCP_INVAL_FP
:
1324 info
.si_code
= TARGET_ILL_COPROC
;
1327 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1328 env
->error_code
& 0xF);
1329 info
.si_code
= TARGET_ILL_ILLADR
;
1333 case POWERPC_EXCP_PRIV
:
1334 EXCP_DUMP(env
, "Privilege violation\n");
1335 info
.si_signo
= TARGET_SIGILL
;
1337 switch (env
->error_code
& 0xF) {
1338 case POWERPC_EXCP_PRIV_OPC
:
1339 info
.si_code
= TARGET_ILL_PRVOPC
;
1341 case POWERPC_EXCP_PRIV_REG
:
1342 info
.si_code
= TARGET_ILL_PRVREG
;
1345 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1346 env
->error_code
& 0xF);
1347 info
.si_code
= TARGET_ILL_PRVOPC
;
1351 case POWERPC_EXCP_TRAP
:
1352 cpu_abort(env
, "Tried to call a TRAP\n");
1355 /* Should not happen ! */
1356 cpu_abort(env
, "Unknown program exception (%02x)\n",
1360 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1361 queue_signal(env
, info
.si_signo
, &info
);
1363 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1364 EXCP_DUMP(env
, "No floating point allowed\n");
1365 info
.si_signo
= TARGET_SIGILL
;
1367 info
.si_code
= TARGET_ILL_COPROC
;
1368 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1369 queue_signal(env
, info
.si_signo
, &info
);
1371 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1372 cpu_abort(env
, "Syscall exception while in user mode. "
1375 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1376 EXCP_DUMP(env
, "No APU instruction allowed\n");
1377 info
.si_signo
= TARGET_SIGILL
;
1379 info
.si_code
= TARGET_ILL_COPROC
;
1380 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1381 queue_signal(env
, info
.si_signo
, &info
);
1383 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1384 cpu_abort(env
, "Decrementer interrupt while in user mode. "
1387 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1388 cpu_abort(env
, "Fix interval timer interrupt while in user mode. "
1391 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1392 cpu_abort(env
, "Watchdog timer interrupt while in user mode. "
1395 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1396 cpu_abort(env
, "Data TLB exception while in user mode. "
1399 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1400 cpu_abort(env
, "Instruction TLB exception while in user mode. "
1403 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1404 EXCP_DUMP(env
, "No SPE/floating-point instruction allowed\n");
1405 info
.si_signo
= TARGET_SIGILL
;
1407 info
.si_code
= TARGET_ILL_COPROC
;
1408 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1409 queue_signal(env
, info
.si_signo
, &info
);
1411 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1412 cpu_abort(env
, "Embedded floating-point data IRQ not handled\n");
1414 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1415 cpu_abort(env
, "Embedded floating-point round IRQ not handled\n");
1417 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1418 cpu_abort(env
, "Performance monitor exception not handled\n");
1420 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1421 cpu_abort(env
, "Doorbell interrupt while in user mode. "
1424 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1425 cpu_abort(env
, "Doorbell critical interrupt while in user mode. "
1428 case POWERPC_EXCP_RESET
: /* System reset exception */
1429 cpu_abort(env
, "Reset interrupt while in user mode. "
1432 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1433 cpu_abort(env
, "Data segment exception while in user mode. "
1436 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1437 cpu_abort(env
, "Instruction segment exception "
1438 "while in user mode. Aborting\n");
1440 /* PowerPC 64 with hypervisor mode support */
1441 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1442 cpu_abort(env
, "Hypervisor decrementer interrupt "
1443 "while in user mode. Aborting\n");
1445 case POWERPC_EXCP_TRACE
: /* Trace exception */
1447 * we use this exception to emulate step-by-step execution mode.
1450 /* PowerPC 64 with hypervisor mode support */
1451 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1452 cpu_abort(env
, "Hypervisor data storage exception "
1453 "while in user mode. Aborting\n");
1455 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1456 cpu_abort(env
, "Hypervisor instruction storage exception "
1457 "while in user mode. Aborting\n");
1459 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1460 cpu_abort(env
, "Hypervisor data segment exception "
1461 "while in user mode. Aborting\n");
1463 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1464 cpu_abort(env
, "Hypervisor instruction segment exception "
1465 "while in user mode. Aborting\n");
1467 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1468 EXCP_DUMP(env
, "No Altivec instructions allowed\n");
1469 info
.si_signo
= TARGET_SIGILL
;
1471 info
.si_code
= TARGET_ILL_COPROC
;
1472 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1473 queue_signal(env
, info
.si_signo
, &info
);
1475 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1476 cpu_abort(env
, "Programable interval timer interrupt "
1477 "while in user mode. Aborting\n");
1479 case POWERPC_EXCP_IO
: /* IO error exception */
1480 cpu_abort(env
, "IO error exception while in user mode. "
1483 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1484 cpu_abort(env
, "Run mode exception while in user mode. "
1487 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1488 cpu_abort(env
, "Emulation trap exception not handled\n");
1490 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1491 cpu_abort(env
, "Instruction fetch TLB exception "
1492 "while in user-mode. Aborting");
1494 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1495 cpu_abort(env
, "Data load TLB exception while in user-mode. "
1498 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1499 cpu_abort(env
, "Data store TLB exception while in user-mode. "
1502 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1503 cpu_abort(env
, "Floating-point assist exception not handled\n");
1505 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1506 cpu_abort(env
, "Instruction address breakpoint exception "
1509 case POWERPC_EXCP_SMI
: /* System management interrupt */
1510 cpu_abort(env
, "System management interrupt while in user mode. "
1513 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1514 cpu_abort(env
, "Thermal interrupt interrupt while in user mode. "
1517 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1518 cpu_abort(env
, "Performance monitor exception not handled\n");
1520 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1521 cpu_abort(env
, "Vector assist exception not handled\n");
1523 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1524 cpu_abort(env
, "Soft patch exception not handled\n");
1526 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1527 cpu_abort(env
, "Maintenance exception while in user mode. "
1530 case POWERPC_EXCP_STOP
: /* stop translation */
1531 /* We did invalidate the instruction cache. Go on */
1533 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1534 /* We just stopped because of a branch. Go on */
1536 case POWERPC_EXCP_SYSCALL_USER
:
1537 /* system call in user-mode emulation */
1539 * PPC ABI uses overflow flag in cr0 to signal an error
1543 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env
->gpr
[0],
1544 env
->gpr
[3], env
->gpr
[4], env
->gpr
[5], env
->gpr
[6]);
1546 env
->crf
[0] &= ~0x1;
1547 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1548 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1550 if (ret
== (uint32_t)(-TARGET_QEMU_ESIGRETURN
)) {
1551 /* Returning from a successful sigreturn syscall.
1552 Avoid corrupting register state. */
1555 if (ret
> (uint32_t)(-515)) {
1561 printf("syscall returned 0x%08x (%d)\n", ret
, ret
);
1564 case POWERPC_EXCP_STCX
:
1565 if (do_store_exclusive(env
)) {
1566 info
.si_signo
= TARGET_SIGSEGV
;
1568 info
.si_code
= TARGET_SEGV_MAPERR
;
1569 info
._sifields
._sigfault
._addr
= env
->nip
;
1570 queue_signal(env
, info
.si_signo
, &info
);
1577 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
1579 info
.si_signo
= sig
;
1581 info
.si_code
= TARGET_TRAP_BRKPT
;
1582 queue_signal(env
, info
.si_signo
, &info
);
1586 case EXCP_INTERRUPT
:
1587 /* just indicate that signals should be handled asap */
1590 cpu_abort(env
, "Unknown exception 0x%d. Aborting\n", trapnr
);
1593 process_pending_signals(env
);
1600 #define MIPS_SYS(name, args) args,
1602 static const uint8_t mips_syscall_args
[] = {
1603 MIPS_SYS(sys_syscall
, 0) /* 4000 */
1604 MIPS_SYS(sys_exit
, 1)
1605 MIPS_SYS(sys_fork
, 0)
1606 MIPS_SYS(sys_read
, 3)
1607 MIPS_SYS(sys_write
, 3)
1608 MIPS_SYS(sys_open
, 3) /* 4005 */
1609 MIPS_SYS(sys_close
, 1)
1610 MIPS_SYS(sys_waitpid
, 3)
1611 MIPS_SYS(sys_creat
, 2)
1612 MIPS_SYS(sys_link
, 2)
1613 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1614 MIPS_SYS(sys_execve
, 0)
1615 MIPS_SYS(sys_chdir
, 1)
1616 MIPS_SYS(sys_time
, 1)
1617 MIPS_SYS(sys_mknod
, 3)
1618 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1619 MIPS_SYS(sys_lchown
, 3)
1620 MIPS_SYS(sys_ni_syscall
, 0)
1621 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1622 MIPS_SYS(sys_lseek
, 3)
1623 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1624 MIPS_SYS(sys_mount
, 5)
1625 MIPS_SYS(sys_oldumount
, 1)
1626 MIPS_SYS(sys_setuid
, 1)
1627 MIPS_SYS(sys_getuid
, 0)
1628 MIPS_SYS(sys_stime
, 1) /* 4025 */
1629 MIPS_SYS(sys_ptrace
, 4)
1630 MIPS_SYS(sys_alarm
, 1)
1631 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1632 MIPS_SYS(sys_pause
, 0)
1633 MIPS_SYS(sys_utime
, 2) /* 4030 */
1634 MIPS_SYS(sys_ni_syscall
, 0)
1635 MIPS_SYS(sys_ni_syscall
, 0)
1636 MIPS_SYS(sys_access
, 2)
1637 MIPS_SYS(sys_nice
, 1)
1638 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1639 MIPS_SYS(sys_sync
, 0)
1640 MIPS_SYS(sys_kill
, 2)
1641 MIPS_SYS(sys_rename
, 2)
1642 MIPS_SYS(sys_mkdir
, 2)
1643 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1644 MIPS_SYS(sys_dup
, 1)
1645 MIPS_SYS(sys_pipe
, 0)
1646 MIPS_SYS(sys_times
, 1)
1647 MIPS_SYS(sys_ni_syscall
, 0)
1648 MIPS_SYS(sys_brk
, 1) /* 4045 */
1649 MIPS_SYS(sys_setgid
, 1)
1650 MIPS_SYS(sys_getgid
, 0)
1651 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1652 MIPS_SYS(sys_geteuid
, 0)
1653 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1654 MIPS_SYS(sys_acct
, 0)
1655 MIPS_SYS(sys_umount
, 2)
1656 MIPS_SYS(sys_ni_syscall
, 0)
1657 MIPS_SYS(sys_ioctl
, 3)
1658 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1659 MIPS_SYS(sys_ni_syscall
, 2)
1660 MIPS_SYS(sys_setpgid
, 2)
1661 MIPS_SYS(sys_ni_syscall
, 0)
1662 MIPS_SYS(sys_olduname
, 1)
1663 MIPS_SYS(sys_umask
, 1) /* 4060 */
1664 MIPS_SYS(sys_chroot
, 1)
1665 MIPS_SYS(sys_ustat
, 2)
1666 MIPS_SYS(sys_dup2
, 2)
1667 MIPS_SYS(sys_getppid
, 0)
1668 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1669 MIPS_SYS(sys_setsid
, 0)
1670 MIPS_SYS(sys_sigaction
, 3)
1671 MIPS_SYS(sys_sgetmask
, 0)
1672 MIPS_SYS(sys_ssetmask
, 1)
1673 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1674 MIPS_SYS(sys_setregid
, 2)
1675 MIPS_SYS(sys_sigsuspend
, 0)
1676 MIPS_SYS(sys_sigpending
, 1)
1677 MIPS_SYS(sys_sethostname
, 2)
1678 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1679 MIPS_SYS(sys_getrlimit
, 2)
1680 MIPS_SYS(sys_getrusage
, 2)
1681 MIPS_SYS(sys_gettimeofday
, 2)
1682 MIPS_SYS(sys_settimeofday
, 2)
1683 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1684 MIPS_SYS(sys_setgroups
, 2)
1685 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1686 MIPS_SYS(sys_symlink
, 2)
1687 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1688 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1689 MIPS_SYS(sys_uselib
, 1)
1690 MIPS_SYS(sys_swapon
, 2)
1691 MIPS_SYS(sys_reboot
, 3)
1692 MIPS_SYS(old_readdir
, 3)
1693 MIPS_SYS(old_mmap
, 6) /* 4090 */
1694 MIPS_SYS(sys_munmap
, 2)
1695 MIPS_SYS(sys_truncate
, 2)
1696 MIPS_SYS(sys_ftruncate
, 2)
1697 MIPS_SYS(sys_fchmod
, 2)
1698 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1699 MIPS_SYS(sys_getpriority
, 2)
1700 MIPS_SYS(sys_setpriority
, 3)
1701 MIPS_SYS(sys_ni_syscall
, 0)
1702 MIPS_SYS(sys_statfs
, 2)
1703 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1704 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1705 MIPS_SYS(sys_socketcall
, 2)
1706 MIPS_SYS(sys_syslog
, 3)
1707 MIPS_SYS(sys_setitimer
, 3)
1708 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1709 MIPS_SYS(sys_newstat
, 2)
1710 MIPS_SYS(sys_newlstat
, 2)
1711 MIPS_SYS(sys_newfstat
, 2)
1712 MIPS_SYS(sys_uname
, 1)
1713 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1714 MIPS_SYS(sys_vhangup
, 0)
1715 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1716 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1717 MIPS_SYS(sys_wait4
, 4)
1718 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1719 MIPS_SYS(sys_sysinfo
, 1)
1720 MIPS_SYS(sys_ipc
, 6)
1721 MIPS_SYS(sys_fsync
, 1)
1722 MIPS_SYS(sys_sigreturn
, 0)
1723 MIPS_SYS(sys_clone
, 6) /* 4120 */
1724 MIPS_SYS(sys_setdomainname
, 2)
1725 MIPS_SYS(sys_newuname
, 1)
1726 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1727 MIPS_SYS(sys_adjtimex
, 1)
1728 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1729 MIPS_SYS(sys_sigprocmask
, 3)
1730 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1731 MIPS_SYS(sys_init_module
, 5)
1732 MIPS_SYS(sys_delete_module
, 1)
1733 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1734 MIPS_SYS(sys_quotactl
, 0)
1735 MIPS_SYS(sys_getpgid
, 1)
1736 MIPS_SYS(sys_fchdir
, 1)
1737 MIPS_SYS(sys_bdflush
, 2)
1738 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1739 MIPS_SYS(sys_personality
, 1)
1740 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1741 MIPS_SYS(sys_setfsuid
, 1)
1742 MIPS_SYS(sys_setfsgid
, 1)
1743 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1744 MIPS_SYS(sys_getdents
, 3)
1745 MIPS_SYS(sys_select
, 5)
1746 MIPS_SYS(sys_flock
, 2)
1747 MIPS_SYS(sys_msync
, 3)
1748 MIPS_SYS(sys_readv
, 3) /* 4145 */
1749 MIPS_SYS(sys_writev
, 3)
1750 MIPS_SYS(sys_cacheflush
, 3)
1751 MIPS_SYS(sys_cachectl
, 3)
1752 MIPS_SYS(sys_sysmips
, 4)
1753 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1754 MIPS_SYS(sys_getsid
, 1)
1755 MIPS_SYS(sys_fdatasync
, 0)
1756 MIPS_SYS(sys_sysctl
, 1)
1757 MIPS_SYS(sys_mlock
, 2)
1758 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1759 MIPS_SYS(sys_mlockall
, 1)
1760 MIPS_SYS(sys_munlockall
, 0)
1761 MIPS_SYS(sys_sched_setparam
, 2)
1762 MIPS_SYS(sys_sched_getparam
, 2)
1763 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1764 MIPS_SYS(sys_sched_getscheduler
, 1)
1765 MIPS_SYS(sys_sched_yield
, 0)
1766 MIPS_SYS(sys_sched_get_priority_max
, 1)
1767 MIPS_SYS(sys_sched_get_priority_min
, 1)
1768 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
1769 MIPS_SYS(sys_nanosleep
, 2)
1770 MIPS_SYS(sys_mremap
, 4)
1771 MIPS_SYS(sys_accept
, 3)
1772 MIPS_SYS(sys_bind
, 3)
1773 MIPS_SYS(sys_connect
, 3) /* 4170 */
1774 MIPS_SYS(sys_getpeername
, 3)
1775 MIPS_SYS(sys_getsockname
, 3)
1776 MIPS_SYS(sys_getsockopt
, 5)
1777 MIPS_SYS(sys_listen
, 2)
1778 MIPS_SYS(sys_recv
, 4) /* 4175 */
1779 MIPS_SYS(sys_recvfrom
, 6)
1780 MIPS_SYS(sys_recvmsg
, 3)
1781 MIPS_SYS(sys_send
, 4)
1782 MIPS_SYS(sys_sendmsg
, 3)
1783 MIPS_SYS(sys_sendto
, 6) /* 4180 */
1784 MIPS_SYS(sys_setsockopt
, 5)
1785 MIPS_SYS(sys_shutdown
, 2)
1786 MIPS_SYS(sys_socket
, 3)
1787 MIPS_SYS(sys_socketpair
, 4)
1788 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
1789 MIPS_SYS(sys_getresuid
, 3)
1790 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
1791 MIPS_SYS(sys_poll
, 3)
1792 MIPS_SYS(sys_nfsservctl
, 3)
1793 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
1794 MIPS_SYS(sys_getresgid
, 3)
1795 MIPS_SYS(sys_prctl
, 5)
1796 MIPS_SYS(sys_rt_sigreturn
, 0)
1797 MIPS_SYS(sys_rt_sigaction
, 4)
1798 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
1799 MIPS_SYS(sys_rt_sigpending
, 2)
1800 MIPS_SYS(sys_rt_sigtimedwait
, 4)
1801 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
1802 MIPS_SYS(sys_rt_sigsuspend
, 0)
1803 MIPS_SYS(sys_pread64
, 6) /* 4200 */
1804 MIPS_SYS(sys_pwrite64
, 6)
1805 MIPS_SYS(sys_chown
, 3)
1806 MIPS_SYS(sys_getcwd
, 2)
1807 MIPS_SYS(sys_capget
, 2)
1808 MIPS_SYS(sys_capset
, 2) /* 4205 */
1809 MIPS_SYS(sys_sigaltstack
, 0)
1810 MIPS_SYS(sys_sendfile
, 4)
1811 MIPS_SYS(sys_ni_syscall
, 0)
1812 MIPS_SYS(sys_ni_syscall
, 0)
1813 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
1814 MIPS_SYS(sys_truncate64
, 4)
1815 MIPS_SYS(sys_ftruncate64
, 4)
1816 MIPS_SYS(sys_stat64
, 2)
1817 MIPS_SYS(sys_lstat64
, 2)
1818 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
1819 MIPS_SYS(sys_pivot_root
, 2)
1820 MIPS_SYS(sys_mincore
, 3)
1821 MIPS_SYS(sys_madvise
, 3)
1822 MIPS_SYS(sys_getdents64
, 3)
1823 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
1824 MIPS_SYS(sys_ni_syscall
, 0)
1825 MIPS_SYS(sys_gettid
, 0)
1826 MIPS_SYS(sys_readahead
, 5)
1827 MIPS_SYS(sys_setxattr
, 5)
1828 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
1829 MIPS_SYS(sys_fsetxattr
, 5)
1830 MIPS_SYS(sys_getxattr
, 4)
1831 MIPS_SYS(sys_lgetxattr
, 4)
1832 MIPS_SYS(sys_fgetxattr
, 4)
1833 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
1834 MIPS_SYS(sys_llistxattr
, 3)
1835 MIPS_SYS(sys_flistxattr
, 3)
1836 MIPS_SYS(sys_removexattr
, 2)
1837 MIPS_SYS(sys_lremovexattr
, 2)
1838 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
1839 MIPS_SYS(sys_tkill
, 2)
1840 MIPS_SYS(sys_sendfile64
, 5)
1841 MIPS_SYS(sys_futex
, 2)
1842 MIPS_SYS(sys_sched_setaffinity
, 3)
1843 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
1844 MIPS_SYS(sys_io_setup
, 2)
1845 MIPS_SYS(sys_io_destroy
, 1)
1846 MIPS_SYS(sys_io_getevents
, 5)
1847 MIPS_SYS(sys_io_submit
, 3)
1848 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
1849 MIPS_SYS(sys_exit_group
, 1)
1850 MIPS_SYS(sys_lookup_dcookie
, 3)
1851 MIPS_SYS(sys_epoll_create
, 1)
1852 MIPS_SYS(sys_epoll_ctl
, 4)
1853 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
1854 MIPS_SYS(sys_remap_file_pages
, 5)
1855 MIPS_SYS(sys_set_tid_address
, 1)
1856 MIPS_SYS(sys_restart_syscall
, 0)
1857 MIPS_SYS(sys_fadvise64_64
, 7)
1858 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
1859 MIPS_SYS(sys_fstatfs64
, 2)
1860 MIPS_SYS(sys_timer_create
, 3)
1861 MIPS_SYS(sys_timer_settime
, 4)
1862 MIPS_SYS(sys_timer_gettime
, 2)
1863 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
1864 MIPS_SYS(sys_timer_delete
, 1)
1865 MIPS_SYS(sys_clock_settime
, 2)
1866 MIPS_SYS(sys_clock_gettime
, 2)
1867 MIPS_SYS(sys_clock_getres
, 2)
1868 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
1869 MIPS_SYS(sys_tgkill
, 3)
1870 MIPS_SYS(sys_utimes
, 2)
1871 MIPS_SYS(sys_mbind
, 4)
1872 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
1873 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
1874 MIPS_SYS(sys_mq_open
, 4)
1875 MIPS_SYS(sys_mq_unlink
, 1)
1876 MIPS_SYS(sys_mq_timedsend
, 5)
1877 MIPS_SYS(sys_mq_timedreceive
, 5)
1878 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
1879 MIPS_SYS(sys_mq_getsetattr
, 3)
1880 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
1881 MIPS_SYS(sys_waitid
, 4)
1882 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
1883 MIPS_SYS(sys_add_key
, 5)
1884 MIPS_SYS(sys_request_key
, 4)
1885 MIPS_SYS(sys_keyctl
, 5)
1886 MIPS_SYS(sys_set_thread_area
, 1)
1887 MIPS_SYS(sys_inotify_init
, 0)
1888 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
1889 MIPS_SYS(sys_inotify_rm_watch
, 2)
1890 MIPS_SYS(sys_migrate_pages
, 4)
1891 MIPS_SYS(sys_openat
, 4)
1892 MIPS_SYS(sys_mkdirat
, 3)
1893 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
1894 MIPS_SYS(sys_fchownat
, 5)
1895 MIPS_SYS(sys_futimesat
, 3)
1896 MIPS_SYS(sys_fstatat64
, 4)
1897 MIPS_SYS(sys_unlinkat
, 3)
1898 MIPS_SYS(sys_renameat
, 4) /* 4295 */
1899 MIPS_SYS(sys_linkat
, 5)
1900 MIPS_SYS(sys_symlinkat
, 3)
1901 MIPS_SYS(sys_readlinkat
, 4)
1902 MIPS_SYS(sys_fchmodat
, 3)
1903 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
1904 MIPS_SYS(sys_pselect6
, 6)
1905 MIPS_SYS(sys_ppoll
, 5)
1906 MIPS_SYS(sys_unshare
, 1)
1907 MIPS_SYS(sys_splice
, 4)
1908 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
1909 MIPS_SYS(sys_tee
, 4)
1910 MIPS_SYS(sys_vmsplice
, 4)
1911 MIPS_SYS(sys_move_pages
, 6)
1912 MIPS_SYS(sys_set_robust_list
, 2)
1913 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
1914 MIPS_SYS(sys_kexec_load
, 4)
1915 MIPS_SYS(sys_getcpu
, 3)
1916 MIPS_SYS(sys_epoll_pwait
, 6)
1917 MIPS_SYS(sys_ioprio_set
, 3)
1918 MIPS_SYS(sys_ioprio_get
, 2)
1923 static int do_store_exclusive(CPUMIPSState
*env
)
1926 target_ulong page_addr
;
1934 page_addr
= addr
& TARGET_PAGE_MASK
;
1937 flags
= page_get_flags(page_addr
);
1938 if ((flags
& PAGE_READ
) == 0) {
1941 reg
= env
->llreg
& 0x1f;
1942 d
= (env
->llreg
& 0x20) != 0;
1944 segv
= get_user_s64(val
, addr
);
1946 segv
= get_user_s32(val
, addr
);
1949 if (val
!= env
->llval
) {
1950 env
->active_tc
.gpr
[reg
] = 0;
1953 segv
= put_user_u64(env
->llnewval
, addr
);
1955 segv
= put_user_u32(env
->llnewval
, addr
);
1958 env
->active_tc
.gpr
[reg
] = 1;
1965 env
->active_tc
.PC
+= 4;
1972 void cpu_loop(CPUMIPSState
*env
)
1974 target_siginfo_t info
;
1976 unsigned int syscall_num
;
1979 cpu_exec_start(env
);
1980 trapnr
= cpu_mips_exec(env
);
1984 syscall_num
= env
->active_tc
.gpr
[2] - 4000;
1985 env
->active_tc
.PC
+= 4;
1986 if (syscall_num
>= sizeof(mips_syscall_args
)) {
1991 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
1993 nb_args
= mips_syscall_args
[syscall_num
];
1994 sp_reg
= env
->active_tc
.gpr
[29];
1996 /* these arguments are taken from the stack */
1997 /* FIXME - what to do if get_user() fails? */
1998 case 8: get_user_ual(arg8
, sp_reg
+ 28);
1999 case 7: get_user_ual(arg7
, sp_reg
+ 24);
2000 case 6: get_user_ual(arg6
, sp_reg
+ 20);
2001 case 5: get_user_ual(arg5
, sp_reg
+ 16);
2005 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2006 env
->active_tc
.gpr
[4],
2007 env
->active_tc
.gpr
[5],
2008 env
->active_tc
.gpr
[6],
2009 env
->active_tc
.gpr
[7],
2010 arg5
, arg6
/*, arg7, arg8*/);
2012 if (ret
== -TARGET_QEMU_ESIGRETURN
) {
2013 /* Returning from a successful sigreturn syscall.
2014 Avoid clobbering register state. */
2017 if ((unsigned int)ret
>= (unsigned int)(-1133)) {
2018 env
->active_tc
.gpr
[7] = 1; /* error flag */
2021 env
->active_tc
.gpr
[7] = 0; /* error flag */
2023 env
->active_tc
.gpr
[2] = ret
;
2027 info
.si_signo
= TARGET_SIGSEGV
;
2029 /* XXX: check env->error_code */
2030 info
.si_code
= TARGET_SEGV_MAPERR
;
2031 info
._sifields
._sigfault
._addr
= env
->CP0_BadVAddr
;
2032 queue_signal(env
, info
.si_signo
, &info
);
2036 info
.si_signo
= TARGET_SIGILL
;
2039 queue_signal(env
, info
.si_signo
, &info
);
2041 case EXCP_INTERRUPT
:
2042 /* just indicate that signals should be handled asap */
2048 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2051 info
.si_signo
= sig
;
2053 info
.si_code
= TARGET_TRAP_BRKPT
;
2054 queue_signal(env
, info
.si_signo
, &info
);
2059 if (do_store_exclusive(env
)) {
2060 info
.si_signo
= TARGET_SIGSEGV
;
2062 info
.si_code
= TARGET_SEGV_MAPERR
;
2063 info
._sifields
._sigfault
._addr
= env
->active_tc
.PC
;
2064 queue_signal(env
, info
.si_signo
, &info
);
2069 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2071 cpu_dump_state(env
, stderr
, fprintf
, 0);
2074 process_pending_signals(env
);
2080 void cpu_loop (CPUState
*env
)
2083 target_siginfo_t info
;
2086 trapnr
= cpu_sh4_exec (env
);
2091 ret
= do_syscall(env
,
2099 env
->gregs
[0] = ret
;
2101 case EXCP_INTERRUPT
:
2102 /* just indicate that signals should be handled asap */
2108 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2111 info
.si_signo
= sig
;
2113 info
.si_code
= TARGET_TRAP_BRKPT
;
2114 queue_signal(env
, info
.si_signo
, &info
);
2120 info
.si_signo
= SIGSEGV
;
2122 info
.si_code
= TARGET_SEGV_MAPERR
;
2123 info
._sifields
._sigfault
._addr
= env
->tea
;
2124 queue_signal(env
, info
.si_signo
, &info
);
2128 printf ("Unhandled trap: 0x%x\n", trapnr
);
2129 cpu_dump_state(env
, stderr
, fprintf
, 0);
2132 process_pending_signals (env
);
2138 void cpu_loop (CPUState
*env
)
2141 target_siginfo_t info
;
2144 trapnr
= cpu_cris_exec (env
);
2148 info
.si_signo
= SIGSEGV
;
2150 /* XXX: check env->error_code */
2151 info
.si_code
= TARGET_SEGV_MAPERR
;
2152 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
2153 queue_signal(env
, info
.si_signo
, &info
);
2156 case EXCP_INTERRUPT
:
2157 /* just indicate that signals should be handled asap */
2160 ret
= do_syscall(env
,
2168 env
->regs
[10] = ret
;
2174 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2177 info
.si_signo
= sig
;
2179 info
.si_code
= TARGET_TRAP_BRKPT
;
2180 queue_signal(env
, info
.si_signo
, &info
);
2185 printf ("Unhandled trap: 0x%x\n", trapnr
);
2186 cpu_dump_state(env
, stderr
, fprintf
, 0);
2189 process_pending_signals (env
);
2194 #ifdef TARGET_MICROBLAZE
2195 void cpu_loop (CPUState
*env
)
2198 target_siginfo_t info
;
2201 trapnr
= cpu_mb_exec (env
);
2205 info
.si_signo
= SIGSEGV
;
2207 /* XXX: check env->error_code */
2208 info
.si_code
= TARGET_SEGV_MAPERR
;
2209 info
._sifields
._sigfault
._addr
= 0;
2210 queue_signal(env
, info
.si_signo
, &info
);
2213 case EXCP_INTERRUPT
:
2214 /* just indicate that signals should be handled asap */
2217 /* Return address is 4 bytes after the call. */
2219 ret
= do_syscall(env
,
2228 env
->sregs
[SR_PC
] = env
->regs
[14];
2234 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2237 info
.si_signo
= sig
;
2239 info
.si_code
= TARGET_TRAP_BRKPT
;
2240 queue_signal(env
, info
.si_signo
, &info
);
2245 printf ("Unhandled trap: 0x%x\n", trapnr
);
2246 cpu_dump_state(env
, stderr
, fprintf
, 0);
2249 process_pending_signals (env
);
2256 void cpu_loop(CPUM68KState
*env
)
2260 target_siginfo_t info
;
2261 TaskState
*ts
= env
->opaque
;
2264 trapnr
= cpu_m68k_exec(env
);
2268 if (ts
->sim_syscalls
) {
2270 nr
= lduw(env
->pc
+ 2);
2272 do_m68k_simcall(env
, nr
);
2278 case EXCP_HALT_INSN
:
2279 /* Semihosing syscall. */
2281 do_m68k_semihosting(env
, env
->dregs
[0]);
2285 case EXCP_UNSUPPORTED
:
2287 info
.si_signo
= SIGILL
;
2289 info
.si_code
= TARGET_ILL_ILLOPN
;
2290 info
._sifields
._sigfault
._addr
= env
->pc
;
2291 queue_signal(env
, info
.si_signo
, &info
);
2295 ts
->sim_syscalls
= 0;
2298 env
->dregs
[0] = do_syscall(env
,
2308 case EXCP_INTERRUPT
:
2309 /* just indicate that signals should be handled asap */
2313 info
.si_signo
= SIGSEGV
;
2315 /* XXX: check env->error_code */
2316 info
.si_code
= TARGET_SEGV_MAPERR
;
2317 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
2318 queue_signal(env
, info
.si_signo
, &info
);
2325 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2328 info
.si_signo
= sig
;
2330 info
.si_code
= TARGET_TRAP_BRKPT
;
2331 queue_signal(env
, info
.si_signo
, &info
);
2336 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2338 cpu_dump_state(env
, stderr
, fprintf
, 0);
2341 process_pending_signals(env
);
2344 #endif /* TARGET_M68K */
2347 void cpu_loop (CPUState
*env
)
2350 target_siginfo_t info
;
2353 trapnr
= cpu_alpha_exec (env
);
2357 fprintf(stderr
, "Reset requested. Exit\n");
2361 fprintf(stderr
, "Machine check exception. Exit\n");
2365 fprintf(stderr
, "Arithmetic trap.\n");
2368 case EXCP_HW_INTERRUPT
:
2369 fprintf(stderr
, "External interrupt. Exit\n");
2373 fprintf(stderr
, "MMU data fault\n");
2376 case EXCP_DTB_MISS_PAL
:
2377 fprintf(stderr
, "MMU data TLB miss in PALcode\n");
2381 fprintf(stderr
, "MMU instruction TLB miss\n");
2385 fprintf(stderr
, "MMU instruction access violation\n");
2388 case EXCP_DTB_MISS_NATIVE
:
2389 fprintf(stderr
, "MMU data TLB miss\n");
2393 fprintf(stderr
, "Unaligned access\n");
2397 fprintf(stderr
, "Invalid instruction\n");
2401 fprintf(stderr
, "Floating-point not allowed\n");
2404 case EXCP_CALL_PAL
... (EXCP_CALL_PALP
- 1):
2405 call_pal(env
, (trapnr
>> 6) | 0x80);
2407 case EXCP_CALL_PALP
... (EXCP_CALL_PALE
- 1):
2408 fprintf(stderr
, "Privileged call to PALcode\n");
2415 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2418 info
.si_signo
= sig
;
2420 info
.si_code
= TARGET_TRAP_BRKPT
;
2421 queue_signal(env
, info
.si_signo
, &info
);
2426 printf ("Unhandled trap: 0x%x\n", trapnr
);
2427 cpu_dump_state(env
, stderr
, fprintf
, 0);
2430 process_pending_signals (env
);
2433 #endif /* TARGET_ALPHA */
2435 static void usage(void)
2437 printf("qemu-" TARGET_ARCH
" version " QEMU_VERSION QEMU_PKGVERSION
", Copyright (c) 2003-2008 Fabrice Bellard\n"
2438 "usage: qemu-" TARGET_ARCH
" [options] program [arguments...]\n"
2439 "Linux CPU emulator (compiled for %s emulation)\n"
2441 "Standard options:\n"
2442 "-h print this help\n"
2443 "-g port wait gdb connection to port\n"
2444 "-L path set the elf interpreter prefix (default=%s)\n"
2445 "-s size set the stack size in bytes (default=%ld)\n"
2446 "-cpu model select CPU (-cpu ? for list)\n"
2447 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2448 "-E var=value sets/modifies targets environment variable(s)\n"
2449 "-U var unsets targets environment variable(s)\n"
2450 "-0 argv0 forces target process argv[0] to be argv0\n"
2451 #if defined(CONFIG_USE_GUEST_BASE)
2452 "-B address set guest_base address to address\n"
2456 "-d options activate log (logfile=%s)\n"
2457 "-p pagesize set the host page size to 'pagesize'\n"
2458 "-singlestep always run in singlestep mode\n"
2459 "-strace log system calls\n"
2461 "Environment variables:\n"
2462 "QEMU_STRACE Print system calls and arguments similar to the\n"
2463 " 'strace' program. Enable by setting to any value.\n"
2464 "You can use -E and -U options to set/unset environment variables\n"
2465 "for target process. It is possible to provide several variables\n"
2466 "by repeating the option. For example:\n"
2467 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2468 "Note that if you provide several changes to single variable\n"
2469 "last change will stay in effect.\n"
2478 THREAD CPUState
*thread_env
;
2480 void task_settid(TaskState
*ts
)
2482 if (ts
->ts_tid
== 0) {
2483 #ifdef CONFIG_USE_NPTL
2484 ts
->ts_tid
= (pid_t
)syscall(SYS_gettid
);
2486 /* when no threads are used, tid becomes pid */
2487 ts
->ts_tid
= getpid();
2492 void stop_all_tasks(void)
2495 * We trust that when using NPTL, start_exclusive()
2496 * handles thread stopping correctly.
2501 /* Assumes contents are already zeroed. */
2502 void init_task_state(TaskState
*ts
)
2507 ts
->first_free
= ts
->sigqueue_table
;
2508 for (i
= 0; i
< MAX_SIGQUEUE_SIZE
- 1; i
++) {
2509 ts
->sigqueue_table
[i
].next
= &ts
->sigqueue_table
[i
+ 1];
2511 ts
->sigqueue_table
[i
].next
= NULL
;
2514 int main(int argc
, char **argv
, char **envp
)
2516 const char *filename
;
2517 const char *cpu_model
;
2518 struct target_pt_regs regs1
, *regs
= ®s1
;
2519 struct image_info info1
, *info
= &info1
;
2520 struct linux_binprm bprm
;
2521 TaskState ts1
, *ts
= &ts1
;
2525 int gdbstub_port
= 0;
2526 char **target_environ
, **wrk
;
2529 envlist_t
*envlist
= NULL
;
2530 const char *argv0
= NULL
;
2537 qemu_cache_utils_init(envp
);
2540 cpu_set_log_filename(DEBUG_LOGFILE
);
2542 if ((envlist
= envlist_create()) == NULL
) {
2543 (void) fprintf(stderr
, "Unable to allocate envlist\n");
2547 /* add current environment into the list */
2548 for (wrk
= environ
; *wrk
!= NULL
; wrk
++) {
2549 (void) envlist_setenv(envlist
, *wrk
);
2562 if (!strcmp(r
, "-")) {
2564 } else if (!strcmp(r
, "d")) {
2566 const CPULogItem
*item
;
2572 mask
= cpu_str_to_log_mask(r
);
2574 printf("Log items (comma separated):\n");
2575 for(item
= cpu_log_items
; item
->mask
!= 0; item
++) {
2576 printf("%-10s %s\n", item
->name
, item
->help
);
2581 } else if (!strcmp(r
, "E")) {
2583 if (envlist_setenv(envlist
, r
) != 0)
2585 } else if (!strcmp(r
, "U")) {
2587 if (envlist_unsetenv(envlist
, r
) != 0)
2589 } else if (!strcmp(r
, "0")) {
2592 } else if (!strcmp(r
, "s")) {
2596 x86_stack_size
= strtol(r
, (char **)&r
, 0);
2597 if (x86_stack_size
<= 0)
2600 x86_stack_size
*= 1024 * 1024;
2601 else if (*r
== 'k' || *r
== 'K')
2602 x86_stack_size
*= 1024;
2603 } else if (!strcmp(r
, "L")) {
2604 interp_prefix
= argv
[optind
++];
2605 } else if (!strcmp(r
, "p")) {
2608 qemu_host_page_size
= atoi(argv
[optind
++]);
2609 if (qemu_host_page_size
== 0 ||
2610 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
2611 fprintf(stderr
, "page size must be a power of two\n");
2614 } else if (!strcmp(r
, "g")) {
2617 gdbstub_port
= atoi(argv
[optind
++]);
2618 } else if (!strcmp(r
, "r")) {
2619 qemu_uname_release
= argv
[optind
++];
2620 } else if (!strcmp(r
, "cpu")) {
2621 cpu_model
= argv
[optind
++];
2622 if (cpu_model
== NULL
|| strcmp(cpu_model
, "?") == 0) {
2623 /* XXX: implement xxx_cpu_list for targets that still miss it */
2624 #if defined(cpu_list)
2625 cpu_list(stdout
, &fprintf
);
2629 #if defined(CONFIG_USE_GUEST_BASE)
2630 } else if (!strcmp(r
, "B")) {
2631 guest_base
= strtol(argv
[optind
++], NULL
, 0);
2632 have_guest_base
= 1;
2634 } else if (!strcmp(r
, "drop-ld-preload")) {
2635 (void) envlist_unsetenv(envlist
, "LD_PRELOAD");
2636 } else if (!strcmp(r
, "singlestep")) {
2638 } else if (!strcmp(r
, "strace")) {
2647 filename
= argv
[optind
];
2648 exec_path
= argv
[optind
];
2651 memset(regs
, 0, sizeof(struct target_pt_regs
));
2653 /* Zero out image_info */
2654 memset(info
, 0, sizeof(struct image_info
));
2656 memset(&bprm
, 0, sizeof (bprm
));
2658 /* Scan interp_prefix dir for replacement files. */
2659 init_paths(interp_prefix
);
2661 if (cpu_model
== NULL
) {
2662 #if defined(TARGET_I386)
2663 #ifdef TARGET_X86_64
2664 cpu_model
= "qemu64";
2666 cpu_model
= "qemu32";
2668 #elif defined(TARGET_ARM)
2670 #elif defined(TARGET_M68K)
2672 #elif defined(TARGET_SPARC)
2673 #ifdef TARGET_SPARC64
2674 cpu_model
= "TI UltraSparc II";
2676 cpu_model
= "Fujitsu MB86904";
2678 #elif defined(TARGET_MIPS)
2679 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2684 #elif defined(TARGET_PPC)
2694 cpu_exec_init_all(0);
2695 /* NOTE: we need to init the CPU at this stage to get
2696 qemu_host_page_size */
2697 env
= cpu_init(cpu_model
);
2699 fprintf(stderr
, "Unable to find CPU definition\n");
2702 #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
2708 if (getenv("QEMU_STRACE")) {
2712 target_environ
= envlist_to_environ(envlist
, NULL
);
2713 envlist_free(envlist
);
2715 #if defined(CONFIG_USE_GUEST_BASE)
2717 * Now that page sizes are configured in cpu_init() we can do
2718 * proper page alignment for guest_base.
2720 guest_base
= HOST_PAGE_ALIGN(guest_base
);
2723 * Read in mmap_min_addr kernel parameter. This value is used
2724 * When loading the ELF image to determine whether guest_base
2727 * When user has explicitly set the quest base, we skip this
2730 if (!have_guest_base
) {
2733 if ((fp
= fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL
) {
2735 if (fscanf(fp
, "%lu", &tmp
) == 1) {
2736 mmap_min_addr
= tmp
;
2737 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr
);
2742 #endif /* CONFIG_USE_GUEST_BASE */
2745 * Prepare copy of argv vector for target.
2747 target_argc
= argc
- optind
;
2748 target_argv
= calloc(target_argc
+ 1, sizeof (char *));
2749 if (target_argv
== NULL
) {
2750 (void) fprintf(stderr
, "Unable to allocate memory for target_argv\n");
2755 * If argv0 is specified (using '-0' switch) we replace
2756 * argv[0] pointer with the given one.
2759 if (argv0
!= NULL
) {
2760 target_argv
[i
++] = strdup(argv0
);
2762 for (; i
< target_argc
; i
++) {
2763 target_argv
[i
] = strdup(argv
[optind
+ i
]);
2765 target_argv
[target_argc
] = NULL
;
2767 memset(ts
, 0, sizeof(TaskState
));
2768 init_task_state(ts
);
2769 /* build Task State */
2775 ret
= loader_exec(filename
, target_argv
, target_environ
, regs
,
2778 printf("Error %d while loading %s\n", ret
, filename
);
2782 for (i
= 0; i
< target_argc
; i
++) {
2783 free(target_argv
[i
]);
2787 for (wrk
= target_environ
; *wrk
; wrk
++) {
2791 free(target_environ
);
2793 if (qemu_log_enabled()) {
2794 #if defined(CONFIG_USE_GUEST_BASE)
2795 qemu_log("guest_base 0x%lx\n", guest_base
);
2799 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
2800 qemu_log("end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
2801 qemu_log("start_code 0x" TARGET_ABI_FMT_lx
"\n",
2803 qemu_log("start_data 0x" TARGET_ABI_FMT_lx
"\n",
2805 qemu_log("end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
2806 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx
"\n",
2808 qemu_log("brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
2809 qemu_log("entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
2812 target_set_brk(info
->brk
);
2816 #if defined(TARGET_I386)
2817 cpu_x86_set_cpl(env
, 3);
2819 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
2820 env
->hflags
|= HF_PE_MASK
;
2821 if (env
->cpuid_features
& CPUID_SSE
) {
2822 env
->cr
[4] |= CR4_OSFXSR_MASK
;
2823 env
->hflags
|= HF_OSFXSR_MASK
;
2825 #ifndef TARGET_ABI32
2826 /* enable 64 bit mode if possible */
2827 if (!(env
->cpuid_ext2_features
& CPUID_EXT2_LM
)) {
2828 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
2831 env
->cr
[4] |= CR4_PAE_MASK
;
2832 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
2833 env
->hflags
|= HF_LMA_MASK
;
2836 /* flags setup : we activate the IRQs by default as in user mode */
2837 env
->eflags
|= IF_MASK
;
2839 /* linux register setup */
2840 #ifndef TARGET_ABI32
2841 env
->regs
[R_EAX
] = regs
->rax
;
2842 env
->regs
[R_EBX
] = regs
->rbx
;
2843 env
->regs
[R_ECX
] = regs
->rcx
;
2844 env
->regs
[R_EDX
] = regs
->rdx
;
2845 env
->regs
[R_ESI
] = regs
->rsi
;
2846 env
->regs
[R_EDI
] = regs
->rdi
;
2847 env
->regs
[R_EBP
] = regs
->rbp
;
2848 env
->regs
[R_ESP
] = regs
->rsp
;
2849 env
->eip
= regs
->rip
;
2851 env
->regs
[R_EAX
] = regs
->eax
;
2852 env
->regs
[R_EBX
] = regs
->ebx
;
2853 env
->regs
[R_ECX
] = regs
->ecx
;
2854 env
->regs
[R_EDX
] = regs
->edx
;
2855 env
->regs
[R_ESI
] = regs
->esi
;
2856 env
->regs
[R_EDI
] = regs
->edi
;
2857 env
->regs
[R_EBP
] = regs
->ebp
;
2858 env
->regs
[R_ESP
] = regs
->esp
;
2859 env
->eip
= regs
->eip
;
2862 /* linux interrupt setup */
2863 #ifndef TARGET_ABI32
2864 env
->idt
.limit
= 511;
2866 env
->idt
.limit
= 255;
2868 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
2869 PROT_READ
|PROT_WRITE
,
2870 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
2871 idt_table
= g2h(env
->idt
.base
);
2894 /* linux segment setup */
2896 uint64_t *gdt_table
;
2897 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
2898 PROT_READ
|PROT_WRITE
,
2899 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
2900 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
2901 gdt_table
= g2h(env
->gdt
.base
);
2903 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
2904 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
2905 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
2907 /* 64 bit code segment */
2908 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
2909 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
2911 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
2913 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
2914 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
2915 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
2917 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
2918 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
2920 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
2921 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
2922 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
2923 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
2924 /* This hack makes Wine work... */
2925 env
->segs
[R_FS
].selector
= 0;
2927 cpu_x86_load_seg(env
, R_DS
, 0);
2928 cpu_x86_load_seg(env
, R_ES
, 0);
2929 cpu_x86_load_seg(env
, R_FS
, 0);
2930 cpu_x86_load_seg(env
, R_GS
, 0);
2932 #elif defined(TARGET_ARM)
2935 cpsr_write(env
, regs
->uregs
[16], 0xffffffff);
2936 for(i
= 0; i
< 16; i
++) {
2937 env
->regs
[i
] = regs
->uregs
[i
];
2940 #elif defined(TARGET_SPARC)
2944 env
->npc
= regs
->npc
;
2946 for(i
= 0; i
< 8; i
++)
2947 env
->gregs
[i
] = regs
->u_regs
[i
];
2948 for(i
= 0; i
< 8; i
++)
2949 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
2951 #elif defined(TARGET_PPC)
2955 #if defined(TARGET_PPC64)
2956 #if defined(TARGET_ABI32)
2957 env
->msr
&= ~((target_ulong
)1 << MSR_SF
);
2959 env
->msr
|= (target_ulong
)1 << MSR_SF
;
2962 env
->nip
= regs
->nip
;
2963 for(i
= 0; i
< 32; i
++) {
2964 env
->gpr
[i
] = regs
->gpr
[i
];
2967 #elif defined(TARGET_M68K)
2970 env
->dregs
[0] = regs
->d0
;
2971 env
->dregs
[1] = regs
->d1
;
2972 env
->dregs
[2] = regs
->d2
;
2973 env
->dregs
[3] = regs
->d3
;
2974 env
->dregs
[4] = regs
->d4
;
2975 env
->dregs
[5] = regs
->d5
;
2976 env
->dregs
[6] = regs
->d6
;
2977 env
->dregs
[7] = regs
->d7
;
2978 env
->aregs
[0] = regs
->a0
;
2979 env
->aregs
[1] = regs
->a1
;
2980 env
->aregs
[2] = regs
->a2
;
2981 env
->aregs
[3] = regs
->a3
;
2982 env
->aregs
[4] = regs
->a4
;
2983 env
->aregs
[5] = regs
->a5
;
2984 env
->aregs
[6] = regs
->a6
;
2985 env
->aregs
[7] = regs
->usp
;
2987 ts
->sim_syscalls
= 1;
2989 #elif defined(TARGET_MICROBLAZE)
2991 env
->regs
[0] = regs
->r0
;
2992 env
->regs
[1] = regs
->r1
;
2993 env
->regs
[2] = regs
->r2
;
2994 env
->regs
[3] = regs
->r3
;
2995 env
->regs
[4] = regs
->r4
;
2996 env
->regs
[5] = regs
->r5
;
2997 env
->regs
[6] = regs
->r6
;
2998 env
->regs
[7] = regs
->r7
;
2999 env
->regs
[8] = regs
->r8
;
3000 env
->regs
[9] = regs
->r9
;
3001 env
->regs
[10] = regs
->r10
;
3002 env
->regs
[11] = regs
->r11
;
3003 env
->regs
[12] = regs
->r12
;
3004 env
->regs
[13] = regs
->r13
;
3005 env
->regs
[14] = regs
->r14
;
3006 env
->regs
[15] = regs
->r15
;
3007 env
->regs
[16] = regs
->r16
;
3008 env
->regs
[17] = regs
->r17
;
3009 env
->regs
[18] = regs
->r18
;
3010 env
->regs
[19] = regs
->r19
;
3011 env
->regs
[20] = regs
->r20
;
3012 env
->regs
[21] = regs
->r21
;
3013 env
->regs
[22] = regs
->r22
;
3014 env
->regs
[23] = regs
->r23
;
3015 env
->regs
[24] = regs
->r24
;
3016 env
->regs
[25] = regs
->r25
;
3017 env
->regs
[26] = regs
->r26
;
3018 env
->regs
[27] = regs
->r27
;
3019 env
->regs
[28] = regs
->r28
;
3020 env
->regs
[29] = regs
->r29
;
3021 env
->regs
[30] = regs
->r30
;
3022 env
->regs
[31] = regs
->r31
;
3023 env
->sregs
[SR_PC
] = regs
->pc
;
3025 #elif defined(TARGET_MIPS)
3029 for(i
= 0; i
< 32; i
++) {
3030 env
->active_tc
.gpr
[i
] = regs
->regs
[i
];
3032 env
->active_tc
.PC
= regs
->cp0_epc
;
3034 #elif defined(TARGET_SH4)
3038 for(i
= 0; i
< 16; i
++) {
3039 env
->gregs
[i
] = regs
->regs
[i
];
3043 #elif defined(TARGET_ALPHA)
3047 for(i
= 0; i
< 28; i
++) {
3048 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
3050 env
->ipr
[IPR_USP
] = regs
->usp
;
3051 env
->ir
[30] = regs
->usp
;
3053 env
->unique
= regs
->unique
;
3055 #elif defined(TARGET_CRIS)
3057 env
->regs
[0] = regs
->r0
;
3058 env
->regs
[1] = regs
->r1
;
3059 env
->regs
[2] = regs
->r2
;
3060 env
->regs
[3] = regs
->r3
;
3061 env
->regs
[4] = regs
->r4
;
3062 env
->regs
[5] = regs
->r5
;
3063 env
->regs
[6] = regs
->r6
;
3064 env
->regs
[7] = regs
->r7
;
3065 env
->regs
[8] = regs
->r8
;
3066 env
->regs
[9] = regs
->r9
;
3067 env
->regs
[10] = regs
->r10
;
3068 env
->regs
[11] = regs
->r11
;
3069 env
->regs
[12] = regs
->r12
;
3070 env
->regs
[13] = regs
->r13
;
3071 env
->regs
[14] = info
->start_stack
;
3072 env
->regs
[15] = regs
->acr
;
3073 env
->pc
= regs
->erp
;
3076 #error unsupported target CPU
3079 #if defined(TARGET_ARM) || defined(TARGET_M68K)
3080 ts
->stack_base
= info
->start_stack
;
3081 ts
->heap_base
= info
->brk
;
3082 /* This will be filled in on the first SYS_HEAPINFO call. */
3087 gdbserver_start (gdbstub_port
);
3088 gdb_handlesig(env
, 0);