openpic: merge mpic and openpic timer handling
[qemu/agraf.git] / hw / xilinx.h
blob9323fd07c6ec326527bcb2ddb203e82f1ab8587a
1 #include "stream.h"
2 #include "qemu-common.h"
3 #include "net.h"
5 static inline DeviceState *
6 xilinx_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
8 DeviceState *dev;
10 dev = qdev_create(NULL, "xlnx.xps-intc");
11 qdev_prop_set_uint32(dev, "kind-of-intr", kind_of_intr);
12 qdev_init_nofail(dev);
13 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
14 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
15 return dev;
18 /* OPB Timer/Counter. */
19 static inline DeviceState *
20 xilinx_timer_create(hwaddr base, qemu_irq irq, int oto, int freq)
22 DeviceState *dev;
24 dev = qdev_create(NULL, "xlnx.xps-timer");
25 qdev_prop_set_uint32(dev, "one-timer-only", oto);
26 qdev_prop_set_uint32(dev, "clock-frequency", freq);
27 qdev_init_nofail(dev);
28 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
29 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
30 return dev;
33 /* XPS Ethernet Lite MAC. */
34 static inline DeviceState *
35 xilinx_ethlite_create(NICInfo *nd, hwaddr base, qemu_irq irq,
36 int txpingpong, int rxpingpong)
38 DeviceState *dev;
40 qemu_check_nic_model(nd, "xlnx.xps-ethernetlite");
42 dev = qdev_create(NULL, "xlnx.xps-ethernetlite");
43 qdev_set_nic_properties(dev, nd);
44 qdev_prop_set_uint32(dev, "tx-ping-pong", txpingpong);
45 qdev_prop_set_uint32(dev, "rx-ping-pong", rxpingpong);
46 qdev_init_nofail(dev);
47 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
48 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
49 return dev;
52 static inline DeviceState *
53 xilinx_axiethernet_create(NICInfo *nd, StreamSlave *peer,
54 hwaddr base, qemu_irq irq,
55 int txmem, int rxmem)
57 DeviceState *dev;
58 Error *errp = NULL;
60 qemu_check_nic_model(nd, "xlnx.axi-ethernet");
62 dev = qdev_create(NULL, "xlnx.axi-ethernet");
63 qdev_set_nic_properties(dev, nd);
64 qdev_prop_set_uint32(dev, "rxmem", rxmem);
65 qdev_prop_set_uint32(dev, "txmem", txmem);
66 object_property_set_link(OBJECT(dev), OBJECT(peer), "axistream-connected",
67 &errp);
68 assert_no_error(errp);
69 qdev_init_nofail(dev);
70 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
71 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
73 return dev;
76 static inline void
77 xilinx_axiethernetdma_init(DeviceState *dev, StreamSlave *peer,
78 hwaddr base, qemu_irq irq,
79 qemu_irq irq2, int freqhz)
81 Error *errp = NULL;
83 qdev_prop_set_uint32(dev, "freqhz", freqhz);
84 object_property_set_link(OBJECT(dev), OBJECT(peer), "axistream-connected",
85 &errp);
86 assert_no_error(errp);
87 qdev_init_nofail(dev);
89 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
90 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
91 sysbus_connect_irq(sysbus_from_qdev(dev), 1, irq2);