PPC: e500: Declare pci bridge as bridge
[qemu/agraf.git] / cputlb.h
blob733c885a1f8410886adf73011f7de7d81a005243
1 /*
2 * Common CPU TLB handling
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #ifndef CPUTLB_H
20 #define CPUTLB_H
22 #if !defined(CONFIG_USER_ONLY)
23 /* cputlb.c */
24 void tlb_protect_code(ram_addr_t ram_addr);
25 void tlb_unprotect_code_phys(CPUArchState *env, ram_addr_t ram_addr,
26 target_ulong vaddr);
27 void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry, uintptr_t start,
28 uintptr_t length);
29 MemoryRegionSection *phys_page_find(struct AddressSpaceDispatch *d,
30 hwaddr index);
31 void cpu_tlb_reset_dirty_all(ram_addr_t start1, ram_addr_t length);
32 void tlb_set_dirty(CPUArchState *env, target_ulong vaddr);
33 extern int tlb_flush_count;
35 /* exec.c */
36 void tb_flush_jmp_cache(CPUArchState *env, target_ulong addr);
37 hwaddr memory_region_section_get_iotlb(CPUArchState *env,
38 MemoryRegionSection *section,
39 target_ulong vaddr,
40 hwaddr paddr,
41 int prot,
42 target_ulong *address);
43 bool memory_region_is_unassigned(MemoryRegion *mr);
45 #endif
46 #endif