2 * Misc ARM declarations
4 * Copyright (c) 2006 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the LGPL.
16 /* The CPU is also modeled as an interrupt controller. */
17 #define ARM_PIC_CPU_IRQ 0
18 #define ARM_PIC_CPU_FIQ 1
19 qemu_irq
*arm_pic_init_cpu(CPUState
*env
);
22 qemu_irq
*armv7m_init(MemoryRegion
*address_space_mem
,
23 int flash_size
, int sram_size
,
24 const char *kernel_filename
, const char *cpu_model
);
27 struct arm_boot_info
{
29 const char *kernel_filename
;
30 const char *kernel_cmdline
;
31 const char *initrd_filename
;
32 target_phys_addr_t loader_start
;
33 /* multicore boards that use the default secondary core boot functions
34 * need to put the address of the secondary boot code, the boot reg,
35 * and the GIC address in the next 3 values, respectively. boards that
36 * have their own boot functions can use these values as they want.
38 target_phys_addr_t smp_loader_start
;
39 target_phys_addr_t smp_bootreg_addr
;
40 target_phys_addr_t gic_cpu_if_addr
;
43 int (*atag_board
)(const struct arm_boot_info
*info
, void *p
);
44 /* multicore boards that use the default secondary core boot functions
45 * can ignore these two function calls. If the default functions won't
46 * work, then write_secondary_boot() should write a suitable blob of
47 * code mimicing the secondary CPU startup process used by the board's
48 * boot loader/boot ROM code, and secondary_cpu_reset_hook() should
49 * perform any necessary CPU reset handling and set the PC for thei
50 * secondary CPUs to point at this boot blob.
52 void (*write_secondary_boot
)(CPUState
*env
,
53 const struct arm_boot_info
*info
);
54 void (*secondary_cpu_reset_hook
)(CPUState
*env
,
55 const struct arm_boot_info
*info
);
56 /* Used internally by arm_boot.c */
58 target_phys_addr_t initrd_size
;
59 target_phys_addr_t entry
;
61 void arm_load_kernel(CPUState
*env
, struct arm_boot_info
*info
);
63 /* Multiplication factor to convert from system clock ticks to qemu timer
65 extern int system_clock_scale
;
67 #endif /* !ARM_MISC_H */