target-ppc: Fix invalid SPR read/write warnings
[qemu/agraf.git] / target-alpha / mem_helper.c
blob3d2cd61358efdf8f3ad7ccd6ea6d96612088c7cf
1 /*
2 * Helpers for loads and stores
4 * Copyright (c) 2007 Jocelyn Mayer
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "cpu.h"
21 #include "helper.h"
24 /* Softmmu support */
25 #ifndef CONFIG_USER_ONLY
27 uint64_t helper_ldl_phys(uint64_t p)
29 return (int32_t)ldl_phys(p);
32 uint64_t helper_ldq_phys(uint64_t p)
34 return ldq_phys(p);
37 uint64_t helper_ldl_l_phys(CPUAlphaState *env, uint64_t p)
39 env->lock_addr = p;
40 return env->lock_value = (int32_t)ldl_phys(p);
43 uint64_t helper_ldq_l_phys(CPUAlphaState *env, uint64_t p)
45 env->lock_addr = p;
46 return env->lock_value = ldq_phys(p);
49 void helper_stl_phys(uint64_t p, uint64_t v)
51 stl_phys(p, v);
54 void helper_stq_phys(uint64_t p, uint64_t v)
56 stq_phys(p, v);
59 uint64_t helper_stl_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
61 uint64_t ret = 0;
63 if (p == env->lock_addr) {
64 int32_t old = ldl_phys(p);
65 if (old == (int32_t)env->lock_value) {
66 stl_phys(p, v);
67 ret = 1;
70 env->lock_addr = -1;
72 return ret;
75 uint64_t helper_stq_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
77 uint64_t ret = 0;
79 if (p == env->lock_addr) {
80 uint64_t old = ldq_phys(p);
81 if (old == env->lock_value) {
82 stq_phys(p, v);
83 ret = 1;
86 env->lock_addr = -1;
88 return ret;
91 static void do_unaligned_access(CPUAlphaState *env, target_ulong addr,
92 int is_write, int is_user, uintptr_t retaddr)
94 uint64_t pc;
95 uint32_t insn;
97 if (retaddr) {
98 cpu_restore_state(env, retaddr);
101 pc = env->pc;
102 insn = cpu_ldl_code(env, pc);
104 env->trap_arg0 = addr;
105 env->trap_arg1 = insn >> 26; /* opcode */
106 env->trap_arg2 = (insn >> 21) & 31; /* dest regno */
107 env->exception_index = EXCP_UNALIGN;
108 env->error_code = 0;
109 cpu_loop_exit(env);
112 void cpu_unassigned_access(CPUAlphaState *env, hwaddr addr,
113 int is_write, int is_exec, int unused, int size)
115 env->trap_arg0 = addr;
116 env->trap_arg1 = is_write;
117 dynamic_excp(env, 0, EXCP_MCHK, 0);
120 #include "exec/softmmu_exec.h"
122 #define MMUSUFFIX _mmu
123 #define ALIGNED_ONLY
125 #define SHIFT 0
126 #include "exec/softmmu_template.h"
128 #define SHIFT 1
129 #include "exec/softmmu_template.h"
131 #define SHIFT 2
132 #include "exec/softmmu_template.h"
134 #define SHIFT 3
135 #include "exec/softmmu_template.h"
137 /* try to fill the TLB and return an exception if error. If retaddr is
138 NULL, it means that the function was called in C code (i.e. not
139 from generated code or from helper.c) */
140 /* XXX: fix it to restore all registers */
141 void tlb_fill(CPUAlphaState *env, target_ulong addr, int is_write,
142 int mmu_idx, uintptr_t retaddr)
144 int ret;
146 ret = cpu_alpha_handle_mmu_fault(env, addr, is_write, mmu_idx);
147 if (unlikely(ret != 0)) {
148 if (retaddr) {
149 cpu_restore_state(env, retaddr);
151 /* Exception index and error code are already set */
152 cpu_loop_exit(env);
155 #endif /* CONFIG_USER_ONLY */